JP2015015313A - 配線基板及びその製造方法、半導体パッケージ - Google Patents
配線基板及びその製造方法、半導体パッケージ Download PDFInfo
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- H05K3/46—Manufacturing multilayer circuits
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Abstract
【解決手段】配線基板10は、最外層となる絶縁層12と、絶縁層12の外部露出面12a側に設けられたパッド形成部12uと、外部露出面12aよりも突起するパッド11と、を有し、パッド形成部12uは、外部露出面12aよりも窪んだ凹部12sと、平面視において凹部12sを囲むように設けられ、外部露出面12aから突起する堰部12tと、を備え、パッド11は、凹部12s及び堰部12tの内側に形成され、一方の端部が堰部12tから突起するパッド本体11aと、パッド本体11aの一方の端部から側方に張り出し、堰部12t上に形成された庇部11bと、を備え、パッド本体11aの一方の端部は平坦面を有する。
【選択図】図1
Description
[第1の実施の形態に係る配線基板の構造]
まず、第1の実施の形態に係る配線基板の構造について説明する。図1は、第1の実施の形態に係る配線基板を例示する断面図である。なお、図1(b)は、図1(a)のA部を拡大して例示する部分断面図である。
次に、第1の実施の形態に係る配線基板の製造方法について説明する。図2〜図5は、第1の実施の形態に係る配線基板の製造工程を例示する図である。本実施の形態では、支持体上に複数の配線基板となる部分を作製し支持体を除去後個片化して各配線基板とする工程の例を示すが、支持体上に1個ずつ配線基板を作製し支持体を除去する工程としてもよい。
第1の実施の形態の変形例1では、第1の実施の形態の図2(b)〜図3(b)に示す工程の変形例を示す。なお、第1の実施の形態の変形例1において、既に説明した実施の形態と同一構成部品についての説明は省略する。
第1の実施の形態の応用例1では、第1の実施の形態に係る配線基板10(図1参照)に半導体チップを搭載した半導体パッケージの例を示す。なお、第1の実施の形態の応用例1において、既に説明した実施の形態と同一構成部品についての説明は省略する。
第1の実施の形態の応用例2では、第1の実施の形態の応用例1に係る半導体パッケージ30(図7参照)に更に他の半導体パッケージを搭載したPOP構造(パッケージオンパッケージ構造)の半導体パッケージの例を示す。なお、第1の実施の形態の応用例2において、既に説明した実施の形態と同一構成部品についての説明は省略する。
第1の実施の形態の応用例3では、第1の実施の形態に係る配線基板10(図1参照)に半導体チップを搭載した半導体パッケージの他の例を示す。なお、第1の実施の形態の応用例3において、既に説明した実施の形態と同一構成部品についての説明は省略する。
第1の実施の形態の変形例2では、第1の実施の形態において、支持体に形成する第1金属層の上面を粗化する例を示す。なお、第1の実施の形態の変形例2において、既に説明した実施の形態と同一構成部品についての説明は省略する。
11、42、44 パッド
11a パッド本体
11b 庇部
12、14、16 絶縁層
12a 外部露出面
12s、310x、310y 凹部
12t 堰部
12u パッド形成部
12x、14x、16x ビアホール
13、15、17 配線層
18、43、45 ソルダーレジスト層
18x、320x、320y 開口部
21 配線パターン
30、40、60、70、80、90 半導体パッケージ
31、47、71 半導体チップ
32、48、72 突起電極
33、73 アンダーフィル樹脂
41 基板
46 貫通電極
49 樹脂部
50、76 接合部
74 電子部品
75 電極
77 外部接続端子
300 支持体
310 第1金属層
310a 上面
320 レジスト層
330 第2金属層
Claims (10)
- 最外層となる絶縁層と、
前記絶縁層の外部露出面側に設けられたパッド形成部と、
前記外部露出面よりも突起するパッドと、を有し、
前記パッド形成部は、
前記外部露出面よりも窪んだ凹部と、
平面視において前記凹部を囲むように設けられ、前記外部露出面から突起する堰部と、を備え、
前記パッドは、前記凹部及び前記堰部の内側に形成され、一方の端部が前記堰部から突起するパッド本体と、
前記パッド本体の一方の端部から側方に張り出し、前記堰部上に形成された庇部と、を備え、
前記パッド本体の一方の端部は平坦面を有する配線基板。 - 前記絶縁層と前記堰部とは、同一の絶縁性樹脂で一体に形成されている請求項1記載の配線基板。
- 前記凹部の断面形状は、前記外部露出面側より底面側の方が幅が狭いテーパ形状である請求項1又は2記載の配線基板。
- 前記パッドの前記凹部及び前記堰部と接する面は、粗化面とされている請求項1乃至3の何れか一項記載の配線基板。
- 前記パッド本体の前記凹部の底面に形成された部分に、ビア配線が接続されており、
前記ビア配線の断面形状は、前記絶縁層の前記外部露出面側より前記外部露出面とは反対面側の方が幅が広いテーパ形状である請求項1乃至4の何れか一項記載の配線基板。 - 前記外部露出面は、粗化面とされている請求項1乃至5の何れか一項記載の配線基板。
- 請求項1乃至6の何れか一項記載の配線基板に半導体チップを搭載した半導体パッケージ。
- 支持体の上面に第1金属層を形成する工程と、
前記第1金属層の上面に開口部を備えたレジスト層を形成する工程と、
前記開口部を介して前記第1金属層の一部を前記支持体に対して選択的に除去し、平面形状が前記開口部の外周側に拡大された凹部を形成し、前記凹部の底面に前記支持体の上面を露出させる工程と、
前記凹部の底部に露出する前記支持体の上面と前記凹部の内壁面とを覆う第2金属層を形成する工程と、
前記第2金属層上から前記開口部内に延在するパッドを形成する工程と、
前記レジスト層を除去する工程と、
前記第1金属層の上面に前記パッドを被覆する絶縁層を形成する工程と、
前記支持体を、前記第1金属層及び前記第2金属層に対して選択的に除去する工程と、
前記第1金属層及び前記第2金属層を、前記パッドに対して選択的に除去する工程と、を有する配線基板の製造方法。 - 前記レジスト層を除去する工程と前記絶縁層を形成する工程との間に、前記パッドの前記第1金属層及び前記第2金属層から露出する面を粗化する工程を有する請求項8記載の配線基板の製造方法。
- 前記第1金属層の上面は粗化面とされている請求項8又は9記載の配線基板の製造方法。
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US14/308,853 US9433109B2 (en) | 2013-07-03 | 2014-06-19 | Wiring substrate and semiconductor package |
KR1020140081667A KR20150004749A (ko) | 2013-07-03 | 2014-07-01 | 배선 기판 및 그 제조 방법, 반도체 패키지 |
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JP2016207893A (ja) * | 2015-04-24 | 2016-12-08 | イビデン株式会社 | プリント配線板およびその製造方法 |
US20160381793A1 (en) * | 2015-06-24 | 2016-12-29 | Kyocera Corporation | Wiring board and method for manufacturing the same |
JP2017123377A (ja) * | 2016-01-05 | 2017-07-13 | イビデン株式会社 | プリント配線板及びプリント配線板の製造方法 |
JP2017135193A (ja) * | 2016-01-26 | 2017-08-03 | イビデン株式会社 | プリント配線板、及び、そのプリント配線板の製造方法 |
US10615109B2 (en) | 2018-05-10 | 2020-04-07 | Advanced Semiconductor Engineering, Inc. | Substrate, semiconductor device package and method of manufacturing the same |
CN110783728A (zh) * | 2018-11-09 | 2020-02-11 | 广州方邦电子股份有限公司 | 一种柔性连接器及制作方法 |
JP7198154B2 (ja) * | 2019-05-22 | 2022-12-28 | 新光電気工業株式会社 | 配線基板、及び配線基板の製造方法 |
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