JP2014183270A - 半導体装置の製造方法 - Google Patents
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Abstract
【解決手段】本発明の実施形態に係る半導体装置の製造方法では、第1基板の一方の主面上に第1接着剤層を設ける。熱硬化性を有し、第1基板と貼り合わされる第2基板および第1基板との間の接着力が第1接着剤層との間の接着力よりも大きく、第1接着剤層の表面を被覆する第2接着剤層を介して、第1基板と第2基板とを貼り合わせる。第1基板の他方の主面を研削して第1基板を薄化する。第2接着剤層の周縁部へ物理的な力を加えて第2接着剤層の外周に沿った環状の切欠部を形成する。第1接着剤と第2接着剤との界面で第1基板と第2基板とを分離する。切欠部は、外周が第2接着剤層の外周より内側に位置し、内周が第1接着剤層の外周よりも内側に位置し、第2基板との間に第2接着剤層を残して形成される。
【選択図】図2
Description
以下では、半導体素子や集積回路が形成される第1基板(以下、「デバイス基板」と記載する)と第2基板(以下、「支持基板」と記載する)とを貼り合わせ、支持基板によって支持されるデバイス基板を薄化した後、支持基板から剥離する工程について説明する。
図3は、第2実施形態に係る半導体装置の製造方法を示す説明図である。第2実施形態に係る半導体装置の製造方法は、図1に示す製造工程の後に行う製造工程が第1実施形態とは異なる。このため、図3には、図1に示す製造工程の後に行う製造工程を示している。また、以下の説明では、図1および図2に示す構成要素と同一の構成要素について、図1および図2に示す符号と同一の符号を付することにより、その説明を省略する。
図4は、第3実施形態に係る半導体装置の製造方法を示す説明図である。第3実施形態に係る半導体装置の製造方法は、図1に示す製造工程の後に行う製造工程が第1実施形態とは異なる。このため、図4には、図1に示す製造工程の後に行う製造工程を示している。また、以下の説明では、図1および図2に示す構成要素と同一の構成要素について、図1および図2に示す符号と同一の符号を付することにより、その説明を省略する。
図5は、第4実施形態に係る半導体装置の製造方法を示す説明図である。第4実施形態に係る半導体装置の製造方法は、図1に示す製造工程の後に行う製造工程が第1実施形態とは異なる。このため、図5には、図1に示す製造工程の後に行う製造工程を示している。また、以下の説明では、図1および図2に示す構成要素と同一の構成要素について、図1および図2に示す符号と同一の符号を付することにより、その説明を省略する。
Claims (6)
- 第1基板の一方の主面上に第1接着剤層を設ける工程と、
熱硬化性を有し、前記第1基板と貼り合わされる第2基板および前記第1基板との間の接着力が前記第1接着剤層との間の接着力よりも大きく、前記第1接着剤層の表面を被覆する第2接着剤層を介して、前記第1基板と前記第2基板とを貼り合わせる工程と、
前記第1基板の他方の主面を研削して該第1基板を薄化する工程と、
前記第2接着剤層の周縁部へ物理的な力を加えて該第2接着剤層の外周に沿った環状の切欠部を形成する工程と、
前記第1基板側を固定し、前記第1接着剤と前記第2接着剤との界面とを剥離させて前記第1基板から前記第2基板を分離する工程と、を含み、
前記切欠部は、外周が前記第2接着剤層の外周より内側に位置し、かつ内周が前記第1接着剤層の外周よりも内側に位置するとともに、前記第2基板との間に前記第2接着剤層を残して形成されることを特徴とする半導体装置の製造方法。 - 第1接着剤層と、熱硬化性を有し、第1基板と貼り合わされる第2基板および前記第1基板との間の接着力が前記第1接着剤層との間の接着力よりも大きく、前記第1接着剤層の表面を被覆する第2接着剤層とを介して、前記第1接着剤が前記第1基板側となる様に、前記第1基板の主面と前記第2基板とを貼り合わせる工程と、
前記第1基板の他方の主面を研削して該第1基板を薄化する工程と、
前記第2接着剤層の周縁部へ物理的な力を加えて該第2接着剤層の外周に沿った環状の切欠部を形成する工程と
を含むことを特徴とする半導体装置の製造方法。 - 前記切欠部は、
前記第1基板と前記第2接着剤層との境界を含む領域に形成される
ことを特徴とする請求項2に記載の半導体装置の製造方法。 - 前記切欠部は、
外周が前記第2接着剤層の外周より内側に位置する
ことを特徴とする請求項2または請求項3に記載の半導体装置の製造方法。 - 前記切欠部は、
内周が前記第1接着剤層の外周よりも内側に位置する
ことを特徴とする請求項2〜4のいずれか一つに記載の半導体装置の製造方法。 - 前記切欠部は、
前記第2基板との間に前記第2接着剤層を残して形成される
ことを特徴とする請求項2〜5のいずれか一つに記載の半導体装置の製造方法。
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JP2013058229A JP5921473B2 (ja) | 2013-03-21 | 2013-03-21 | 半導体装置の製造方法 |
TW102129027A TWI505346B (zh) | 2013-03-21 | 2013-08-13 | Manufacturing method of semiconductor device |
CN201310364759.3A CN104064506B (zh) | 2013-03-21 | 2013-08-20 | 半导体装置的制造方法 |
US14/015,164 US8975160B2 (en) | 2013-03-21 | 2013-08-30 | Manufacturing method for semiconductor device |
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JP5921473B2 JP5921473B2 (ja) | 2016-05-24 |
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JP2016096218A (ja) * | 2014-11-13 | 2016-05-26 | 三菱化学株式会社 | 積層基板の製造方法及び電子デバイスの製造方法 |
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JP6004100B2 (ja) * | 2013-05-24 | 2016-10-05 | 富士電機株式会社 | 半導体装置の製造方法 |
TWI671141B (zh) * | 2013-08-30 | 2019-09-11 | 半導體能源研究所股份有限公司 | 支撐體供應裝置及供應支撐體的方法 |
US10804407B2 (en) | 2016-05-12 | 2020-10-13 | Semiconductor Energy Laboratory Co., Ltd. | Laser processing apparatus and stack processing apparatus |
JP2021048303A (ja) | 2019-09-19 | 2021-03-25 | キオクシア株式会社 | 半導体装置 |
FR3109016B1 (fr) * | 2020-04-01 | 2023-12-01 | Soitec Silicon On Insulator | Structure demontable et procede de transfert d’une couche mettant en œuvre ladite structure demontable |
FR3111142B1 (fr) * | 2020-06-09 | 2022-08-05 | Commissariat Energie Atomique | Procédé de collage temporaire |
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