JP2013143414A - Electronic circuit board and semiconductor device - Google Patents

Electronic circuit board and semiconductor device Download PDF

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JP2013143414A
JP2013143414A JP2012001778A JP2012001778A JP2013143414A JP 2013143414 A JP2013143414 A JP 2013143414A JP 2012001778 A JP2012001778 A JP 2012001778A JP 2012001778 A JP2012001778 A JP 2012001778A JP 2013143414 A JP2013143414 A JP 2013143414A
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inorganic
circuit board
electronic circuit
insulating layer
metal plate
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JP5868187B2 (en
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Kazuaki Naoe
和明 直江
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Hitachi Ltd
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Hitachi Ltd
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Priority to JP2012001778A priority Critical patent/JP5868187B2/en
Priority to US14/367,685 priority patent/US20150327403A1/en
Priority to PCT/JP2012/080668 priority patent/WO2013105351A1/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]

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  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide an electronic circuit board in which a conductive wire is not peeled off by temperature cycles in a use environment, and to provide a semiconductor device using the electronic circuit board.SOLUTION: An electronic circuit board comprises: a metal plate 1; an insulating layer 2 directly formed to the metal plate without an adhesive layer; and a conductive wire 3 formed to the insulating layer. The insulating layer has an inorganic insulation part 21 made of an inorganic material, and an inorganic/organic mixture insulation part 22 containing an organic material in cavities of the inorganic material. The inorganic/organic mixture insulation part is formed to at least a part of an interface between the insulating layer and the conductive wire.

Description

本発明は、電子回路基板及び半導体装置に関する。   The present invention relates to an electronic circuit board and a semiconductor device.

本技術分野の背景技術として、特許文献１がある。この公報には、絶縁性のセラミックス基板の裏面側に冷却用の金属材料を設けた回路基板において、室温環境下で前記金属材料に前記セラミックス基板が接着剤を用いることなく直接接合されており、前記セラミックス基板が、多結晶の脆性材料からなり、結晶同士の界面にはガラス層からなる粒界層が存在せず、前記セラミックス基板と前記金属材料との界面は、前記セラミックス基板が前記金属材料に食い込むアンカー部となっていることを特徴とする回路基板が記載されている。   As a background art of this technical field, there is Patent Document 1. In this publication, in a circuit board provided with a metal material for cooling on the back side of an insulating ceramic substrate, the ceramic substrate is directly bonded to the metal material without using an adhesive in a room temperature environment, The ceramic substrate is made of a polycrystalline brittle material, there is no grain boundary layer made of a glass layer at the interface between the crystals, and the ceramic substrate is made of the metal material at the interface between the ceramic substrate and the metal material. There is described a circuit board characterized in that it is an anchor part that bites into the board.

特許第３７８４３４１号公報Japanese Patent No. 3784341

特許文献１では、エアロゾルデポジション法によりセラミックス基板を金属材料に直接形成した電子回路基板が記載されている。ＩＣチップなどの半導体素子を搭載するために、セラミックス基板の表面には導体性配線が形成される。   Patent Document 1 describes an electronic circuit board in which a ceramic substrate is directly formed on a metal material by an aerosol deposition method. In order to mount a semiconductor element such as an IC chip, conductive wiring is formed on the surface of the ceramic substrate.

しかし、電子回路基板が使用環境において温度サイクルを受ける場合、例えば、−４０℃から１２５℃までの温度変化を繰返し受ける場合、セラミックス基板表面に形成された導電性配線が剥離する課題がある。導体性配線の剥離は、電子回路基板に搭載した半導体素子の放熱性を低下させるため、素子温度が上昇し、素子が故障する原因となる。   However, when the electronic circuit board is subjected to a temperature cycle in a use environment, for example, when the temperature change from −40 ° C. to 125 ° C. is repeatedly received, there is a problem that the conductive wiring formed on the surface of the ceramic substrate is peeled off. The peeling of the conductive wiring reduces the heat dissipation of the semiconductor element mounted on the electronic circuit board, so that the element temperature rises and causes the element to fail.

そこで本発明では、使用環境における温度サイクルにより導体性配線が剥離しない電子回路基板及びその電子回路基板を用いた半導体装置を提供することを目的とする。   Accordingly, an object of the present invention is to provide an electronic circuit board in which conductive wiring does not peel off due to a temperature cycle in a use environment and a semiconductor device using the electronic circuit board.

上記課題を解決するために、例えば特許請求の範囲に記載の構成を採用する。本発明は上記課題を解決する手段を複数含んでいるが、その一例を挙げるならば、金属板と、前記金属板に接着層なく直接形成された絶縁層と、前記絶縁層に形成された導体性配線を備え、前記絶縁層は無機材料からなる無機絶縁部と無機材料の空隙に有機材料を含有する無機有機混合絶縁部とを有し、前記絶縁層と前記導体性配線の界面の少なくとも一部に無機有機混合絶縁部が形成されたことを特徴とする。   In order to solve the above problems, for example, the configuration described in the claims is adopted. The present invention includes a plurality of means for solving the above problems. For example, a metal plate, an insulating layer formed directly on the metal plate without an adhesive layer, and a conductor formed on the insulating layer. The insulating layer includes an inorganic insulating portion made of an inorganic material and an inorganic-organic mixed insulating portion containing an organic material in a gap between the inorganic materials, and at least one of the interfaces between the insulating layer and the conductive wiring. An inorganic-organic mixed insulating part is formed in the part.

本発明により、使用環境における温度サイクルにより導体性配線が剥離しない電子回路基板及びその電子回路基板を用いた半導体装置を提供することができる。   According to the present invention, it is possible to provide an electronic circuit board in which the conductive wiring does not peel off due to a temperature cycle in a use environment, and a semiconductor device using the electronic circuit board.

実施例１における電子回路基板の模式図である。1 is a schematic diagram of an electronic circuit board in Example 1. FIG. 金属板１に直接形成した無機材料２０の模式図である。2 is a schematic view of an inorganic material 20 formed directly on the metal plate 1. FIG. 無機材料２０の空隙を有機材料で含浸させた絶縁層２の模式図である。It is a schematic diagram of the insulating layer 2 which impregnated the space | gap of the inorganic material 20 with the organic material. エアロゾルデポジション装置の構成説明図である。It is a structure explanatory view of an aerosol deposition device. 粒子圧縮破壊試験装置の構成説明図である。It is composition explanatory drawing of a particle compression fracture test apparatus. 粒子を圧縮破壊した場合の代表的な荷重変位曲線である。It is a typical load displacement curve at the time of carrying out compression fracture of particles. 無機材料２０における空隙のない緻密な領域２１０の走査形電子顕微鏡像である。2 is a scanning electron microscope image of a dense region 210 having no voids in the inorganic material 20. 無機材料２０における有機材料を含浸する空隙のある領域２２０の走査形電子顕微鏡像である。It is a scanning electron microscope image of the area | region 220 with the space | gap which impregnates the organic material in the inorganic material 20. FIG. 実施例１における電子回路基板を用いた半導体装置の模式図である。1 is a schematic diagram of a semiconductor device using an electronic circuit board in Example 1. FIG. 実施例１における電子回路基板を用いた半導体装置の変形例の模式図である。7 is a schematic diagram of a modification of the semiconductor device using the electronic circuit board in Example 1. FIG. 実施例２における電子回路基板の模式図である。6 is a schematic diagram of an electronic circuit board in Example 2. FIG. 実施例２における電子回路基板を用いた半導体装置の変形例１の模式図である。10 is a schematic diagram of Modification 1 of the semiconductor device using the electronic circuit board in Embodiment 2. FIG. 実施例２における電子回路基板を用いた半導体装置の変形例２の模式図である。FIG. 10 is a schematic diagram of a second modification of the semiconductor device using the electronic circuit board in the second embodiment. 実施例２における電子回路基板を用いた半導体装置の変形例３の模式図である。FIG. 11 is a schematic diagram of a third modification of the semiconductor device using the electronic circuit board in the second embodiment. 実施例２における電子回路基板を用いた半導体装置の変形例４の模式図である。FIG. 10 is a schematic diagram of a fourth modification of the semiconductor device using the electronic circuit board in the second embodiment.

以下、実施例を図面を用いて説明する。   Hereinafter, examples will be described with reference to the drawings.

図１に、本実施例における電子回路基板の模式図を示す。金属板１に絶縁層２が、接着層なく直接形成される。金属板１の絶縁層２が形成されていない一方の面には、放熱性を向上させるためのフィンが形成されていても良い。   In FIG. 1, the schematic diagram of the electronic circuit board in a present Example is shown. The insulating layer 2 is directly formed on the metal plate 1 without an adhesive layer. Fins for improving heat dissipation may be formed on one surface of the metal plate 1 where the insulating layer 2 is not formed.

絶縁層２の金属板１が接合していない一方の面には、導体性配線３が形成される。導体性配線３の形成方法として、真空蒸着法、スパッタ法、ＣＶＤ法、めっき法、スクリーン印刷法など従来公知のいずれの方法も使用できる。   Conductive wiring 3 is formed on one surface of the insulating layer 2 where the metal plate 1 is not joined. As a method for forming the conductive wiring 3, any conventionally known method such as a vacuum deposition method, a sputtering method, a CVD method, a plating method, or a screen printing method can be used.

絶縁層２には、無機材料のみからなる無機絶縁部２１と無機材料の空隙に有機材料が含浸した無機有機混合絶縁部２２が存在する。本実施例における電子回路基板では、絶縁層２と導体性配線３の界面の少なくとも一部に無機有機混合絶縁部２２を形成することで、温度サイクルによる導体性配線３の剥離を抑制することができる。   The insulating layer 2 includes an inorganic insulating portion 21 made of only an inorganic material and an inorganic / organic mixed insulating portion 22 in which a gap between the inorganic materials is impregnated with an organic material. In the electronic circuit board according to the present embodiment, the inorganic / organic mixed insulating portion 22 is formed on at least a part of the interface between the insulating layer 2 and the conductive wiring 3 to suppress peeling of the conductive wiring 3 due to the temperature cycle. it can.

絶縁層２に使用する無機材料としては、電気的に絶縁性であればいずれの材料も使用できる。例えば、Ａｌ２Ｏ３、ＡｌＮ、ＴｉＯ２、Ｃｒ２Ｏ３、ＳｉＯ２、Ｙ２Ｏ３、ＮｉＯ、ＺｒＯ２、ＳｉＣ、ＴｉＣ、ＷＣなどが挙げられる。絶縁層２に使用する無機材料はこれらの混合とすることもできる。高熱伝導率の点からでは、ＳｉＣ、ＡｌＮ、Ｓｉ３Ｎ４、Ａｌ２Ｏ３等が望ましい。さらに、大気中での取り扱い、及び無機材料の製造コストの点において、Ａｌ２Ｏ３が最も望ましい。 As the inorganic material used for the insulating layer 2, any material can be used as long as it is electrically insulating. For example, Al 2 O 3 , AlN, TiO 2 , Cr 2 O 3 , SiO 2 , Y 2 O 3 , NiO, ZrO 2 , SiC, TiC, WC and the like can be mentioned. The inorganic material used for the insulating layer 2 may be a mixture thereof. From the viewpoint of high thermal conductivity, SiC, AlN, Si 3 N 4 , Al 2 O 3 and the like are desirable. Furthermore, Al 2 O 3 is most desirable in terms of handling in the air and manufacturing cost of the inorganic material.

絶縁層２に使用する有機材料としては、電気的に絶縁性であればいずれの材料も使用できる。例えば、エポキシ樹脂、フェノール樹脂、フッ素系樹脂、シリコン樹脂、ポリイミド樹脂、ポリアミドイミド樹脂などが挙げられる。有機材料には、Ａｌ２Ｏ３、ＡｌＮ、ＴｉＯ２、Ｃｒ２Ｏ３、ＳｉＯ２、Ｙ２Ｏ３、ＮｉＯ、ＺｒＯ２、ＳｉＣ、ＴｉＣ、ＷＣなどの無機粒子を含有してもよい。無機粒子の含有により、有機材料の熱膨張係数は低減する。有機材料の熱膨張係数が絶縁層２に使用する無機材料よりも大きく、導体性配線３よりも小さい場合、温度変化による導体性配線３の剥離を効果的に抑制することができる。例えば、無機材料にＡｌ２Ｏ３（熱膨張係数７×１０−６/℃）、導体性配線にＣｕ（熱膨張係数１７×１０−６/℃）を使用した場合、熱膨張係数を１０〜１５×１０−６/℃程度に調整した有機材料を使用することが望ましい。 As the organic material used for the insulating layer 2, any material can be used as long as it is electrically insulating. For example, an epoxy resin, a phenol resin, a fluorine resin, a silicon resin, a polyimide resin, a polyamideimide resin, and the like can be given. The organic material may contain inorganic particles such as Al 2 O 3 , AlN, TiO 2 , Cr 2 O 3 , SiO 2 , Y 2 O 3 , NiO, ZrO 2 , SiC, TiC, and WC. By including inorganic particles, the thermal expansion coefficient of the organic material is reduced. When the thermal expansion coefficient of the organic material is larger than that of the inorganic material used for the insulating layer 2 and smaller than that of the conductive wiring 3, peeling of the conductive wiring 3 due to temperature change can be effectively suppressed. For example, when Al 2 O 3 (thermal expansion coefficient 7 × 10 −6 / ° C.) is used as the inorganic material and Cu (thermal expansion coefficient 17 × 10 −6 / ° C.) is used as the conductive wiring, the thermal expansion coefficient is 10 to 10. It is desirable to use an organic material adjusted to about 15 × 10 −6 / ° C.

無機有機混合絶縁部２２の形成箇所は、絶縁層２と導体性配線３との界面のうち、導体性配線層３の端部を含むことが望ましい。温度サイクルによる導体性配線３の剥離は、その端部より進展する。無機絶縁部２１よりも熱膨張係数が高い無機有機混合絶縁部２２を導体性配線３の端部に形成し、導体性配線３との熱膨張係数差を小さくすることで、熱応力を低減し、温度サイクルによる導体性配線３の剥離を効果的に抑制することができる。   The location where the inorganic / organic mixed insulating portion 22 is formed desirably includes the end of the conductive wiring layer 3 in the interface between the insulating layer 2 and the conductive wiring 3. The peeling of the conductive wiring 3 due to the temperature cycle progresses from the end. The inorganic / organic mixed insulating part 22 having a higher thermal expansion coefficient than the inorganic insulating part 21 is formed at the end of the conductive wiring 3, and the thermal stress is reduced by reducing the difference in thermal expansion coefficient with the conductive wiring 3. The peeling of the conductive wiring 3 due to the temperature cycle can be effectively suppressed.

絶縁層２の製造方法は、図２（ａ）に示すエアロゾルデポジション法により無機材料２０を金属板１に直接形成する工程と、図２（ｂ）に示す無機材料２０の空隙に有機材料を含浸させる工程からなる。無機材料２０には空隙の無い領域２１０と空隙のある領域２２０が存在し、有機材料の含浸後、有機材料が含浸する空隙が無く無機材料のみからなる領域が無機絶縁部２１として機能し、無機材料の空隙に有機材料が含浸した領域が無機有機混合絶縁部２２として機能する。   The manufacturing method of the insulating layer 2 includes a step of directly forming the inorganic material 20 on the metal plate 1 by the aerosol deposition method shown in FIG. 2A, and an organic material in the gap of the inorganic material 20 shown in FIG. It consists of an impregnation step. The inorganic material 20 includes a region 210 having no voids and a region 220 having voids, and after impregnation with the organic material, a region composed of only the inorganic material without voids impregnated with the organic material functions as the inorganic insulating portion 21. The region where the organic material is impregnated in the voids of the material functions as the inorganic / organic mixed insulating portion 22.

まず、エアロゾルデポジション法により無機材料２０を金属板１に直接形成する過程を説明する。エアロゾルデポジション装置の構成説明図を図３に示す。高圧ガスボンベ３１を開栓し、搬送ガスがガス搬送管３２を通してエアロゾル発生器２３に導入させる。エアロゾル発生器３３にはあらかじめ無機材料２０と同組成の粒子を入れておく。粒径は０．１〜５μｍ程度が望ましい。搬送ガスと混合されることで、当該粒子を含むエアロゾルが発生する。使用可能な搬送ガスとしては、Ａｒ、Ｎ２、Ｈｅ等の不活性ガスが挙げられる。金属板１は真空チャンバー３５内のＸＹステージ３７に固定する。真空チャンバー３５を真空ポンプ３８により減圧することで、搬送ガスが導入されるエアロゾル発生器３３と真空チャンバー３５間には圧力差が生まれる。この圧力差により、エアロゾルは、搬送管３４を通してノズル３６へと送られ、金属板１に向けてノズル３６の開口より高速で噴出される。エアロゾル中の粒子は、金属板１に衝突し、結合する。さらに粒子が連続的に衝突し、微粒子同士も結合することで、無機材料２０が金属板１に形成される。無機材料２０は金属板１に直接形成され、無機材料２０と金属板１の構成元素が相互に拡散した遷移領域や、無機材料２０と金属板１の反応生成層は界面に存在しない。 First, a process of directly forming the inorganic material 20 on the metal plate 1 by the aerosol deposition method will be described. An explanatory diagram of the configuration of the aerosol deposition apparatus is shown in FIG. The high pressure gas cylinder 31 is opened, and the carrier gas is introduced into the aerosol generator 23 through the gas carrier pipe 32. In the aerosol generator 33, particles having the same composition as that of the inorganic material 20 are put in advance. The particle size is preferably about 0.1 to 5 μm. By mixing with the carrier gas, an aerosol containing the particles is generated. Usable carrier gases include inert gases such as Ar, N 2 and He. The metal plate 1 is fixed to the XY stage 37 in the vacuum chamber 35. By depressurizing the vacuum chamber 35 with the vacuum pump 38, a pressure difference is generated between the aerosol generator 33 into which the carrier gas is introduced and the vacuum chamber 35. Due to this pressure difference, the aerosol is sent to the nozzle 36 through the transport pipe 34 and is ejected toward the metal plate 1 from the opening of the nozzle 36 at a high speed. The particles in the aerosol collide with and bond to the metal plate 1. Further, the inorganic material 20 is formed on the metal plate 1 by the continuous collision of the particles and the bonding of the fine particles. The inorganic material 20 is directly formed on the metal plate 1, and the transition region in which the constituent elements of the inorganic material 20 and the metal plate 1 are diffused to each other and the reaction product layer of the inorganic material 20 and the metal plate 1 do not exist at the interface.

無機材料２０には、有機材料を含浸する空隙のある領域２２０と、空隙の無い緻密な領域２１０を形成する。無機材料２０の空隙の有無は、エアロゾル発生器２３に入れる粒子を変えることで制御することができる。空隙の有無に合わせた粒子の選択には、例えば以下に示すような粒子の変形エネルギーを評価することが有効である。変形エネルギーの評価方法に関して、Ａｌ２Ｏ３粒子を例に以下に記す。変形エネルギーの評価には、粒子の圧縮破壊試験を利用する。試験装置の模式図を図４に示す。ステージ４１により、ステージ４１に設置した粒子４２は、加圧圧子４３により試験力を加えたときの粒子４２の変位量を計測する場所４４と、光学顕微鏡４５により粒子４２の形状と径を計測する場所４６の間を移動することができる。試験装置を用いて、直径２０μｍの平面圧子、試験力１００ｍＮ、負荷速度３．８７ｍＮ／ｓｅｃの条件で粒子を圧縮破壊した場合の代表的な荷重変位曲線を図５に示す。図５の塗りつぶしで示す面積は、変形までに粒子に蓄積される弾性エネルギーに相当する。試験前にステージに設置された光学顕微鏡４５で測定した粒子径より求めた粒子体積で、この弾性エネルギーを除することで変形エネルギーと定義し、微粒子評価に用いた。 In the inorganic material 20, a region 220 having a void impregnated with an organic material and a dense region 210 having no void are formed. The presence or absence of voids in the inorganic material 20 can be controlled by changing the particles put into the aerosol generator 23. For selection of particles in accordance with the presence or absence of voids, for example, it is effective to evaluate the deformation energy of particles as shown below. The deformation energy evaluation method will be described below using Al 2 O 3 particles as an example. For the evaluation of deformation energy, a particle compression fracture test is used. A schematic diagram of the test apparatus is shown in FIG. The particle 42 placed on the stage 41 by the stage 41 measures the shape and diameter of the particle 42 by the place 44 where the displacement amount of the particle 42 when the test force is applied by the pressurizing indenter 43 and the optical microscope 45 are measured. You can move between locations 46. FIG. 5 shows a typical load-displacement curve when a particle is subjected to compression fracture under the conditions of a planar indenter having a diameter of 20 μm, a test force of 100 mN, and a load speed of 3.87 mN / sec using a test apparatus. The area shown by filling in FIG. 5 corresponds to the elastic energy accumulated in the particles until deformation. It was defined as deformation energy by dividing this elastic energy by the particle volume obtained from the particle diameter measured with the optical microscope 45 placed on the stage before the test, and used for fine particle evaluation.

粒子の変形エネルギー評価には、市販のＡｌ２Ｏ３粉末を用いた。用いたＡｌ２Ｏ３粉末種は、ＡＭＳ−５０２０Ｆ、ＡＫＰ−２０、ＡＡ−１．５である。各粉末の粒子７個の変形エネルギーを測定し、平均変形エネルギーを評価した。金属板１にＣｕ、搬送ガスにＮ２、ガス流量２Ｌ/ｍｉｎ、開口部１０ｍｍ×０．４ｍｍのノズル３６を使用して成膜した場合、平均変形エネルギーの違いにより得られる無機材料２０の組織が変化する。図６、７に電界放出形走査形電子顕微鏡を用いて無機材料断面を撮影した像により無機材料２０の組織を示す。像の下側がＣｕ板との界面側、像の上側が無機材料２０の表面側である。平均変形エネルギーが７.３×１０−２ｎＪ/μｍ３のＡＭＳ−５０２０Ｆを用いた場合、図６に示すように、緻密で空隙のない無機材料２０を形成できる。一方、平均変形エネルギーが１.２×１０−１ｎＪ/μｍ３のＡＫＰ−２０を用いた場合、図７に示すように、Ｃｕ板界面と平行な方向に幅約０．５μｍ以下、長さ約１〜２０μｍの空隙が、無機材料２０の厚み方向に約１〜３μｍの間隔で形成された無機材料２０を形成できる。しかし、平均変形エネルギーが３．３×１０−１ｎＪ/μｍ３のＡＡ−１．５を用いた場合、約２μｍ以上の厚みの無機材料を形成できなかった。絶縁層２が２μｍ以上必要な場合、変形エネルギーが３．３×１０−１ｎＪ/μｍ３のＡＡ−１．５を使用することはできない。 Commercially available Al 2 O 3 powder was used for the deformation energy evaluation of the particles. The Al 2 O 3 powder types used are AMS-5020F, AKP-20, and AA-1.5. The deformation energy of 7 particles of each powder was measured, and the average deformation energy was evaluated. When the film is formed using Cu on the metal plate 1, N 2 as the carrier gas, a gas flow rate of 2 L / min, and the nozzle 36 having an opening of 10 mm × 0.4 mm, the structure of the inorganic material 20 obtained by the difference in average deformation energy Changes. FIGS. 6 and 7 show the structure of the inorganic material 20 based on images obtained by photographing a cross section of the inorganic material using a field emission scanning electron microscope. The lower side of the image is the interface side with the Cu plate, and the upper side of the image is the surface side of the inorganic material 20. When AMS-5020F having an average deformation energy of 7.3 × 10 −2 nJ / μm 3 is used, a dense inorganic material 20 having no voids can be formed as shown in FIG. On the other hand, when AKP-20 having an average deformation energy of 1.2 × 10 −1 nJ / μm 3 is used, the width is about 0.5 μm or less in the direction parallel to the Cu plate interface, as shown in FIG. The inorganic material 20 in which gaps of about 1 to 20 μm are formed at intervals of about 1 to 3 μm in the thickness direction of the inorganic material 20 can be formed. However, when AA-1.5 having an average deformation energy of 3.3 × 10 −1 nJ / μm 3 was used, an inorganic material having a thickness of about 2 μm or more could not be formed. When the insulating layer 2 needs 2 μm or more, AA-1.5 having a deformation energy of 3.3 × 10 −1 nJ / μm 3 cannot be used.

また、変形エネルギーが低い粒子ほど金属板１への成膜効率が高い。成膜効率とは、金属板１に形成された無機材料２０の重量の金属板１に衝突した粒子重量に対する比であり、成膜効率が高いほど、少ない粒子量で、同じ体積の無機材料２０を形成できることを意味する。表に変形エネルギーと成膜効率の相対値の関係を示す。変形エネルギーの低い粒子、例えば、ＡＭＳ−５０２０Ｆを用いれば、より低コストで無機材料２０を形成できる。   In addition, the lower the deformation energy, the higher the deposition efficiency on the metal plate 1. The film formation efficiency is the ratio of the weight of the inorganic material 20 formed on the metal plate 1 to the weight of the particles colliding with the metal plate 1. The higher the film formation efficiency, the smaller the amount of particles and the same volume of the inorganic material 20. Can be formed. The table shows the relationship between the relative values of deformation energy and film formation efficiency. If particles having a low deformation energy, for example, AMS-5020F are used, the inorganic material 20 can be formed at a lower cost.

Figure 2013143414
Figure 2013143414

本実施例における電子回路基板の製造では、まず緻密で空隙のない無機材料を形成できるＡｌ２Ｏ３粉末、例えば、ＡＭＳ−５０２０Ｆを用いて、金属板１上に空隙の無い緻密な領域２１０を形成する。次に、空隙のある無機材料を形成できるＡｌ２Ｏ３粉末、例えば、ＡＫＰ−２０を用いて、空隙の無い緻密な領域２１０上の一部に、有機材料を含浸する空隙のある領域２２０を形成する。このとき、ＸＹステージ３７を動かし、ノズル３６と金属板１の相対位置を変えることで、空隙の無い緻密な領域２１０と有機材料を含浸する空隙のある領域２２０それぞれの形状と形成箇所を制御できる。 In the manufacture of the electronic circuit board in this example, first, a dense region 210 having no voids is formed on the metal plate 1 by using Al 2 O 3 powder capable of forming a dense inorganic material without voids, for example, AMS-5020F. Form. Next, by using Al 2 O 3 powder capable of forming an inorganic material having voids, for example, AKP-20, a region 220 having voids impregnated with an organic material is partially formed on the dense region 210 without voids. Form. At this time, by moving the XY stage 37 and changing the relative position between the nozzle 36 and the metal plate 1, the shape and location of the dense area 210 without a gap and the area 220 with a gap impregnated with an organic material can be controlled. .

続いて、無機材料２０の空隙に有機材料、例えばエポキシ樹脂を含浸させる過程を説明する。無機材料２０の端部、及び表面にエポキシ樹脂を滴下し塗布すると、有機材料を含浸する空隙のある領域２２０の空隙はエポキシ樹脂で含浸される。エポキシ樹脂塗布後、５〜１０分間放置してから、無機材料２０の端部、及び表面の余分なエポキシ樹脂をスキージ等で除去し、エポキシ樹脂の硬化条件に合わせ、例えば１５０℃で６０分程度保持し、エポキシ樹脂を硬化させる。最後に無機材料２０の端部、及び表面に残り硬化したエポキシ樹脂をサンドペーパー等で除去する。   Next, a process of impregnating the organic material, for example, an epoxy resin into the voids of the inorganic material 20 will be described. When an epoxy resin is dropped and applied to the end portion and the surface of the inorganic material 20, the voids in the region 220 having voids impregnated with the organic material are impregnated with the epoxy resin. After leaving the epoxy resin applied, leave it for 5 to 10 minutes, then remove the edge of the inorganic material 20 and excess epoxy resin on the surface with a squeegee, etc., and match the curing conditions of the epoxy resin, for example, at 150 ° C. for about 60 minutes Hold and cure the epoxy resin. Finally, the edge part of the inorganic material 20 and the cured epoxy resin remaining on the surface are removed with sandpaper or the like.

以上の方法より、有機材料の含浸する空隙が無く無機材料のみからなる無機絶縁部２１と、無機材料の空隙に有機材料の含浸した無機有機絶縁部２２を有する絶縁層２を金属板１に直接形成できる。なお、本実施例では、絶縁層２に、無機材料のみからなる無機絶縁部２１と無機材料の空隙に有機材料が含浸した無機有機混合絶縁部２２が存在し、絶縁層２と導体性配線３の界面の少なくとも一部に無機有機混合絶縁部２２が形成されていれば良く、無機有機混合絶縁部２２の形状、サイズ、個数等は限定されない。   By the above method, the insulating layer 2 having the inorganic insulating portion 21 made of only the inorganic material without the void impregnated with the organic material and the inorganic organic insulating portion 22 impregnated with the organic material in the void of the inorganic material is directly applied to the metal plate 1. Can be formed. In the present embodiment, the insulating layer 2 includes an inorganic insulating portion 21 made of only an inorganic material, and an inorganic / organic mixed insulating portion 22 in which an inorganic material is impregnated with an organic material, and the insulating layer 2 and the conductive wiring 3. It is only necessary that the inorganic / organic mixed insulating portion 22 is formed at least at a part of the interface, and the shape, size, number, and the like of the inorganic / organic mixed insulating portion 22 are not limited.

本実施例における電子回路基板で温度サイクル試験を行った。Ｃｕ板上に、エアロゾルデポジション法で厚み２０μｍのＡｌ２Ｏ３からなる無機材料を形成した。続いて、エポキシ樹脂で空隙を含浸することで、無機絶縁部と無機有機混合絶縁部を有する絶縁層を形成した。絶縁層にはスクリーン印刷で厚み１００μｍのＣｕ配線を形成した。また、従来構造として、Ｃｕ板上に、エアロゾルデポジション法で無機絶縁部のみしか存在しない厚み２０μｍのＡｌ２Ｏ３を形成し、スクリーン印刷で厚み１００μｍのＣｕ配線を形成した電子回路基板も作製した。温度サイクル条件は、温度を−４０℃として３０分保持した後に、１２５℃まで温度を上げて３０分保持し、これを１００サイクル繰り返した。 A temperature cycle test was conducted on the electronic circuit board in this example. An inorganic material made of Al 2 O 3 having a thickness of 20 μm was formed on a Cu plate by an aerosol deposition method. Subsequently, an insulating layer having an inorganic insulating portion and an inorganic-organic mixed insulating portion was formed by impregnating the voids with an epoxy resin. A Cu wiring having a thickness of 100 μm was formed on the insulating layer by screen printing. In addition, as a conventional structure, an electronic circuit board in which 20 μm thick Al 2 O 3 having only an inorganic insulating portion is formed on a Cu plate by an aerosol deposition method and Cu wiring having a thickness of 100 μm is formed by screen printing is also manufactured. did. As temperature cycle conditions, the temperature was kept at −40 ° C. for 30 minutes, then the temperature was raised to 125 ° C. and held for 30 minutes, and this was repeated 100 cycles.

温度サイクル試験後、絶縁層とＣｕ配線の界面を電子スキャン式高速超音波解析装置により観察し、剥離の有無を確認した。絶縁層に無機絶縁部のみしか存在しない従来の電子回路基板では、絶縁層とＣｕ配線の界面に剥離が発生するのに対し、絶縁層に無機材料のみからなる無機絶縁部と無機材料の空隙に有機材料が含浸した無機有機混合絶縁部が存在する本実施例の電子回路基板では、剥離は発生せず、従来構造に比べ、温度サイクル信頼性が向上することを確認した。   After the temperature cycle test, the interface between the insulating layer and the Cu wiring was observed with an electronic scanning high-speed ultrasonic analyzer to confirm the presence or absence of peeling. In the conventional electronic circuit board in which only the inorganic insulating portion is present in the insulating layer, peeling occurs at the interface between the insulating layer and the Cu wiring, whereas in the insulating layer, the gap between the inorganic insulating portion and the inorganic material is made only of the inorganic material. In the electronic circuit board of this example in which the inorganic / organic mixed insulating portion impregnated with the organic material was present, it was confirmed that peeling did not occur and the temperature cycle reliability was improved as compared with the conventional structure.

図８に本実施例における電子回路基板を用いた半導体装置の例を示す。半導体素子５は、接合部材４を介して導体性配線３に接続される。また、接合部材５としては、Ｐｂ−Ｓｎ系、Ｓｎ−Ｃｕ系、Ｓｎ−Ａｇ−Ｃｕ系などのはんだ、Ａｇなどの金属、及び金属フィラー入り樹脂などが挙げられる。半導体素子５上面と導体性配線３はＡｕ、Ａｌなどの金属ワイヤ６により接続される。このとき、導体性配線３を介して半導体素子５が存在する絶縁層２の領域は無機絶縁部２１とすることが望ましい。無機有機混合絶縁部２２は、有機材料を含有するため、熱伝導率が無機絶縁部２１に比べ低い。例えば、無機材料にＡｌ２Ｏ３、有機材料にエポキシ樹脂を用いた場合、熱伝導率はそれぞれ２０Ｗ/（ｍ・Ｋ）、０．２Ｗ/（ｍ・Ｋ）程度である。無機絶縁部２１の熱伝導率はＡｌ２Ｏ３の２０Ｗ/（ｍ・Ｋ）となるのに対し、無機有機混合絶縁部２２の熱伝導率はＡｌ２Ｏ３とエポキシの合成値となるため、１〜２Ｗ/（ｍ・Ｋ）に留まる。導体性配線３を介して半導体素子５が存在する絶縁層２の領域を無機絶縁部２１とすることで、半導体素子５の放熱性を損なうことなく、温度サイクルによる導体性配線３の剥離を抑制することができる。 FIG. 8 shows an example of a semiconductor device using the electronic circuit board in this embodiment. The semiconductor element 5 is connected to the conductive wiring 3 through the bonding member 4. Examples of the bonding member 5 include solders such as Pb—Sn, Sn—Cu, and Sn—Ag—Cu, metals such as Ag, and resins containing metal fillers. The upper surface of the semiconductor element 5 and the conductive wiring 3 are connected by a metal wire 6 such as Au or Al. At this time, it is desirable that the region of the insulating layer 2 where the semiconductor element 5 exists through the conductive wiring 3 is the inorganic insulating portion 21. Since the inorganic-organic mixed insulating part 22 contains an organic material, the thermal conductivity is lower than that of the inorganic insulating part 21. For example, when Al 2 O 3 is used as the inorganic material and epoxy resin is used as the organic material, the thermal conductivities are about 20 W / (m · K) and 0.2 W / (m · K), respectively. The thermal conductivity of the inorganic insulating part 21 is 20 W / (m · K) of Al 2 O 3 , whereas the thermal conductivity of the inorganic / organic mixed insulating part 22 is a composite value of Al 2 O 3 and epoxy. 1 to 2 W / (m · K). By making the region of the insulating layer 2 where the semiconductor element 5 exists through the conductive wiring 3 as the inorganic insulating portion 21, the peeling of the conductive wiring 3 due to the temperature cycle is suppressed without impairing the heat dissipation of the semiconductor element 5. can do.

また、図９に示すように、半導体素子５端部を基点に斜め４５°の領域に無機有機混合絶縁部２２が存在しない構造としてもよい。半導体素子５から発生する熱流束は半導体素子５端部を基点に斜め４５°の角度で拡散すると近似できる。その領域に熱伝導率の低い無機有機混合絶縁部２２が存在しないことで、半導体素子５の放熱性をさらに向上させることができる。   Moreover, as shown in FIG. 9, it is good also as a structure where the inorganic organic mixed insulation part 22 does not exist in the 45 degrees diagonal area | region from the edge part of the semiconductor element 5 as a base point. The heat flux generated from the semiconductor element 5 can be approximated by diffusing at an angle of 45 ° from the end of the semiconductor element 5 as a base point. Since the inorganic / organic mixed insulating portion 22 having a low thermal conductivity does not exist in the region, the heat dissipation of the semiconductor element 5 can be further improved.

以上より、本実施例によれば、絶縁層２を無機絶縁部２１と無機有機混合絶縁部２２とで構成したことにより、無機絶縁部２１により、熱伝導性を確保しつつ、無機有機混合絶縁部２２により、熱膨張係数を導体性配線３に近づけることができ、温度サイクルによる導体性配線３の剥離を効果的に抑制することができる。   As described above, according to the present embodiment, since the insulating layer 2 is composed of the inorganic insulating portion 21 and the inorganic / organic mixed insulating portion 22, the inorganic insulating portion 21 ensures the thermal conductivity and the inorganic / organic mixed insulation. The portion 22 can make the thermal expansion coefficient close to that of the conductive wiring 3, and can effectively suppress the peeling of the conductive wiring 3 due to the temperature cycle.

図１０に本実施例における電子回路基板の模式図を示す。本実施例では、実施例１と比較して、導体性配線３の代わりに金属導体板８が樹脂層７を介して絶縁層２に接着している電子回路基板、及びその電子回路基板を用いた半導体装置の例を説明する。その他構成は、既に説明した図に示された同一の符号を付された構成と、同一の機能を有するので、それらの説明は省略する。   FIG. 10 shows a schematic diagram of an electronic circuit board in the present embodiment. In this embodiment, as compared with the first embodiment, an electronic circuit board in which a metal conductor plate 8 is bonded to the insulating layer 2 through a resin layer 7 instead of the conductive wiring 3, and the electronic circuit board are used. An example of the semiconductor device will be described. The other configurations have the same functions as the configurations denoted by the same reference numerals shown in the already described drawings, and thus the description thereof is omitted.

金属板１に直接形成された絶縁層２に無機絶縁部２１のみしか存在しない従来の電子回路基板では、金属導体板８が樹脂層７を介して絶縁層２に接着した場合、温度サイクルにより、絶縁層２と樹脂層７の界面で剥離が進展し、電子回路基板としての動作が保障されない課題がある。   In a conventional electronic circuit board in which only the inorganic insulating portion 21 exists in the insulating layer 2 directly formed on the metal plate 1, when the metal conductor plate 8 is bonded to the insulating layer 2 through the resin layer 7, due to the temperature cycle, There is a problem that peeling progresses at the interface between the insulating layer 2 and the resin layer 7 and the operation as an electronic circuit board is not guaranteed.

本実施例における電子回路基板では、絶縁層２に無機材料のみからなる無機絶縁部２１と無機材料の空隙に有機材料が含浸した無機有機混合絶縁部２２が存在し、樹脂層７を介して、金属導体板８が接着している。絶縁層２と樹脂層７の界面の少なくとも一部に無機有機混合絶縁部２２を形成することで、温度サイクルによる樹脂層７の剥離を抑制することができる。なお、本実施例では、絶縁層２と樹脂層７の界面の少なくとも一部に無機有機混合絶縁部２２が形成されていれば良く、無機有機混合絶縁部２２の形状、サイズ、個数等は限定されない。   In the electronic circuit board in this example, the insulating layer 2 includes the inorganic insulating portion 21 made of only the inorganic material and the inorganic / organic mixed insulating portion 22 impregnated with the organic material in the voids of the inorganic material. The metal conductor plate 8 is bonded. By forming the inorganic / organic mixed insulating portion 22 at least at a part of the interface between the insulating layer 2 and the resin layer 7, it is possible to suppress peeling of the resin layer 7 due to a temperature cycle. In this embodiment, it is sufficient that the inorganic / organic mixed insulating portion 22 is formed at least at a part of the interface between the insulating layer 2 and the resin layer 7, and the shape, size, number, and the like of the inorganic / organic mixed insulating portion 22 are limited. Not.

金属導体板８は、Ａｌ合金、Ｃｕ合金などからなる金属板である。金属導体板８の表面は、防錆のためのめっき処理、樹脂層７との接着力向上のための粗面化処理、酸化処理等の表面処理がされていても良い。樹脂層７の樹脂としては、エポキシ樹脂、フェノール樹脂、フッ素系樹脂、シリコン樹脂、ポリイミド樹脂、ポリアミドイミド樹脂などが挙げられる。樹脂層７の塗布方法として、スクリーン印刷法、インクジェット法、ロールコーター法、ディスペンサー法など従来公知のいずれの方法も使用できる。また、樹脂層７は、絶縁層２と金属導体板８の間にシート状の樹脂を設置し熱圧着により接着させることで形成してもよい。所望の厚みをもつシートを用いることで、樹脂層７の厚み制御が容易になる。また、樹脂層７は、Ａｌ２Ｏ３、ＡｌＮ、ＳｉＯ２、Ａｇ、Ｃｕ、Ａｌ、Ａｕなどの無機粒子をフィラーとして含有してもよい。無機粒子を含有することで、樹脂層７の熱伝導率が向上する。 The metal conductor plate 8 is a metal plate made of Al alloy, Cu alloy or the like. The surface of the metal conductor plate 8 may be subjected to a surface treatment such as a plating treatment for rust prevention, a roughening treatment for improving the adhesive strength with the resin layer 7, or an oxidation treatment. Examples of the resin of the resin layer 7 include an epoxy resin, a phenol resin, a fluorine resin, a silicon resin, a polyimide resin, and a polyamideimide resin. As a coating method of the resin layer 7, any conventionally known method such as a screen printing method, an ink jet method, a roll coater method, a dispenser method can be used. Alternatively, the resin layer 7 may be formed by installing a sheet-like resin between the insulating layer 2 and the metal conductor plate 8 and bonding them by thermocompression bonding. By using a sheet having a desired thickness, it is easy to control the thickness of the resin layer 7. Moreover, the resin layer 7 may contain inorganic particles such as Al 2 O 3 , AlN, SiO 2 , Ag, Cu, Al, and Au as fillers. By containing inorganic particles, the thermal conductivity of the resin layer 7 is improved.

本実施例における電子回路基板で温度サイクル試験を行った。実施例１に記載した方法と同様に、Ｃｕ板上にエアロゾルデポジション法で厚み５０μｍのＡｌ２Ｏ３からなる無機材料を形成した。続いて、エポキシ樹脂で空隙を含浸することで、無機絶縁部と無機有機混合絶縁部を有する絶縁層を形成した。更に樹脂層として、Ａｌ２Ｏ３粒子を含有したエポキシ樹脂を用いて、厚み１ｍｍのＣｕ板と絶縁層を接着させた。また、従来構造として、Ｃｕ板上に、エアロゾルデポジション法で無機絶縁部のみしか存在しない厚み５０μｍのＡｌ２Ｏ３を形成し、Ａｌ２Ｏ３粒子を含有したエポキシ樹脂を用いて、厚み１ｍｍのＣｕ板と接着させた電子回路基板も作製した。温度サイクル条件は、温度を−４０℃として３０分保持した後に、１２５℃まで温度を上げて３０分保持し、これを１００サイクル繰り返した。 A temperature cycle test was conducted on the electronic circuit board in this example. Similar to the method described in Example 1, an inorganic material composed of Al 2 O 3 having a thickness of 50 μm was formed on a Cu plate by an aerosol deposition method. Subsequently, an insulating layer having an inorganic insulating portion and an inorganic-organic mixed insulating portion was formed by impregnating the voids with an epoxy resin. Further, an epoxy resin containing Al 2 O 3 particles was used as a resin layer, and a 1 mm thick Cu plate and an insulating layer were adhered. In addition, as a conventional structure, 50 μm thick Al 2 O 3 having only an inorganic insulating portion is formed on a Cu plate by an aerosol deposition method, and using an epoxy resin containing Al 2 O 3 particles, the thickness is 1 mm. An electronic circuit board bonded to the Cu plate was also prepared. As temperature cycle conditions, the temperature was kept at −40 ° C. for 30 minutes, then the temperature was raised to 125 ° C. and held for 30 minutes, and this was repeated 100 cycles.

温度サイクル試験後、絶縁層と樹脂層の界面を電子スキャン式高速超音波解析装置により観察し、剥離の有無を確認した。絶縁層に無機絶縁部のみしか存在しない従来の電子回路基板では、絶縁層と樹脂層の界面に剥離が発生するのに対し、絶縁層に無機材料のみからなる無機絶縁部と無機材料の空隙に有機材料が含浸した無機有機混合絶縁部が存在する本実施例の電子回路基板では、絶縁層と樹脂層の界面に剥離は発生せず、従来構造に比べ、温度サイクル信頼性が向上することを確認した。   After the temperature cycle test, the interface between the insulating layer and the resin layer was observed with an electronic scanning high-speed ultrasonic analyzer to confirm the presence or absence of peeling. In the conventional electronic circuit board in which only the inorganic insulating portion is present in the insulating layer, peeling occurs at the interface between the insulating layer and the resin layer, whereas in the insulating layer, the gap between the inorganic insulating portion and the inorganic material is made of only the inorganic material. In the electronic circuit board of this example in which an inorganic-organic mixed insulating part impregnated with an organic material is present, no peeling occurs at the interface between the insulating layer and the resin layer, and the temperature cycle reliability is improved compared to the conventional structure. confirmed.

図１１に本実施例における電子回路基板を用いた半導体装置の例を説明する。電子回路基板が、樹脂層７を介して、絶縁層２と金属導体板８を接着する構造により、大電流を扱うＩＧＢＴなどのパワー半導体を搭載した半導体装置に適用できる。半導体素子５は、接合部材４を介して金属導体板８に接続される。半導体素子５としては、スイッチング動作によって直流電流を交流電流に変換するＩＧＢＴなどのパワー半導体素子やこれらのパワー半導体素子を制御するための制御回路用半導体素子が挙げられる。また、接合部材４としては、Ｐｂ−Ｓｎ系、Ｓｎ−Ｃｕ系、Ｓｎ−Ａｇ−Ｃｕ系などのはんだ、Ａｇなどの金属、及び金属フィラー入り樹脂などが挙げられる。半導体素子５上面と金属導体板８はＡｌなどの金属ワイヤ６により接続される。金属導体板８には外部接続端子９が接続される。金属板１の周囲には樹脂ケース１０が接着され、絶縁性ゲル剤などの封止剤１１が内部に充填される。   FIG. 11 illustrates an example of a semiconductor device using an electronic circuit board in this embodiment. The electronic circuit board can be applied to a semiconductor device on which a power semiconductor such as an IGBT that handles a large current is mounted due to the structure in which the insulating layer 2 and the metal conductor plate 8 are bonded via the resin layer 7. The semiconductor element 5 is connected to the metal conductor plate 8 through the bonding member 4. Examples of the semiconductor element 5 include a power semiconductor element such as an IGBT that converts a direct current into an alternating current by a switching operation, and a control circuit semiconductor element for controlling these power semiconductor elements. Examples of the bonding member 4 include solders such as Pb—Sn, Sn—Cu, and Sn—Ag—Cu, metals such as Ag, and resins containing metal fillers. The upper surface of the semiconductor element 5 and the metal conductor plate 8 are connected by a metal wire 6 such as Al. External connection terminals 9 are connected to the metal conductor plate 8. A resin case 10 is adhered to the periphery of the metal plate 1 and a sealing agent 11 such as an insulating gel agent is filled therein.

本実施例における絶縁層２の絶縁特性を、短時間昇圧法により測定した絶縁破壊電圧で評価した。Ｃｕ板上にエアロゾルデポジション法で厚み５０μｍのＡｌ２Ｏ３からなる無機材料を形成し、続いて、エポキシ樹脂で空隙を含浸することで、無機絶縁部と無機有機混合絶縁部を有する絶縁層を形成した。絶縁破壊電圧は５０〜４００Ｖ/μｍであった。半導体素子５としては、スイッチング動作によって直流電流を交流電流に変換するＩＧＢＴなどのパワー半導体素子やこれらのパワー半導体素子を制御するための制御回路用半導体素子を用いる場合、必要とされる絶縁電圧は２〜１５ｋＶであり、絶縁層２の絶縁破壊電圧値から、絶縁層２に必要な厚みは５〜３００μｍ程度である。 The insulating characteristics of the insulating layer 2 in this example were evaluated by a dielectric breakdown voltage measured by a short-time voltage boosting method. An insulating material having an inorganic insulating portion and an inorganic / organic mixed insulating portion is formed by forming an inorganic material made of Al 2 O 3 having a thickness of 50 μm on a Cu plate by an aerosol deposition method and then impregnating the voids with an epoxy resin. Formed. The dielectric breakdown voltage was 50 to 400 V / μm. When the semiconductor element 5 is a power semiconductor element such as an IGBT that converts a direct current to an alternating current by a switching operation or a control circuit semiconductor element for controlling these power semiconductor elements, the required insulation voltage is From the dielectric breakdown voltage value of the insulating layer 2, the necessary thickness for the insulating layer 2 is about 5 to 300 μm.

図１２に示すように、金属板１の冷却面以外をモールド樹脂１２により封止しても良い。モールド樹脂１２により封止することで、金属ワイヤ７と半導体素子６の接続部における応力集中が緩和されるため、金属ワイヤ７の剥離を抑止でき、半導体装置のパワーサイクル寿命が向上する。   As shown in FIG. 12, portions other than the cooling surface of the metal plate 1 may be sealed with a mold resin 12. By sealing with the mold resin 12, stress concentration at the connection portion between the metal wire 7 and the semiconductor element 6 is alleviated, so that peeling of the metal wire 7 can be suppressed and the power cycle life of the semiconductor device is improved.

図１３に示すように、金属板１は、半導体素子５の一面側のみに設置されている必要ななく、金属板１が半導体素子５の両面に設置されていても良い。半導体素子５の両面に金属板１を設置することで、半導体素子５の放熱面積が増加するため、金属板１を半導体素子の一方に設置した構造に比べ、放熱性が向上する。   As shown in FIG. 13, the metal plate 1 does not need to be installed only on one side of the semiconductor element 5, and the metal plate 1 may be installed on both sides of the semiconductor element 5. By disposing the metal plate 1 on both sides of the semiconductor element 5, the heat dissipation area of the semiconductor element 5 is increased. Therefore, heat dissipation is improved as compared with the structure in which the metal plate 1 is disposed on one side of the semiconductor element.

図１４に示すように、２つの金属板１が金属部材１３により接合され、ＣＡＮ型の形状をなしていても良い。ＣＡＮ型の構造を成すことで、半導体装置を冷却媒体が流れる流路内に挿しても、開口から端子を突出させることができるとともに、簡易な構造で冷却媒体が半導体装置内部に侵入することを防ぐことができる。   As shown in FIG. 14, two metal plates 1 may be joined by a metal member 13 to form a CAN shape. By forming a CAN-type structure, even if the semiconductor device is inserted into the flow path through which the cooling medium flows, the terminal can protrude from the opening, and the cooling medium can enter the semiconductor device with a simple structure. Can be prevented.

以上より、本実施例によれば、実施例１と同様の効果を得ることができ、さらに、樹脂層７を用いたため、金属導体板８と金属板５との絶縁特性をより向上させることができる。   As described above, according to the present embodiment, the same effects as those of the first embodiment can be obtained, and furthermore, since the resin layer 7 is used, the insulation characteristics between the metal conductor plate 8 and the metal plate 5 can be further improved. it can.

なお、本発明は上記した実施例に限定されるものではなく、様々な変形例が含まれる。例えば、上記した実施例は本発明を分かりやすく説明するために詳細に説明したものであり、必ずしも説明した全ての構成を備えるものに限定されるものではない。また、ある実施例の構成の一部を他の実施例の構成に置き換えることが可能であり、また、ある実施例の構成に他の実施例の構成を加えることも可能である。また、各実施例の構成の一部について、他の構成の追加・削除・置換をすることが可能である。   In addition, this invention is not limited to an above-described Example, Various modifications are included. For example, the above-described embodiments have been described in detail for easy understanding of the present invention, and are not necessarily limited to those having all the configurations described. Further, a part of the configuration of one embodiment can be replaced with the configuration of another embodiment, and the configuration of another embodiment can be added to the configuration of one embodiment. Further, it is possible to add, delete, and replace other configurations for a part of the configuration of each embodiment.

１ 金属板
２ 絶縁層
２１ 無機絶縁部
２２ 無機有機混合絶縁部
２０ 無機材料
２１０ 空隙のない緻密な領域
２２０ 有機材料を含浸する空隙のある領域
３ 導体性配線
４ 接合部材
５ 半導体素子
６ 金属ワイヤ
７ 樹脂層
８ 金属導体板
９ 外部接続端子
１０ 樹脂ケース
１１ 封止材
１２ モールド樹脂
１３ 金属部材
３１ 高圧ガスボンベ
３２、３４ 搬送管
３３ エアロゾル発生器
３５ 真空チャンバー
３６ ノズル
３７ ＸＹステージ
３８ 真空ポンプ
４１ ステージ
４２ 粒子
４３ 加圧圧子
４４ 粒子の変位量を計測する場所
４５ 光学顕微鏡
４６ 粒子の形状と径を計測する場所 DESCRIPTION OF SYMBOLS 1 Metal plate 2 Insulating layer 21 Inorganic insulating part 22 Inorganic organic mixed insulating part 20 Inorganic material 210 Dense area | region 220 without a space | gap 3 Area | region with the space | gap impregnated with an organic material 3 Conductive wiring 4 Joining member 5 Semiconductor element 6 Metal wire 7 Resin layer 8 Metal conductor plate 9 External connection terminal 10 Resin case 11 Sealing material 12 Mold resin 13 Metal member 31 High-pressure gas cylinder 32, 34 Transport pipe 33 Aerosol generator 35 Vacuum chamber 36 Nozzle 37 XY stage 38 Vacuum pump 41 Stage 42 Particles 43 Pressure indenter 44 Place for measuring the amount of particle displacement 45 Optical microscope 46 Place for measuring the shape and diameter of the particle

Claims (17)

金属板と、
前記金属板に形成された絶縁層と、
前記絶縁層に形成された導体性配線を備え、
前記絶縁層は無機材料からなる無機絶縁部と無機材料の空隙に有機材料を含有する無機有機混合絶縁部とを有し、前記絶縁層と前記導体性配線の界面の少なくとも一部に無機有機混合絶縁部が形成されたことを特徴とする電子回路基板。 A metal plate,
An insulating layer formed on the metal plate;
Comprising conductive wiring formed in the insulating layer;
The insulating layer has an inorganic insulating portion made of an inorganic material and an inorganic / organic mixed insulating portion containing an organic material in a gap between the inorganic materials, and an inorganic / organic mixed material is mixed at least at a part of the interface between the insulating layer and the conductive wiring. An electronic circuit board having an insulating portion formed thereon. 請求項１に記載の電子回路基板であって、
前記導体性配線の端部の少なくとも一部が前記無機有機混合絶縁部に形成されたことを特徴とする電子回路基板。 The electronic circuit board according to claim 1,
An electronic circuit board, wherein at least a part of an end portion of the conductive wiring is formed in the inorganic / organic mixed insulating portion. 請求項１または２に記載の電子回路基板であって、
前記無機有機混合絶縁部に含有される有機材料が無機粒子を含有することを特徴とする電子回路基板。 The electronic circuit board according to claim 1 or 2,
An electronic circuit board, wherein the organic material contained in the inorganic / organic mixed insulating part contains inorganic particles. 請求項１乃至３のいずれかに記載の電子回路基板であって、
前記絶縁層がＡｌ２Ｏ３を含むことを特徴とする電子回路基板。 An electronic circuit board according to any one of claims 1 to 3,
An electronic circuit board, wherein the insulating layer contains Al 2 O 3 . 請求項１乃至４のいずれかに記載の電子回路基板の前記導体性配線と接合部材によって接続された半導体素子を備えることを特徴とする半導体装置。   5. A semiconductor device comprising a semiconductor element connected to the conductive wiring of the electronic circuit board according to claim 1 by a bonding member. 請求項５に記載の半導体装置であって、前記半導体素子と前記金属板との間にある前記絶縁層の領域は、前記無機絶縁部からなることを特徴とする半導体装置。   6. The semiconductor device according to claim 5, wherein a region of the insulating layer between the semiconductor element and the metal plate is formed of the inorganic insulating portion. 金属板と、
前記金属板に形成された絶縁層と、
前記絶縁層に樹脂層を介して形成された金属導体板を備え、
前記絶縁層は無機材料からなる無機絶縁部と無機材料の空隙に有機材料を含有する無機有機混合絶縁部とを有し、前記絶縁層と前記樹脂層の界面の少なくとも一部に前記無機有機混合絶縁部が形成されたことを特徴とする電子回路基板。 A metal plate,
An insulating layer formed on the metal plate;
A metal conductor plate formed on the insulating layer via a resin layer,
The insulating layer has an inorganic insulating portion made of an inorganic material and an inorganic / organic mixed insulating portion containing an organic material in a void of the inorganic material, and the inorganic / organic mixed material is at least part of an interface between the insulating layer and the resin layer. An electronic circuit board having an insulating portion formed thereon. 請求項７に記載の電子回路基板であって、
前記樹脂層の端部の少なくとも一部が前記無機有機混合絶縁部で形成されたことを特徴とする電子回路基板。 The electronic circuit board according to claim 7,
An electronic circuit board, wherein at least a part of an end portion of the resin layer is formed of the inorganic-organic mixed insulating portion. 請求項７または８に記載の電子回路基板であって、
前記無機有機混合絶縁部に含有される有機材料が無機粒子を含有することを特徴とする電子回路基板。 The electronic circuit board according to claim 7 or 8,
An electronic circuit board, wherein the organic material contained in the inorganic / organic mixed insulating part contains inorganic particles. 請求項７乃至９のいずれかに記載の電子回路基板であって、
前記絶縁層がＡｌ２Ｏ３を含むことを特徴とする電子回路基板。 An electronic circuit board according to any one of claims 7 to 9,
An electronic circuit board, wherein the insulating layer contains Al 2 O 3 . 請求項７乃至１０のいずれかに記載の電子回路基板であって、
前記絶縁層の厚みが５〜３００μｍであることを特徴とする電子回路基板。 An electronic circuit board according to any one of claims 7 to 10,
The thickness of the said insulating layer is 5-300 micrometers, The electronic circuit board characterized by the above-mentioned. 請求項７乃至１１のいずれかに記載の電子回路基板と、前記金属導体板と接合部材によって接続された半導体素子を備えることを特徴とする半導体装置。   12. A semiconductor device comprising: the electronic circuit board according to claim 7; and a semiconductor element connected to the metal conductor plate by a bonding member. 請求項１２に記載の半導体装置であって、
前記樹脂層、前記半導体素子と前記金属板との間にある前記絶縁層の領域は、前記無機絶縁部からなることを特徴とする半導体装置。 The semiconductor device according to claim 12,
A region of the insulating layer between the resin layer, the semiconductor element, and the metal plate is formed of the inorganic insulating portion. エアロゾルデポジション法により金属板に無機材料を有する絶縁層を形成する工程と、
前記絶縁層の前記無機材料の空隙に有機材料を含浸する工程と、
前記絶縁層に導体性配線を形成する工程を有することを特徴とする電子回路基板の製造方法。 Forming an insulating layer having an inorganic material on a metal plate by an aerosol deposition method;
Impregnating the voids of the inorganic material of the insulating layer with an organic material;
A method of manufacturing an electronic circuit board, comprising: forming a conductive wiring on the insulating layer. 請求項１４に記載の電子回路基板の製造方法であって、
エアロゾルデポジション法により前記金属板に無機材料を有する絶縁層を形成する工程が、前記金属板に有機材料が含浸する空隙のない無機材料を形成する工程と、前記空隙のない緻密な無機材料に有機材料が含浸する空隙のある無機材料を形成する工程を有することを特徴とする電子回路基板の製造方法。 A method of manufacturing an electronic circuit board according to claim 14,
The step of forming an insulating layer having an inorganic material on the metal plate by an aerosol deposition method includes the step of forming an inorganic material without voids impregnated with an organic material on the metal plate, and a dense inorganic material without voids. A method for manufacturing an electronic circuit board, comprising the step of forming an inorganic material having voids impregnated with an organic material. エアロゾルデポジション法により金属板に無機材料を有する絶縁層を形成する工程と、
前記絶縁層の前記無機材料の空隙に有機材料を含浸する工程と、
絶縁層に樹脂層を介して前記金属導体板を接着する工程を有することを特徴とする電子回路基板の製造方法。 Forming an insulating layer having an inorganic material on a metal plate by an aerosol deposition method;
Impregnating the voids of the inorganic material of the insulating layer with an organic material;
A method for manufacturing an electronic circuit board, comprising the step of adhering the metal conductor plate to an insulating layer through a resin layer. 請求項１６に記載の電子回路基板の製造方法であって、
エアロゾルデポジション法により前記金属板に前記無機材料を形成する工程が、前記金属板に前記有機材料が含浸する空隙のない無機材料を形成する工程と、前記空隙のない無機材料に有機材料が含浸する空隙のある無機材料を形成する工程を有することを特徴とする電子回路基板の製造方法。 A method of manufacturing an electronic circuit board according to claim 16,
The step of forming the inorganic material on the metal plate by an aerosol deposition method, the step of forming an inorganic material without voids impregnated with the organic material on the metal plate, and the impregnation of the inorganic material without voids with the organic material A method for producing an electronic circuit board, comprising the step of forming an inorganic material having voids.
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