JP5759744B2 - Power module and manufacturing method thereof - Google Patents

Power module and manufacturing method thereof Download PDF

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Publication number
JP5759744B2
JP5759744B2 JP2011034100A JP2011034100A JP5759744B2 JP 5759744 B2 JP5759744 B2 JP 5759744B2 JP 2011034100 A JP2011034100 A JP 2011034100A JP 2011034100 A JP2011034100 A JP 2011034100A JP 5759744 B2 JP5759744 B2 JP 5759744B2
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Prior art keywords
power module
semiconductor chip
electrode
conductor pattern
film
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JP2011034100A
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Japanese (ja)
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JP2012084835A (en
Inventor
和明 直江
和明 直江
桂司 佐藤
桂司 佐藤
日吉　道明
道明 日吉
中村　真人
真人 中村
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Hitachi Ltd
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Hitachi Ltd
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Priority to JP2011034100A priority Critical patent/JP5759744B2/en
Priority to PCT/JP2011/002346 priority patent/WO2012035680A1/en
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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Dispersion Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Materials Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Description

本発明は、パワーモジュール及びその製造方法に関する。   The present invention relates to a power module and a manufacturing method thereof.

特許文献１、特許文献２等には、絶縁基板に導体パターンを形成し、導体パターン上に半導体チップを接合部材で接続し、半導体チップ上面に形成された電極に電極と導体パターンとを接続する金属ワイヤを結んだパワーモジュールにおいて、例えば、エポキシ樹脂、フェノール樹脂、ポリイミド樹脂等の熱硬化性樹脂や上記熱硬化性樹脂にアルミナ、シリカ等の無機粒子を含有させた絶縁体を導体パターン端部に被覆する方法が記載されている。   In Patent Document 1, Patent Document 2, and the like, a conductor pattern is formed on an insulating substrate, a semiconductor chip is connected to the conductor pattern with a bonding member, and an electrode and the conductor pattern are connected to an electrode formed on the upper surface of the semiconductor chip. In a power module with a metal wire, for example, a thermosetting resin such as an epoxy resin, a phenol resin, or a polyimide resin, or an insulator in which inorganic particles such as alumina or silica are contained in the thermosetting resin is provided at the end of the conductor pattern. Describes the method of coating.

特開平８−５１１７０号公報JP-A-8-51170 特開平１１−２９７８６９号公報JP 11-297869 A

パワーモジュールの動作信頼性を阻害する要因の一つにパワーモジュール内部での部分放電の発生がある。特許文献１、特許文献２では、部分放電を抑制するために、導体パターン端部を樹脂で被覆している。しかし、樹脂は被覆する際の膜厚制御が難しく、導体パターン端部に絶縁体を均一に被覆できないため、製品ごとで部分放電抑止効果が大きくばらつく。樹脂による被覆だけでは、部分放電抑止が不十分であるため、パワーモジュールの動作信頼性を確保するためには絶縁沿面距離を大きく設定せざるを得ない。そのため、モジュール設計の自由度が低く、モジュール小型化を阻害する要因になっている。   One of the factors hindering the operation reliability of the power module is the occurrence of partial discharge inside the power module. In patent document 1 and patent document 2, in order to suppress partial discharge, the conductor pattern edge part is coat | covered with resin. However, since it is difficult to control the film thickness when the resin is coated and the insulator cannot be uniformly coated on the end portion of the conductor pattern, the partial discharge suppression effect varies greatly from product to product. Since the partial discharge suppression is insufficient only by coating with the resin, the insulation creepage distance must be set large in order to ensure the operational reliability of the power module. Therefore, the degree of freedom in module design is low, which is a factor that hinders downsizing of the module.

また、パワーモジュールの駆動時には、半導体チップが発熱と冷却を繰り返す。金属ワイヤと半導体チップとの熱膨張率の差に応じた熱応力が電極と金属ワイヤの接合部に発生し、電極と金属ワイヤの接合部において亀裂が進展し、剥離が生じる可能性があり、信頼性の向上が必要であった。 Further, when the power module is driven, the semiconductor chip repeatedly generates heat and cools. Thermal stress corresponding to the difference in coefficient of thermal expansion between the metal wire and the semiconductor chip is generated at the joint between the electrode and the metal wire, cracks may develop at the joint between the electrode and the metal wire, and peeling may occur. It was necessary to improve reliability.

上記問題点に鑑み本発明では、効果的に部分放電を抑止できる絶縁膜を被覆することで、パワーモジュールの動作信頼性を向上させるとともに、絶縁沿面距離を小さくすることによるパワーモジュールの小型化が可能になる技術を提供することを目的とする。   In view of the above problems, the present invention improves the operational reliability of the power module by coating an insulating film that can effectively suppress partial discharge, and reduces the size of the power module by reducing the insulation creepage distance. The aim is to provide technology that becomes possible.

また、他の観点における本発明では、電極と金属ワイヤの接合部を補強することで、動作の信頼性を確保する技術を提供することを目的とする。   Moreover, it aims at providing the technique which ensures the reliability of operation | movement by reinforcing the junction part of an electrode and a metal wire in this invention in another viewpoint.

上記課題を解決するため、本発明は、絶縁基板と、前記絶縁基板上に形成された導体パターンと、前記導体パターンと接合部材により接続された半導体チップと、前記半導体チップ上面に形成された電極と、前記電極と、前記半導体チップと、前記接合部材と、前記導体パターンと、前記絶縁基板の表面とを被覆し、無機材料からなる絶縁膜とを備えることを特徴とするパワーモジュールを提供する。   In order to solve the above problems, the present invention provides an insulating substrate, a conductor pattern formed on the insulating substrate, a semiconductor chip connected to the conductor pattern by a bonding member, and an electrode formed on the upper surface of the semiconductor chip. And a power module comprising: an insulating film made of an inorganic material that covers the electrode, the semiconductor chip, the bonding member, the conductor pattern, and a surface of the insulating substrate. .

また、他の観点における本発明は、絶縁基板と、前記絶縁基板上に形成された導体パターンと、前記導体パターンと接合部材により接続された半導体チップと、前記半導体チップ上面に形成された電極と、前記電極と前記導体パターンとを接続する金属ワイヤと、前記金属ワイヤと前記電極の接合部の少なくとも一部を被覆する無機材料からなる無機膜とを備えることを特徴とするパワーモジュールを提供する。   In another aspect, the present invention provides an insulating substrate, a conductor pattern formed on the insulating substrate, a semiconductor chip connected to the conductor pattern by a bonding member, and an electrode formed on the upper surface of the semiconductor chip. A power module comprising: a metal wire that connects the electrode and the conductor pattern; and an inorganic film made of an inorganic material that covers at least a part of a joint between the metal wire and the electrode. .

本発明によれば、効果的に部分放電を抑止できる絶縁膜を被覆することで、パワーモジュールの動作信頼性が向上するとともに、絶縁沿面距離を小さくすることによるパワーモジュールの小型化が可能となる。   According to the present invention, the operation reliability of the power module is improved by covering the insulating film that can effectively suppress the partial discharge, and the power module can be reduced in size by reducing the insulation creepage distance. .

また、他の観点における本発明によれば、電極と金属ワイヤの接合部を補強することで、動作の信頼性を確保することができる。   Further, according to the present invention in another aspect, the operation reliability can be ensured by reinforcing the joint between the electrode and the metal wire.

実施例１によるパワーモジュールの模式平面図。1 is a schematic plan view of a power module according to Embodiment 1. FIG. 図１の断面Ａにおける模式断面図。The schematic cross section in the cross section A of FIG. 実施例１の変形例を示すパワーモジュールの模式図。The schematic diagram of the power module which shows the modification of Example 1. FIG. 実施例１の変形例を示すパワーモジュールの模式図。The schematic diagram of the power module which shows the modification of Example 1. FIG. 実施例１の変形例を示すパワーモジュールの模式図。The schematic diagram of the power module which shows the modification of Example 1. FIG. 実施例１の変形例を示すパワーモジュールの模式図。The schematic diagram of the power module which shows the modification of Example 1. FIG. 実施例１によるパワーモジュールの模式断面図。1 is a schematic cross-sectional view of a power module according to Embodiment 1. FIG. エアロゾルデポジション装置の構成説明図。The explanatory view of composition of an aerosol deposition device. 図４の断面Ｂにおける断面ＳＥＭ画像。FIG. 5 is a cross-sectional SEM image in cross section B of FIG. 4. 図４の断面Ｃにおける断面ＳＥＭ画像。Sectional SEM image in the cross section C of FIG. 実施例１のパワーモジュールの絶縁特性を従来構造のそれと比較した結果を示す図。The figure which shows the result of having compared the insulation characteristic of the power module of Example 1 with that of the conventional structure. 実施例２によるパワーモジュールの模式断面図。FIG. 4 is a schematic cross-sectional view of a power module according to a second embodiment. 従来構造のパワーモジュールの模式断面図。The schematic cross section of the power module of conventional structure. 実施例４によるパワーモジュールの模式平面図。FIG. 6 is a schematic plan view of a power module according to a fourth embodiment. 図１１の断面Ｄにおける模式断面図。The schematic cross section in the cross section D of FIG. 図１１の断面Ｅにおける模式断面図。The schematic cross section in the cross section E of FIG. 実施例４の変形例を示すパワーモジュールの模式図。FIG. 10 is a schematic diagram of a power module showing a modification of the fourth embodiment. 実施例４の変形例を示すパワーモジュールの模式図。FIG. 10 is a schematic diagram of a power module showing a modification of the fourth embodiment. 実施例４によるパワーモジュールの断面ＳＥＭ像。4 is a cross-sectional SEM image of a power module according to Example 4. FIG. 図１４の拡大ＳＥＭ像。The enlarged SEM image of FIG. 実施例５によるパワーモジュールの模式平面図。FIG. 6 is a schematic plan view of a power module according to a fifth embodiment.

図１０は、従来におけるパワーモジュールの模式断面図である。図１０に示すように、絶縁基板１に導体パターン２を形成し、導体パターン２上に半導体チップ４を接合部材３ａで接続し、半導体チップ４上面に形成された電極５に金属ワイヤ９を結んでいる。絶縁基板１の導体パターン形成面の裏面に形成された接地電極７は金属製の放熱板８と接合部材３ｂにより接合される。放熱板８の外周に設置されたケース１０の内部に絶縁性ゲル剤１１を流し込み封止している。   FIG. 10 is a schematic cross-sectional view of a conventional power module. As shown in FIG. 10, a conductor pattern 2 is formed on an insulating substrate 1, a semiconductor chip 4 is connected to the conductor pattern 2 by a bonding member 3a, and a metal wire 9 is connected to an electrode 5 formed on the upper surface of the semiconductor chip 4. It is out. The ground electrode 7 formed on the back surface of the conductive pattern forming surface of the insulating substrate 1 is bonded to the metal heat sink 8 and the bonding member 3b. An insulating gel agent 11 is poured into the case 10 installed on the outer periphery of the heat sink 8 and sealed.

パワーモジュールの動作信頼性を阻害する要因の一つにパワーモジュール内部での部分放電の発生がある。動作時のパワーモジュールでは、導体パターン２や電極５と接地された放熱板８の間に数ｋＶの電位差が存在するため、パワーモジュール内部の絶縁特性が不十分であると、導体パターンや電極と放熱板間に部分放電が発生する。パワーモジュール動作時に部分放電が発生するとパワーモジュールとしての性能が得られないだけでなく、部分放電を繰り返すことで絶縁破壊も招く。そのため、十分な絶縁特性を保証する設計を施すことで部分放電を抑止する必要がある。絶縁特性の向上を実現する手段としては、放熱板と導体パターン間、または導体パターン間の絶縁沿面距離を大きく設定することが一般的に知られている。   One of the factors hindering the operation reliability of the power module is the occurrence of partial discharge inside the power module. In the power module during operation, a potential difference of several kV exists between the conductor pattern 2 or the electrode 5 and the grounded heat sink 8, and therefore, if the insulation characteristics inside the power module are insufficient, the conductor pattern or electrode Partial discharge occurs between the heat sinks. If partial discharge occurs during operation of the power module, not only the performance as a power module is not obtained, but also dielectric breakdown is caused by repeating partial discharge. Therefore, it is necessary to suppress partial discharge by applying a design that ensures sufficient insulation characteristics. As a means for realizing improvement in insulation characteristics, it is generally known to set a large insulation creepage distance between a heat sink and a conductor pattern or between conductor patterns.

しかし、導体パターンや半導体チップに付着した金属異物、導体パターン形成時にできた絶縁基板上の金属残渣などの表面汚染が存在すると、動作電圧に対して絶縁沿面距離を十分に設定しても、表面汚染を経由して部分放電が発生する場合がある。   However, if there is surface contamination such as metal foreign matter adhering to the conductor pattern or semiconductor chip, metal residue on the insulating substrate formed when the conductor pattern is formed, even if the insulation creepage distance is sufficiently set for the operating voltage, the surface Partial discharge may occur via contamination.

そこで、特許文献１、２に示すように部分放電を抑制するために、導体パターン端部を樹脂で被覆し絶縁特性を向上させる方法が考案されている。   Therefore, as shown in Patent Documents 1 and 2, in order to suppress partial discharge, a method has been devised in which the end of the conductor pattern is covered with a resin to improve the insulation characteristics.

しかし、樹脂は被覆する際の膜厚制御が難しく、導体パターン端部に絶縁体を均一に被覆できないため、製品ごとで部分放電抑止効果が大きくばらつく。樹脂による被覆だけでは、部分放電抑止が不十分であるため、パワーモジュールの動作信頼性を確保するためには絶縁沿面距離を大きく設定せざるを得ない。そのため、モジュール設計の自由度が低く、モジュール小型化を阻害する要因になっている。   However, since it is difficult to control the film thickness when the resin is coated and the insulator cannot be uniformly coated on the end portion of the conductor pattern, the partial discharge suppression effect varies greatly from product to product. Since the partial discharge suppression is insufficient only by coating with the resin, the insulation creepage distance must be set large in order to ensure the operational reliability of the power module. Therefore, the degree of freedom in module design is low, which is a factor that hinders downsizing of the module.

以下、そこで、上記問題点に鑑みなされた本発明に係る各実施例について、図面を用いて説明する。   Hereinafter, each embodiment according to the present invention made in view of the above problems will be described with reference to the drawings.

図１は本発明の実施例１におけるパワーモジュールの模式平面図であり、図２は図１の断面Ａにおける模式断面図である。絶縁基板１は金属からなる放熱板８と半導体チップ４を電気的に絶縁するための熱伝導性に優れたセラミックスからなる。絶縁基板１に形成された導体パターン２は半導体チップ４と接合部材３ａにより接合される。半導体チップ４としては、ＩＧＢＴなどのパワー半導体チップやこれらのパワー半導体チップを制御するための制御回路用半導体チップが挙げられる。接地電極７は、通常接地電位であり、放熱板８と接合部材３ｂで接合される。接合部材３a、３ｂとしては、はんだや銀などの金属、及び樹脂に銀を加えた銀ペーストなどが挙げられる。半導体チップ４上面には、電極５が形成されており、金属ワイヤ９が接合される。そして、半導体チップ４上面に形成された電極５、及び半導体チップ４外周端面を含み、半導体チップ４外周端面と連続する接合部材３ａ、導体パターン２、絶縁基板１の表面をセラミックスなどの無機材料からなる絶縁膜６で被覆する。絶縁膜に使用する無機材料としては、電気的に絶縁性であれば、従来公知のいずれの材料も使用できる。例えば、酸化アルミニウム等の酸化物系セラミックス、または窒化アルミニウムや窒化珪素等の窒化物系セラミックス等が挙げられるが、絶縁特性、大気中での取り扱い、及びコストの点において、酸化アルミニウムが望ましい。絶縁膜６は、絶縁基板１の表面の一部を含んでいれば良く、図３（ａ）に示すように絶縁膜６が絶縁基板１の端部まで被覆する場合、図３（ｂ）に示すように絶縁膜６が放熱板８と対向する絶縁基板表面まで被覆する場合も本実施例に含まれる。また、図３（ｃ）に示すように、絶縁膜６が接地電極７や放熱板８の一部を被覆していても良い。部分放電は電極５または導体パターン２から接地電位に向かって生じるため、接地電位である接地電極７や放熱板８を被覆することで、部分放電の抑制効果がさらに得られる。本発明は、絶縁膜６が半導体チップ４の外周端部を全て被覆する必要はなく、絶縁膜６が半導体チップ４の外周端部の一部のみを被覆していても、表面汚染に起因する部分放電の抑止効果がある。また、図３（ｄ）のように、絶縁膜６を半導体チップ４に対して複数に分割して成膜しても良い。   1 is a schematic plan view of a power module according to a first embodiment of the present invention, and FIG. 2 is a schematic cross-sectional view taken along a section A in FIG. The insulating substrate 1 is made of ceramics having excellent thermal conductivity for electrically insulating the heat sink 8 made of metal and the semiconductor chip 4. The conductor pattern 2 formed on the insulating substrate 1 is bonded to the semiconductor chip 4 by the bonding member 3a. Examples of the semiconductor chip 4 include power semiconductor chips such as IGBTs and control circuit semiconductor chips for controlling these power semiconductor chips. The ground electrode 7 is normally at a ground potential and is joined to the heat sink 8 by the joining member 3b. Examples of the joining members 3a and 3b include metals such as solder and silver, and silver paste obtained by adding silver to a resin. An electrode 5 is formed on the upper surface of the semiconductor chip 4 and a metal wire 9 is bonded thereto. The surface of the bonding member 3a, the conductor pattern 2, and the insulating substrate 1 including the electrode 5 formed on the upper surface of the semiconductor chip 4 and the outer peripheral end surface of the semiconductor chip 4 and continuing to the outer peripheral end surface of the semiconductor chip 4 is made of an inorganic material such as ceramics. The insulating film 6 is covered. As the inorganic material used for the insulating film, any conventionally known material can be used as long as it is electrically insulating. For example, oxide ceramics such as aluminum oxide, or nitride ceramics such as aluminum nitride or silicon nitride can be used. Aluminum oxide is preferable in terms of insulating properties, handling in the air, and cost. The insulating film 6 only needs to include a part of the surface of the insulating substrate 1. When the insulating film 6 covers the end of the insulating substrate 1 as shown in FIG. As shown, the case where the insulating film 6 covers the surface of the insulating substrate facing the heat sink 8 is also included in this embodiment. Further, as shown in FIG. 3C, the insulating film 6 may cover a part of the ground electrode 7 and the heat radiating plate 8. Since the partial discharge is generated from the electrode 5 or the conductor pattern 2 toward the ground potential, covering the ground electrode 7 or the heat radiating plate 8 that is the ground potential further provides a partial discharge suppression effect. In the present invention, it is not necessary for the insulating film 6 to cover the entire outer peripheral end of the semiconductor chip 4, and even if the insulating film 6 covers only a part of the outer peripheral end of the semiconductor chip 4, it results from surface contamination. There is an effect of suppressing partial discharge. Further, as shown in FIG. 3D, the insulating film 6 may be divided into a plurality of films with respect to the semiconductor chip 4.

半導体チップ上面の電極から、絶縁基板までを無機材料の絶縁膜により一括して被覆することで、部分放電発生箇所である電極端部、及び導体パターン端部を同時に被覆し、部分放電を効果的に抑止できる。さらに、従来の構造に比べ広い領域に膜厚が制御された絶縁膜を被覆することで、付着金属異物や金属残渣などの表面汚染に起因する部分放電に対しても十分な絶縁特性を保つことができる。絶縁膜の膜厚制御が容易であるため、絶縁膜の絶縁特性をもとに部分放電を確実に抑制する設計が可能になる。したがって、従来の構造よりも小さな絶縁沿面距離で絶縁仕様を満足できるようになり、パワーモジュールの小型化が可能となる。   By covering all the electrodes from the top surface of the semiconductor chip to the insulating substrate with an insulating film made of an inorganic material, it is possible to simultaneously cover the electrode end portion and the conductor pattern end portion where the partial discharge occurs, thereby effectively preventing partial discharge. Can be suppressed. Furthermore, by covering the wide area with the insulating film whose film thickness is controlled compared to the conventional structure, it is possible to maintain sufficient insulation characteristics against partial discharge caused by surface contamination such as adhered metal foreign matter and metal residue. Can do. Since it is easy to control the thickness of the insulating film, it is possible to design to suppress partial discharge reliably based on the insulating characteristics of the insulating film. Therefore, the insulation specification can be satisfied with a smaller insulation creepage distance than the conventional structure, and the power module can be miniaturized.

ここで、実施例１におけるパワーモジュールを製造方法について説明する。図４に模式断面図を示す。このパワーモジュールの構成について説明する。絶縁基板１は窒化シリコン焼結基板であり、絶縁基板の両面にはそれぞれ銅板が導体パターン２及び接地電極７として接合されている。導体パターン上にはＩＧＢＴ、及びＩＧＢＴを制御するための制御回路用半導体チップが配置されている。これらの半導体チップ４は高温はんだ３ａにより導体パターン２に接続される。半導体チップ４上面にはアルミ電極５が形成されており、半導体チップ４間および、半導体チップ４と導体パターン２がアルミワイヤ９により結線される。接地電極７は銅の放熱板８と低温はんだ３ｂにより接続される。そして、電極５、及び半導体チップ４外周端面を含み、半導体チップ４外周端面と連続する接合部材３ａ、導体パターン２、絶縁基板１の表面を無機材料の絶縁膜６で被覆する。無機材料として、絶縁性セラミックスである酸化アルミニウムを使用した。絶縁膜６はエアロゾルデポジション法により成膜した。その後、放熱板８の周囲にケース１０を接着させ、シリコン系の絶縁性ゲル剤１１を充填して硬化させた後、上部を封止してモジュールを完成させる。   Here, a method for manufacturing the power module according to the first embodiment will be described. FIG. 4 shows a schematic cross-sectional view. The configuration of this power module will be described. The insulating substrate 1 is a silicon nitride sintered substrate, and copper plates are bonded to both surfaces of the insulating substrate as a conductor pattern 2 and a ground electrode 7, respectively. An IGBT and a control circuit semiconductor chip for controlling the IGBT are arranged on the conductor pattern. These semiconductor chips 4 are connected to the conductor pattern 2 by high-temperature solder 3a. Aluminum electrodes 5 are formed on the upper surface of the semiconductor chip 4, and between the semiconductor chips 4 and between the semiconductor chip 4 and the conductor pattern 2 are connected by aluminum wires 9. The ground electrode 7 is connected to the copper heat sink 8 by a low temperature solder 3b. The surface of the bonding member 3a, the conductor pattern 2, and the insulating substrate 1 including the electrode 5 and the outer peripheral end surface of the semiconductor chip 4 and continuing to the outer peripheral end surface of the semiconductor chip 4 is covered with an insulating film 6 made of an inorganic material. As the inorganic material, aluminum oxide, which is an insulating ceramic, was used. The insulating film 6 was formed by an aerosol deposition method. Thereafter, the case 10 is adhered to the periphery of the heat radiating plate 8, filled with a silicon-based insulating gel agent 11 and cured, and then the upper portion is sealed to complete the module.

次に、エアロゾルデポジション法による成膜方法を説明する。エアロゾルデポジション装置の構成説明図を図５に示す。高圧ガスボンベ２１を開栓し、搬送ガスをガス搬送管２２を通してエアロゾル発生器２３に導入させる。エアロゾル発生器２３にはあらかじめ酸化アルミニウムの微粒子を入れており、搬送ガスと混合されることで、酸化アルミニウム微粒子を含むエアロゾルが発生する。使用可能な搬送ガスとしては、アルゴン、窒素、ヘリウム等の不活性ガスが挙げられる。エアロゾルは、搬送管２４を通してノズル２６へと送られ、ＸＹステージ２７に設置された基板２８に向けてノズルの開口より高速で噴出される。このとき真空ポンプ２９の作動により、真空チャンバー２５内は数１００Ｐａの減圧となる。原料粉末として平均粒径０．５μｍの酸化アルミニウム微粒子を使用し、搬送ガスとして窒素ガスを３〜１５Ｌ／ｍｉｎの流量で装置内に流した。   Next, a film forming method by the aerosol deposition method will be described. An explanatory diagram of the configuration of the aerosol deposition apparatus is shown in FIG. The high-pressure gas cylinder 21 is opened, and the carrier gas is introduced into the aerosol generator 23 through the gas carrier pipe 22. The aerosol generator 23 contains aluminum oxide fine particles in advance and is mixed with a carrier gas to generate an aerosol containing aluminum oxide fine particles. Usable carrier gases include inert gases such as argon, nitrogen and helium. The aerosol is sent to the nozzle 26 through the transport pipe 24 and is ejected at a high speed from the opening of the nozzle toward the substrate 28 installed on the XY stage 27. At this time, the operation of the vacuum pump 29 reduces the pressure in the vacuum chamber 25 to several hundred Pa. Aluminum oxide fine particles having an average particle diameter of 0.5 μm were used as the raw material powder, and nitrogen gas was flowed into the apparatus as a carrier gas at a flow rate of 3 to 15 L / min.

作製したパワーモジュールの電極端部（図４の断面Ｂ）、及び導体パターン端部（図４の断面Ｃ）での絶縁膜の断面ＳＥＭ画像を図６、図７にそれぞれ示す。下地との接合界面、及び膜中にボイドのない緻密な膜が成膜された。図６、図７に示す絶縁膜の膜厚は約１０μｍであるが、膜厚は成膜条件を変えることで容易に制御可能である。   6 and 7 show cross-sectional SEM images of the insulating film at the electrode end (section B in FIG. 4) and the conductor pattern end (section C in FIG. 4) of the manufactured power module, respectively. A dense film having no voids in the bonding interface with the base and in the film was formed. The film thickness of the insulating film shown in FIGS. 6 and 7 is about 10 μm, but the film thickness can be easily controlled by changing the film formation conditions.

図８は実施例１におけるパワーモジュールの絶縁特性を絶縁破壊電圧で示し、導体パターン端部を樹脂で被覆した従来構造のパワーモジュールのそれと比較した結果を示している。従来構造の場合、絶縁破壊電圧のばらつきが大きい。これは導体パターン端部に樹脂が均一に被覆されておらず、製品ごとにその絶縁特性がばらつくためである。パワーモジュールの絶縁設計をするうえでは、ばらつきの最低値を考慮しなければならず、結果として十分な絶縁特性を保持させるためには、絶縁沿面距離を大きくするなどの手段が必要となる。一方、本実施例の構造では、絶縁破壊電圧が従来構造に比べ大きいうえ、そのばらつきも小さい。これは、半導体チップ上面の電極から、絶縁基板までを絶縁膜で一括して被覆することで、部分放電発生箇所である電極端部、及び導体パターン端部を同時に被覆しできるうえ、従来の構造に比べ広い領域に絶縁膜を被覆することで、付着金属異物や金属残渣などの表面汚染に起因する放電に対しても十分な絶縁特性をもつためである。また、絶縁膜の膜厚制御が容易であり、均一な絶縁膜を被覆できるため、絶縁破壊電圧のばらつきも小さい。本実施例におけるパワーモジュールでは、絶縁膜の絶縁特性をもとに部分放電を確実に抑制する設計が可能になる。したがって、従来の構造に比べパワーモジュールの動作信頼性が向上するとともに、小さな絶縁沿面距離で絶縁仕様を満足できるようになるため、パワーモジュールの小型化が可能となる。   FIG. 8 shows the insulation characteristics of the power module in Example 1 in terms of dielectric breakdown voltage, and shows the result of comparison with that of a conventional power module in which the end portion of the conductor pattern is covered with resin. In the case of the conventional structure, the variation in breakdown voltage is large. This is because the resin pattern is not uniformly coated on the end portion of the conductor pattern, and the insulation characteristics vary from product to product. In designing the insulation of the power module, it is necessary to consider the minimum value of variation. As a result, in order to maintain a sufficient insulation characteristic, means such as increasing the insulation creepage distance is required. On the other hand, in the structure of this embodiment, the dielectric breakdown voltage is larger than that of the conventional structure, and the variation is small. This is because by covering all the electrodes from the top surface of the semiconductor chip to the insulating substrate with an insulating film, it is possible to simultaneously cover the electrode end and the conductor pattern end where the partial discharge occurs, and the conventional structure. This is because the insulating film is coated over a wider area than the above, so that it has sufficient insulating characteristics against discharge caused by surface contamination such as adhered metal foreign matter and metal residue. In addition, since the thickness of the insulating film can be easily controlled and a uniform insulating film can be coated, variations in the dielectric breakdown voltage are small. The power module in the present embodiment can be designed to reliably suppress partial discharge based on the insulating characteristics of the insulating film. Therefore, the operation reliability of the power module is improved as compared with the conventional structure, and the insulation specification can be satisfied with a small insulation creepage distance, so that the power module can be downsized.

図９を用いて、本発明の実施例２を説明する。本実施例では実施例１と同一の構成要素に同一の符号を付し、その説明を省略するものとする。図９は実施例２におけるパワーモジュールの模式断面図である。実施例２においては、実施例１に記載の絶縁膜６が、半導体チップ４上面に形成された電気的に独立した複数の電極５ａ、５ｂの表面、及び電極５ａと電極５ｂの間を被覆していること以外は実施例１と同様に構成される。   A second embodiment of the present invention will be described with reference to FIG. In the present embodiment, the same components as those in the first embodiment are denoted by the same reference numerals, and the description thereof is omitted. FIG. 9 is a schematic cross-sectional view of a power module according to the second embodiment. In the second embodiment, the insulating film 6 described in the first embodiment covers the surfaces of the plurality of electrically independent electrodes 5a and 5b formed on the upper surface of the semiconductor chip 4 and between the electrodes 5a and 5b. Except for this, the configuration is the same as in the first embodiment.

半導体チップ４上面に電気的に独立した複数の電極５a、５ｂが形成されている場合、電極間に十分な絶縁を保障する距離をとらなければならない。半導体チップ上の電極間を無機材料からなる絶縁膜で被覆することで、電極間の絶縁強化が可能になる。膜厚が制御された絶縁膜を被覆することで、十分な絶縁特性を確保できる設計が可能になるため、従来構造よりも電極間の距離を小さく設定できる。これにより、電極パターンの微細化、さらにはモジュールの小型化が可能となる。   When a plurality of electrically independent electrodes 5a and 5b are formed on the upper surface of the semiconductor chip 4, it is necessary to take a distance that ensures sufficient insulation between the electrodes. By covering the electrodes on the semiconductor chip with an insulating film made of an inorganic material, the insulation between the electrodes can be reinforced. By covering the insulating film with a controlled film thickness, a design capable of ensuring sufficient insulating characteristics can be achieved, so that the distance between the electrodes can be set smaller than that of the conventional structure. As a result, the electrode pattern can be miniaturized and the module can be miniaturized.

実施例３においては、実施例１に記載の絶縁膜６を構成する無機材料が１種類の無機材料又は２種類以上の無機材料の複合物からなり、上記絶縁膜６が導体パターン２の熱膨張率より小さい値の熱膨張率を有すること以外は実施例１と同様に構成される。   In Example 3, the inorganic material constituting the insulating film 6 described in Example 1 is composed of one kind of inorganic material or a composite of two or more kinds of inorganic materials, and the insulating film 6 has the thermal expansion of the conductor pattern 2. The configuration is the same as in Example 1 except that the coefficient of thermal expansion is smaller than the coefficient.

絶縁膜６は半導体チップ４、導体パターン２、絶縁基板１などの複数の基材に成膜されており、これらの基材はそれぞれ熱膨張率が異なる。例えば、半導体チップに使われる珪素の熱膨張率は３ｐｐｍ／℃程度、導体パターンに使われる銅の熱膨張率は１７ｐｐｍ／℃程度、絶縁基板に使われる窒化珪素の熱膨張率は３ｐｐｍ／℃程度である。パワーモジュールの駆動時は、半導体チップ４が発熱、冷却を繰り返す。したがって、このような熱サイクルの下では、絶縁膜６と基材間の界面に熱膨張率の差に応じた熱応力が発生する。この熱応力は、絶縁膜の剥離や、絶縁膜中の欠陥導入による部分放電抑制効果の低下を引き起こす可能性がある。そこで、絶縁膜６の熱膨張率を基材に近づけ、絶縁膜６と基材との界面に働く熱応力を最小限に抑える必要がある。半導体チップ４、導体パターン２、絶縁基板１の熱膨張率をαc、αe、αsとすると、一般に熱膨張率にはαc、αs＜αeの大小関係がある。したがって、絶縁膜６の熱膨張率をαiとしたとき、αc、αs＜αi＜αeとなるような無機材料を絶縁膜として選択すれば、絶縁膜６と各基材間の熱膨張率の差を均等に低減することができる。例えば、半導体チップに珪素（熱膨張率は３ｐｐｍ／℃程度）、導体パターンに銅（熱膨張率１７ｐｐｍ／℃程度）、絶縁基板に窒化珪素（熱膨張率３ｐｐｍ／℃程度）を使用した場合、酸化アルミニウム（熱膨張率７ｐｐｍ／℃程度）、窒化アルミニウム（熱膨張率５ｐｐｍ／℃程度）等が絶縁膜として適している。   The insulating film 6 is formed on a plurality of base materials such as the semiconductor chip 4, the conductor pattern 2, and the insulating substrate 1, and these base materials have different coefficients of thermal expansion. For example, the thermal expansion coefficient of silicon used for semiconductor chips is about 3 ppm / ° C., the thermal expansion coefficient of copper used for conductor patterns is about 17 ppm / ° C., and the thermal expansion coefficient of silicon nitride used for insulating substrates is about 3 ppm / ° C. It is. When the power module is driven, the semiconductor chip 4 repeats heat generation and cooling. Therefore, under such a thermal cycle, thermal stress corresponding to the difference in thermal expansion coefficient is generated at the interface between the insulating film 6 and the base material. This thermal stress may cause a reduction in partial discharge suppression effect due to peeling of the insulating film or introduction of defects in the insulating film. Therefore, it is necessary to make the thermal expansion coefficient of the insulating film 6 close to that of the base material and to minimize the thermal stress acting on the interface between the insulating film 6 and the base material. When the thermal expansion coefficients of the semiconductor chip 4, the conductor pattern 2, and the insulating substrate 1 are αc, αe, and αs, the thermal expansion coefficients generally have a magnitude relationship of αc, αs <αe. Therefore, when the thermal expansion coefficient of the insulating film 6 is αi, if an inorganic material satisfying αc and αs <αi <αe is selected as the insulating film, the difference in the thermal expansion coefficient between the insulating film 6 and each base material. Can be reduced evenly. For example, when silicon (thermal expansion coefficient is about 3 ppm / ° C) is used for the semiconductor chip, copper (thermal expansion coefficient is about 17 ppm / ° C) is used for the conductor pattern, and silicon nitride (thermal expansion coefficient is about 3 ppm / ° C) is used for the insulating substrate. Aluminum oxide (thermal expansion coefficient of about 7 ppm / ° C.), aluminum nitride (thermal expansion coefficient of about 5 ppm / ° C.) and the like are suitable as the insulating film.

絶縁膜６の熱膨張率は、成膜に用いる原料粉末の熱膨張率と等しい。熱膨張率が異なる２種類以上の無機材料の混合粉末を原料粉末に用いることにより、その混合比に応じた熱膨張率を有する絶縁膜が得られる。そのため、パワーモジュールに使われる導体パターンや絶縁基板の熱膨張率に応じて、適切な熱膨張率をもつ絶縁膜を形成することができる。さらに、成膜箇所に応じて、絶縁膜の熱膨張率を変化させることも可能である。つまり、原料粉末の混合比を変化させながら絶縁膜を成膜することで、絶縁膜の熱膨張率が絶縁基板上では絶縁基板の熱膨張率に近く、導体パターン上では導体パターンの熱膨張率に近くなるように成膜でき、熱応力を効果的に抑制できる。   The thermal expansion coefficient of the insulating film 6 is equal to the thermal expansion coefficient of the raw material powder used for film formation. By using a mixed powder of two or more kinds of inorganic materials having different thermal expansion coefficients as the raw material powder, an insulating film having a thermal expansion coefficient corresponding to the mixing ratio can be obtained. Therefore, an insulating film having an appropriate thermal expansion coefficient can be formed according to the conductor pattern used in the power module and the thermal expansion coefficient of the insulating substrate. Furthermore, the coefficient of thermal expansion of the insulating film can be changed according to the film formation location. In other words, by forming the insulating film while changing the mixing ratio of the raw material powder, the thermal expansion coefficient of the insulating film is close to the thermal expansion coefficient of the insulating substrate on the insulating substrate, and the thermal expansion coefficient of the conductive pattern on the conductive pattern. It is possible to form a film so as to be close to the thickness and effectively suppress thermal stress.

図１１は本発明の実施例４におけるパワーモジュールの模式平面図であり、図１２（ａ）、（ｂ）はそれぞれ図１１の断面Ｄ、断面Ｅにおける模式断面図である。本実施例では実施例１と同一の構成要素に同一の符号を付し、その説明を省略するものとする。ただし、本実施例においては無機材料からなる絶縁膜６は必ずしも絶縁性をもつ膜である必要はないため、無機膜６０と表記し、絶縁膜６と区別する。実施例４においては、無機膜６０が、半導体チップ４上面に形成された電極５と金属ワイヤ９の接合部の少なくとも一部を被覆している。   FIG. 11 is a schematic plan view of a power module according to Embodiment 4 of the present invention, and FIGS. 12A and 12B are schematic cross-sectional views taken along sections D and E in FIG. 11, respectively. In the present embodiment, the same components as those in the first embodiment are denoted by the same reference numerals, and the description thereof is omitted. However, in this embodiment, the insulating film 6 made of an inorganic material does not necessarily have to be an insulating film, and is therefore referred to as an inorganic film 60 and distinguished from the insulating film 6. In Example 4, the inorganic film 60 covers at least a part of the joint between the electrode 5 and the metal wire 9 formed on the upper surface of the semiconductor chip 4.

パワーモジュールの動作信頼性を阻害する要因の一つに熱サイクルに伴う金属ワイヤの剥離がある。金属ワイヤ９は、導体パターン２と電極５とを接続するもので、半導体チップ４と半導体チップ４上の電極５を介して接続されている。パワーモジュールの駆動時は、半導体チップ４が発熱、冷却を繰り返す。したがって、このような熱サイクルの下では、半導体チップ４と金属ワイヤ９の熱膨張率の差に応じた熱応力が電極５と金属ワイヤ９の接合界面に発生する。熱応力により、電極５と金属ワイヤ９の界面部分で亀裂が発生する。駆動時間が長くなると亀裂が進展し最終的には金属ワイヤ９の剥離が生じる。パワーモジュールの動作安定性を確保するためには、部分放電の抑制とともに、金属ワイヤ９の剥離を防ぐ必要がある。金属ワイヤ接合部の補強として、エポキシ樹脂、ポリイミド樹脂等の熱硬化性樹脂やシリカ等の無機粒子を含有させた上記熱硬化性樹脂で金属ワイヤ接合部を補強する方法が考案されている。しかし、上記樹脂では被覆する際の膜厚制御が難しく、金属ワイヤ接合部に樹脂を均一に被覆できない。熱膨張率が大きい樹脂による接合部の不均一な被覆は、金属ワイヤの剥離を促すこともある。そのため、製品ごとで金属ワイヤ接合部の補強効果がばらつき、パワーモジュールの動作信頼性を確保できない。   One of the factors that hinders the operational reliability of the power module is peeling of the metal wire accompanying the thermal cycle. The metal wire 9 connects the conductor pattern 2 and the electrode 5 and is connected to the semiconductor chip 4 via the electrode 5 on the semiconductor chip 4. When the power module is driven, the semiconductor chip 4 repeats heat generation and cooling. Therefore, under such a thermal cycle, a thermal stress corresponding to the difference in thermal expansion coefficient between the semiconductor chip 4 and the metal wire 9 is generated at the bonding interface between the electrode 5 and the metal wire 9. Cracks occur at the interface between the electrode 5 and the metal wire 9 due to thermal stress. As the driving time becomes longer, cracks develop and eventually the metal wire 9 is peeled off. In order to ensure the operational stability of the power module, it is necessary to prevent peeling of the metal wire 9 as well as to suppress partial discharge. As reinforcement of the metal wire joint, a method of reinforcing the metal wire joint with the thermosetting resin containing inorganic particles such as a thermosetting resin such as epoxy resin or polyimide resin or silica has been devised. However, with the above resin, it is difficult to control the film thickness at the time of coating, and the metal wire joint cannot be coated uniformly with the resin. The non-uniform coating of the joint with a resin having a high coefficient of thermal expansion may promote peeling of the metal wire. For this reason, the reinforcing effect of the metal wire joint varies from product to product, and the operational reliability of the power module cannot be ensured.

そこで、実施例４においては、セラミックスなどの無機材料からなる無機膜６０が、半導体チップ４上面に形成された電極５及び電極５との接続部における金属ワイヤ９の表面の少なくとも一部を被覆している構造をとる。金属ワイヤ９より熱膨張率の小さいセラミックスなどの無機材料で接続部の金属ワイヤ表面を被覆することで、高温時の金属ワイヤ９の熱膨張を抑え、電極５と金属ワイヤ９の接合界面にはたらく熱応力を低減することができる。これにより、接合界面の亀裂の発生、及び亀裂の進展を抑制することができ、金属ワイヤの剥離に起因するパワーモジュールの破壊を抑制することができる。   Therefore, in Example 4, the inorganic film 60 made of an inorganic material such as ceramics covers at least a part of the surface of the metal wire 9 at the connection portion between the electrode 5 and the electrode 5 formed on the upper surface of the semiconductor chip 4. Take the structure. By covering the surface of the metal wire at the connecting portion with an inorganic material such as ceramics having a smaller coefficient of thermal expansion than the metal wire 9, the thermal expansion of the metal wire 9 at the time of high temperature is suppressed, and it acts on the bonding interface between the electrode 5 and the metal wire 9. Thermal stress can be reduced. Thereby, generation | occurrence | production of the crack of a joining interface and progress of a crack can be suppressed, and destruction of the power module resulting from peeling of a metal wire can be suppressed.

さらに、成膜時に室温において無機膜６０に圧縮応力を残留させることが可能である。このとき、無機膜６０の基板側となる電極５と半導体チップ４には引張応力が残留する。室温において半導体チップ４に加わる引張応力は、高温時に接合部材３ａに加わる熱応力を低減する効果がある。これにより、熱サイクルによる接合部材３ａの疲労低減に効果があり、接合部材３ａ内のクラック進展に起因するパワーモジュールの破壊も抑制することができる。   Furthermore, it is possible to leave compressive stress in the inorganic film 60 at room temperature during film formation. At this time, tensile stress remains in the electrode 5 and the semiconductor chip 4 on the substrate side of the inorganic film 60. The tensile stress applied to the semiconductor chip 4 at room temperature has the effect of reducing the thermal stress applied to the bonding member 3a at a high temperature. Thereby, it is effective in the fatigue reduction of the joining member 3a by a thermal cycle, and destruction of the power module resulting from the crack progress in the joining member 3a can also be suppressed.

無機膜６０に使用する無機材料としては、金属ワイヤ９より熱膨張率が小さければ、いずれの材料も使用できる。例えば、酸化アルミニウム、酸化チタン、酸化ジルコニウム等の酸化物系セラミックス、または窒化アルミニウムや窒化珪素等の窒化物系セラミックス、または炭化珪素等の炭化物系セラミックス等が挙げられる。また、無機膜を構成する無機材料は１種類である必要は無く、２種類以上の無機材料が混在していても良い。無機膜の熱膨張率は、成膜に用いる原料粉末の熱膨張率と等しい。熱膨張率が異なる２種類以上の無機材料の混合粉末を原料粉末に用いることにより、その混合比に応じた熱膨張率を有する膜が得られる。そのため、パワーモジュールに使われる金属ワイヤや半導体チップの熱膨張率に応じて、適切な熱膨張率をもつ無機膜を形成することができる。   As the inorganic material used for the inorganic film 60, any material can be used as long as the coefficient of thermal expansion is smaller than that of the metal wire 9. Examples thereof include oxide ceramics such as aluminum oxide, titanium oxide, and zirconium oxide, nitride ceramics such as aluminum nitride and silicon nitride, and carbide ceramics such as silicon carbide. Moreover, the inorganic material which comprises an inorganic film does not need to be 1 type, and 2 or more types of inorganic materials may be mixed. The thermal expansion coefficient of the inorganic film is equal to the thermal expansion coefficient of the raw material powder used for film formation. By using a mixed powder of two or more kinds of inorganic materials having different thermal expansion coefficients as the raw material powder, a film having a thermal expansion coefficient corresponding to the mixing ratio can be obtained. Therefore, an inorganic film having an appropriate thermal expansion coefficient can be formed according to the thermal expansion coefficient of the metal wire or semiconductor chip used in the power module.

本実施例によるパワーモジュールでは、無機膜６０が半導体チップ４上の電極５、及び電極５との接合部における金属ワイヤ９表面の一部を被覆していれば良く、図１３（ａ）、（ｂ）に示すように、金属ワイヤ９表面、及び電極５表面に膜が成膜されていない箇所があっても良い。   In the power module according to the present embodiment, the inorganic film 60 only needs to cover the electrode 5 on the semiconductor chip 4 and a part of the surface of the metal wire 9 at the junction with the electrode 5, as shown in FIGS. As shown in b), there may be a portion where no film is formed on the surface of the metal wire 9 and the surface of the electrode 5.

実施例４におけるパワーモジュールの作製方法を説明する。無機膜６０以外のパワーモジュールの構成要素は実施例１と同じであるため、説明を省略する。無機膜６０の構成材料として、酸化アルミニウムを選択し、エアロゾルデポジション法により、無機膜６０が、半導体チップ４上面に形成された電極５及び電極５との接続部における金属ワイヤ９の表面の少なくとも一部を被覆するように成膜した。エアロゾルデポジション法による成膜では、原料粉末として平均粒径０．５μｍの酸化アルミニウム微粒子を使用し、搬送ガスとして窒素ガスを３〜１５Ｌ／ｍｉｎの流量で装置内に流した。   A method for manufacturing a power module in Example 4 will be described. Since the components of the power module other than the inorganic film 60 are the same as those in the first embodiment, description thereof is omitted. Aluminum oxide is selected as the constituent material of the inorganic film 60, and the inorganic film 60 is formed at least on the surface of the metal wire 9 at the connection portion between the electrode 5 formed on the upper surface of the semiconductor chip 4 and the electrode 5 by an aerosol deposition method. A film was formed so as to cover a part. In film formation by the aerosol deposition method, aluminum oxide fine particles having an average particle size of 0.5 μm were used as a raw material powder, and nitrogen gas was flowed into the apparatus as a carrier gas at a flow rate of 3 to 15 L / min.

作製したパワーモジュールの金属ワイヤ接合部におけるＳＥＭ画像を図１４に示す。また無機膜と下地の電極、及び金属ワイヤの接合界面を拡大したＳＥＭ画像を図１５に示す。下地との接合界面、及び膜中にボイドのない緻密な膜が成膜された。図１４、図１５に示す酸化アルミニウム膜の膜厚は約２０μｍであるが、膜厚は成膜条件を変えることで容易に制御可能である。   The SEM image in the metal wire junction part of the produced power module is shown in FIG. FIG. 15 shows an SEM image in which the bonding interface between the inorganic film, the underlying electrode, and the metal wire is enlarged. A dense film having no voids in the bonding interface with the base and in the film was formed. The film thickness of the aluminum oxide film shown in FIGS. 14 and 15 is about 20 μm, but the film thickness can be easily controlled by changing the film formation conditions.

酸化アルミニウム膜および半導体チップにはたらく残留応力をＸ線のｓｉｎ２Ψ法により調べた。成膜により、酸化アルミニウム膜には５０〜２００ＭＰａ程度の圧縮応力、半導体チップには０〜２００ＭＰａ程度の引張応力が付与されていることを確認した。室温において半導体チップ４に加わる引張応力は、高温時にはんだに加わる熱応力を低減するため、パワーサイクル時のはんだ疲労の低減に効果があり、はんだのクラック進展に起因するパワーモジュールの破壊も抑制することができる。   Residual stress acting on the aluminum oxide film and the semiconductor chip was examined by the X-ray sin2Ψ method. By film formation, it was confirmed that a compressive stress of about 50 to 200 MPa was applied to the aluminum oxide film and a tensile stress of about 0 to 200 MPa was applied to the semiconductor chip. The tensile stress applied to the semiconductor chip 4 at room temperature reduces the thermal stress applied to the solder at a high temperature, which is effective in reducing solder fatigue during power cycles and also suppresses the destruction of the power module due to the progress of solder cracks. be able to.

以上の構成でパワーサイクル試験を行った結果、ジャンクション温度５０〜１５０℃では、４００００サイクルでもパワーモジュールが破壊されないことを確認した。一方、金属ワイヤ接合部の補強として、樹脂を用いた従来構造では、パワーサイクルの寿命が４００００サイクルに到達しない。これは、樹脂では被覆する際の、膜厚制御が難しく、熱膨張率が大きい樹脂による接合部の不均一な被覆が金属ワイヤの剥離を促すためである。本実施例におけるパワーモジュールでは、半導体チップ上面に形成された電極及び電極との接続部における金属ワイヤの表面を無機膜により被覆し、さらに無機膜に圧縮応力を付与することで、パワーモジュールの動作信頼性を向上させることができる。   As a result of conducting a power cycle test with the above configuration, it was confirmed that the power module was not destroyed even at 40,000 cycles at a junction temperature of 50 to 150 ° C. On the other hand, in the conventional structure using resin as the reinforcement of the metal wire joint, the life of the power cycle does not reach 40000 cycles. This is because it is difficult to control the film thickness at the time of coating with resin, and non-uniform coating of the joint portion with resin having a large coefficient of thermal expansion promotes peeling of the metal wire. In the power module in this embodiment, the electrode formed on the upper surface of the semiconductor chip and the surface of the metal wire in the connection portion with the electrode are covered with an inorganic film, and further, compressive stress is applied to the inorganic film, thereby operating the power module. Reliability can be improved.

図１６は本発明の実施例５におけるパワーモジュールの模式平面図である。本実施例では実施例４と同一の構成要素に同一の符号を付し、その説明を省略するものとする。本実施例においては、無機材料として電気的に絶縁性の材料を選択し、無機膜６０を半導体チップ４上の電極５から、絶縁基板１までを一括して被覆することを特徴とする。   FIG. 16 is a schematic plan view of a power module according to Embodiment 5 of the present invention. In the present embodiment, the same components as those in the fourth embodiment are denoted by the same reference numerals, and the description thereof is omitted. In the present embodiment, an electrically insulating material is selected as the inorganic material, and the inorganic film 60 is collectively covered from the electrode 5 on the semiconductor chip 4 to the insulating substrate 1.

無機材料に絶縁性の材料を選択することで、実施例５に記載したパワーサイクル特性の向上だけでなく、実施例４に記載したパワーモジュールの絶縁特性の向上、及びパワーモジュールの小型化も可能となる。その際、絶縁膜に使用する無機材料としては、電気的に絶縁性であれば、従来公知のいずれの材料も使用できる。例えば、酸化アルミニウム等の酸化物系セラミックス、または窒化アルミニウムや窒化珪素等の窒化物系セラミックス等が挙げられるが、絶縁特性、大気中での取り扱い、及びコストの点において、酸化アルミニウムが望ましい。   By selecting an insulating material as the inorganic material, not only the power cycle characteristics described in the fifth embodiment can be improved, but also the power module described in the fourth embodiment can be improved in insulation characteristics and the power module can be downsized. It becomes. At this time, any conventionally known material can be used as the inorganic material for the insulating film as long as it is electrically insulating. For example, oxide ceramics such as aluminum oxide, or nitride ceramics such as aluminum nitride or silicon nitride can be used. Aluminum oxide is preferable in terms of insulating properties, handling in the air, and cost.

これまで説明してきた実施例は、何れも本発明を実施するにあたっての具体化の一例を示したものに過ぎず、これらによって本発明の技術的範囲が限定的に解釈されない。すなわち、本発明はその技術思想、又はその主要な特徴から逸脱することなく、様々な形で実施することができる。   The embodiments described so far are merely examples of implementation in carrying out the present invention, and the technical scope of the present invention is not limitedly interpreted by these. That is, the present invention can be implemented in various forms without departing from the technical idea or the main features thereof.

１ 絶縁基板
２ 導体パターン
３ａ、３ｂ 接合部材
４ 半導体チップ
５、５ａ、５ｂ 電極
６ 絶縁膜
７ 接地電極
８ 放熱板
９ 金属ワイヤ
１０ ケース
１１ 絶縁性ゲル剤
２１ 高圧ガスボンベ
２２、２４ 搬送管
２３ エアロゾル発生器
２５ 真空チャンバー
２６ ノズル
２７ ＸＹステージ
２８ 基板
２９ 真空ポンプ
６０ 無機膜 DESCRIPTION OF SYMBOLS 1 Insulating substrate 2 Conductive pattern 3a, 3b Joining member 4 Semiconductor chip 5, 5a, 5b Electrode 6 Insulating film 7 Ground electrode 8 Heat sink 9 Metal wire 10 Case 11 Insulating gel agent 21 High pressure gas cylinder 22, 24 Transport pipe 23 Aerosol generation Device 25 Vacuum chamber 26 Nozzle 27 XY stage 28 Substrate 29 Vacuum pump 60 Inorganic film

Claims (6)

絶縁基板と、
前記絶縁基板上に形成された導体パターンと、
前記導体パターンと接合部材により接続された半導体チップと、
前記半導体チップ上面に形成された電極と、
前記電極と前記導体パターンとを接続する金属ワイヤと、
を備え、
前記金属ワイヤと前記電極の接合部の少なくとも一部は、圧縮応力を有する無機膜により被覆されることを特徴とするパワーモジュール。 An insulating substrate;
A conductor pattern formed on the insulating substrate;
A semiconductor chip connected to the conductor pattern by a bonding member;
An electrode formed on the upper surface of the semiconductor chip;
A metal wire connecting the electrode and the conductor pattern;
With
At least a part of the joint between the metal wire and the electrode is covered with an inorganic film having a compressive stress. 前記無機膜がエアロゾルデポジション法により形成されることを特徴とする請求項１に記載のパワーモジュール。   The power module according to claim 1, wherein the inorganic film is formed by an aerosol deposition method. 前記無機膜を構成する無機材料が絶縁性の材料からなり、
前記無機膜が、前記電極と、前記半導体チップ外周端面と、前記半導体チップ外周端面と連続する前記接合部材と、前記導体パターンと、前記絶縁基板の表面とを被覆することを特徴とする請求項１に記載のパワーモジュール。 The inorganic material constituting the inorganic film is made of an insulating material,
The said inorganic film coat | covers the said electrode, the said semiconductor chip outer peripheral end surface, the said joining member continuous with the said semiconductor chip outer peripheral end surface, the said conductor pattern, and the surface of the said insulated substrate. The power module according to 1. 前記絶縁基板の前記導体パターンが形成された面と反対側の面に形成された接地電極と、前記接地電極上に形成された放熱板を備え、
前記無機膜が、前記接地電極と前記放熱板を無機材料からなる絶縁膜で被覆することを特徴とする請求項３に記載のパワーモジュール。 A ground electrode formed on the surface of the insulating substrate opposite to the surface on which the conductor pattern is formed; and a heat sink formed on the ground electrode.
The power module according to claim 3, wherein the inorganic film covers the ground electrode and the heat sink with an insulating film made of an inorganic material. 前記電極は電気的に独立した複数の電極より形成され、前記無機膜が半導体チップ上に形成された電気的に独立した複数の電極の表面及び前記電極間を被覆することを特徴とする請求項３または４のいずれかに記載のパワーモジュール。 The electrode is formed of a plurality of electrically independent electrodes, and the inorganic film covers a surface of the plurality of electrically independent electrodes formed on a semiconductor chip and between the electrodes. The power module according to any one of 3 and 4. 前記無機膜を構成する無機材料が１種類の無機材料又は２種類以上の無機材料の複合物からなり、前記無機膜が前記導体パターンの熱膨張率より小さい値の熱膨張率を有することを特徴とする請求項１乃至５のいずれかに記載のパワーモジュール。 The inorganic material constituting the inorganic film is composed of one kind of inorganic material or a composite of two or more kinds of inorganic materials, and the inorganic film has a thermal expansion coefficient smaller than that of the conductor pattern. The power module according to any one of claims 1 to 5.
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