JP2012248695A - 基板反り除去装置、基板反り除去方法及び記憶媒体 - Google Patents
基板反り除去装置、基板反り除去方法及び記憶媒体 Download PDFInfo
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- 238000000034 method Methods 0.000 title claims description 49
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- 239000007788 liquid Substances 0.000 claims abstract description 150
- 238000012545 processing Methods 0.000 claims abstract description 130
- 239000010409 thin film Substances 0.000 claims abstract description 101
- 238000006073 displacement reaction Methods 0.000 claims abstract description 46
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- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
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- B32B38/00—Ancillary operations in connection with laminating processes
- B32B38/10—Removing layers, or parts of layers, mechanically or chemically
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- B—PERFORMING OPERATIONS; TRANSPORTING
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- B32B41/00—Arrangements for controlling or monitoring lamination processes; Safety arrangements
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
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- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/6875—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a plurality of individual support members, e.g. support posts or protrusions
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- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
- Y10T156/11—Methods of delaminating, per se; i.e., separating at bonding face
- Y10T156/1105—Delaminating process responsive to feed or shape at delamination
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
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- Y10T156/1906—Delaminating means responsive to feed or shape at delamination
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- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Cleaning Or Drying Semiconductors (AREA)
Abstract
【解決手段】基板反り除去装置10は基板Wを保持する保持プレート30と、基板Wのパターン非形成面W2側に設けられ、パターン非形成面W2に形成された薄膜F2を除去するためエッチング液を供給する処理液供給管40と、基板Wの反りを検出する第1レーザ変位計4および第2レーザ変位計5とを備えている。第1レーザ変位計4および第2レーザ変位計5からの信号に基づいて、制御部3は基板Wの反りがなくなったことを確認する。制御部3が基板Wの反りがなくなったと判断した場合、制御部3は処理液供給管40からのエッチング液の供給を停止する。
【選択図】図2
Description
渡し手段Cを介してキャリア7に戻される。
3 制御部
4 第1レーザ変位計
5 第2レーザ変位計
10 基板反り除去装置
20 リフトピンプレート
20a 貫通穴
22 リフトピン
24 接続部材
30 保持プレート
30a 貫通穴
30b 貫通穴
31 基板支持部
32 収容部材
33 軸受け部
33a 軸受け孔
33b 内壁面
34 回転軸
36 回転カップ
37 固定保持部
38 接続部材
39 回転駆動部
40 処理液供給管
40a、40b 処理液供給路
42 ヘッド部分
44 第1の連動部材
46 第2の連動部材
50 昇降駆動部
52 接続部材
56 外カップ
W ウエハ
W1 表面
W2 裏面
P パターン
F,F1,F2 薄膜
Claims (11)
- パターンを含む薄膜を有するパターン形成面と、パターン形成面の反対側に位置し、パターンを含まない薄膜を有するパターン非形成面とを有する基板を保持する基板保持部と、
基板のパターン非形成面側に設けられ、パターン非形成面の薄膜を除去する薄膜除去部と、
基板の反りを検出する基板反り検出部と、
薄膜除去部を駆動制御する制御部とを備え、
制御部は基板反り検出部からの信号に基づいて、薄膜除去部の作動停止時を定めることを特徴とする基板反り除去装置。 - 薄膜除去部は基板のパターン非形成面側に配置された処理液供給部を有することを特徴とする請求項1記載の基板反り除去装置。
- 処理液供給部は処理液を供給する処理液供給管を有し、この処理液供給管にエッチング液を供給するエッチング液供給系が接続されていることを特徴とする請求項2記載の基板反り除去装置。
- 基板保持部はパターン非形成面を下方に向けて基板を保持し、
処理液供給部は基板の下方に配置されて、基板のパターン非形成面に処理液を供給することを特徴とする請求項2記載の基板反り除去装置。 - 基板反り検出部は基板の表面中央の変位を求める第1レーザ変位計と、基板の表面周縁の変位を求める第2レーザ変位計とを有することを特徴とする請求項1記載の基板反り除去装置。
- パターンを含む薄膜を有するパターン形成面と、パターン形成面の反対側に位置し、パターンを含まない薄膜を有するパターン非形成面とを有する基板を保持する基板保持部と、基板のパターン非形成面側に設けられ、パターン非形成面の薄膜を除去する薄膜除去部と、基板の反りを検出する基板反り検出部と、薄膜除去部を駆動制御する制御部とを備え、制御部は基板反り検出部からの信号に基づいて、薄膜除去部の作動停止時を定めることを特徴とする基板反り除去装置を用いた基板反り除去方法において、
基板保持部により基板を保持することと、
薄膜除去部により基板のパターン非形成面の薄膜を除去することと、
基板反り検出部により基板の反りを検出することとを備え、
制御部は基板反り検出部からの信号に基づいて、基板反りがなくなったと判断した場合、薄膜除去部の作動を停止することを特徴とする基板反り除去方法。 - 薄膜除去部により薄膜除去を行なうとき、処理液供給部から基板のパターン非形成面に処理液を供給することを特徴とする請求項6記載の基板反り除去方法。
- 処理液供給部から基板のパターン非形成面に処理液を供給するとき、処理液供給部から基板の非パターン形成面に処理液としてエッチング液を供給することを特徴とする請求項7記載の基板反り除去方法。
- 基板保持部はパターン非形成面を下方に向けて基板を保持し、
処理液供給部は基板の下方に配置されて、基板のパターン非形成面に処理液を供給することを特徴とする請求項7記載の基板反り除去方法。 - 基板反り検出部による基板の反りを検出するとき、第1レーザ変位計により基板の表面中央の変位を求めるとともに、第2レーザ変位計により基板の表面周縁の変位を求めることを特徴とする請求項6記載の基板反り除去方法。
- 基板反り除去装置に基板反り除去方法を実行させるためのコンピュータプログラムを格納した記憶媒体において、
基板反り除去方法は、
パターンを含む薄膜を有するパターン形成面と、パターン形成面の反対側に位置し、パターンを含まない薄膜を有するパターン非形成面とを有する基板を保持する基板保持部と、基板のパターン非形成面側に設けられ、パターン非形成面の薄膜を除去する薄膜除去部と、基板の反りを検出する基板反り検出部と、薄膜除去部を駆動制御する制御部とを備え、制御部は基板反り検出部からの信号に基づいて、薄膜除去部の作動停止時を定めることを特徴とする基板反り除去装置を用いた基板反り除去方法において、
基板保持部により基板を保持することと、
薄膜除去部により基板のパターン非形成面の薄膜を除去することと、
基板反り検出部により基板の反りを検出することとを備え、
制御部は基板反り検出部からの信号に基づいて、基板反りがなくなったと判断した場合、薄膜除去部の作動を停止することを特徴とする記憶媒体。
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JP2011119528A JP5642628B2 (ja) | 2011-05-27 | 2011-05-27 | 基板反り除去装置、基板反り除去方法及び記憶媒体 |
US13/479,673 US8801891B2 (en) | 2011-05-27 | 2012-05-24 | Substrate warpage removal apparatus and substrate processing apparatus |
KR1020120055393A KR101591478B1 (ko) | 2011-05-27 | 2012-05-24 | 기판 휨 제거 장치, 기판 휨 제거 방법 및 기억 매체 |
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Cited By (5)
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JP2015060852A (ja) * | 2013-09-17 | 2015-03-30 | 株式会社東芝 | 半導体装置の製造方法及び製造装置 |
JP2015128149A (ja) * | 2013-11-28 | 2015-07-09 | 京セラ株式会社 | 複合体およびその製造方法ならびに複合基板の製造方法 |
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JP2021036572A (ja) * | 2019-08-30 | 2021-03-04 | キオクシア株式会社 | 半導体製造装置、および半導体装置の製造方法 |
JP2022000917A (ja) * | 2016-09-05 | 2022-01-04 | 東京エレクトロン株式会社 | 半導体プロセッシング中のオーバレイを制御するための湾曲を制御する応力の位置特定チューニング |
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JP6186984B2 (ja) * | 2013-07-25 | 2017-08-30 | 三菱電機株式会社 | 半導体装置の製造方法 |
US9397051B2 (en) * | 2013-12-03 | 2016-07-19 | Invensas Corporation | Warpage reduction in structures with electrical circuitry |
KR102396000B1 (ko) * | 2015-09-24 | 2022-05-10 | 삼성전자주식회사 | 메모리 모듈 및 이를 갖는 솔리드 스테이트 드라이브 |
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US20120301832A1 (en) | 2012-11-29 |
KR20120132386A (ko) | 2012-12-05 |
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