JP2012156428A - Package for housing electronic component, and electronic device having the same - Google Patents

Package for housing electronic component, and electronic device having the same Download PDF

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JP2012156428A
JP2012156428A JP2011016062A JP2011016062A JP2012156428A JP 2012156428 A JP2012156428 A JP 2012156428A JP 2011016062 A JP2011016062 A JP 2011016062A JP 2011016062 A JP2011016062 A JP 2011016062A JP 2012156428 A JP2012156428 A JP 2012156428A
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electronic component
insulating base
recess
wall surface
recessed portion
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JP5791283B2 (en
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Hiroshi Shibayama
博司 柴山
Hironobu Fujiwara
宏信 藤原
Manabu Miyaishi
学 宮石
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Kyocera Corp
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Abstract

PROBLEM TO BE SOLVED: To provide a package for housing an electronic component and an electronic device therewith which suppress a stress generated at a recessed portion in which an external connecting conductor is formed.SOLUTION: The package for housing an electronic component includes: an insulating base 4 comprising a substrate 2 having a mounting portion 1 for an electronic component 9 and a frame 3 attached so as to surround the mounting portion 1; a groove-shaped recessed portion 5 provided at a side surface or corner portion of the insulating base 4; a wiring conductor 6 led from around the mounting portion 1 of the insulating base 4 to an inner wall surface of the recessed portion 5; and an external connecting conductor 7 formed from a peripheral portion of a lower surface of the insulating base 4 to the inner wall surface of the recessed portion 5. The recessed portion 5 has a first recessed portion 5a provided to an upper surface of the frame 3 and a second recessed portion 5b provided under the first recessed portion 5a from the lower surface, and the second recessed portion 5b has in a plan view a central inner wall surface flush with a central inner wall surface of the first recessed portion 5a and both side inner wall surfaces set back inward of the insulating base 4 from both side inner wall surfaces of the first recessed portion 5a.

Description

本発明は、電子部品を収納するための電子部品収納用パッケージの側面または角部に外部接続用導体が設けられている電子部品収納用パッケージに関する。   The present invention relates to an electronic component storage package in which external connection conductors are provided on side surfaces or corners of an electronic component storage package for storing electronic components.

電子部品収納用パッケージにおいて、絶縁基体の四隅に上面から下面にかけて形成された凹部に外部接続用導体が設けられた電子部品収納用パッケージがある。このような電子部品収納用パッケージとしては、例えば、特許文献１に開示されている。   As an electronic component storage package, there is an electronic component storage package in which external connection conductors are provided in recesses formed from the upper surface to the lower surface at four corners of an insulating base. Such an electronic component storage package is disclosed in, for example, Patent Document 1.

特開平１１−１６３２１５号公報JP 11-163215 A

電子部品収納用パッケージは、絶縁基体の角部または側面に外部電気回路基板に接合材を介して接合される外部接続用導体が形成された凹部を有しており、この外部接続用導体が形成された凹部に応力が集中しやすいという問題があった。   The electronic component storage package has a recess in which an external connection conductor to be bonded to an external electric circuit board via a bonding material is formed at a corner or a side surface of the insulating base, and the external connection conductor is formed. There was a problem that stress was likely to be concentrated in the recessed portion.

本発明は、上記課題に鑑みてなされたものであり、その目的は、外部接続用導体が形成されている凹部で発生する応力を抑制することができる電子部品収納用パッケージ、およびそれを備えた電子装置を提供することにある。   The present invention has been made in view of the above problems, and an object thereof is to provide an electronic component storage package capable of suppressing stress generated in a recess in which an external connection conductor is formed, and the electronic component storage package. It is to provide an electronic device.

上記目的を達成するために本発明における電子部品収納用パッケージは、平面視したときに外形が四角形状であり、上側主面に電子部品の搭載部を有する基板および前記搭載部を取り囲むように前記上側主面に取着された枠体から成る絶縁基体と、該絶縁基体の側面または角部に下面から前記枠体の上面にかけて設けられた溝状の凹部と、前記絶縁基体の前記搭載部の周辺から前記凹部の内壁面に導出された配線導体と、前記絶縁基体の前記下面の外周部から前記凹部の内壁面にかけて形成された、前記配線導体と接続された外部接続用導体とを備えており、前記凹部は、前記枠体の上面側に設けられた第１の凹部と該第１の凹部の下側で前記下面から設けられた第２の凹部を有しており、該第２の凹部は、平面視において中央部の内壁面が前記第１の凹部の中央部の内壁面と同一面をなし、両側の内壁面が前記第１の凹部の両側の内壁面よりも前記絶縁基体の内側に後退していることを特徴とするものである。   In order to achieve the above object, the electronic component storage package according to the present invention has a quadrangular outer shape when viewed from above, and has a substrate having an electronic component mounting portion on the upper main surface and the mounting portion so as to surround the mounting portion. An insulating base composed of a frame attached to the upper main surface, a groove-shaped recess provided on the side or corner of the insulating base from the lower surface to the upper surface of the frame, and the mounting portion of the insulating base A wiring conductor led from the periphery to the inner wall surface of the recess, and an external connection conductor connected to the wiring conductor formed from the outer peripheral portion of the lower surface of the insulating base to the inner wall surface of the recess. And the concave portion has a first concave portion provided on the upper surface side of the frame body and a second concave portion provided from the lower surface on the lower side of the first concave portion. The recess has an inner wall surface at the center in plan view. The inner surface of the first recess is flush with the inner wall surface of the central portion, and the inner wall surfaces on both sides recede to the inside of the insulating base than the inner wall surfaces on both sides of the first recess. It is.

また、上記目的を達成するために本発明における電子装置は、本発明の電子部品収納用パッケージと、前記搭載部に搭載されて、前記配線導体に電気的に接続された電子部品と、
前記搭載部を覆うように前記絶縁基体に取着されて前記絶縁基体との間に前記電子部品を収納する封止部材とを備えたことを特徴とするものである。 In order to achieve the above object, an electronic device according to the present invention includes an electronic component storage package according to the present invention, an electronic component mounted on the mounting portion and electrically connected to the wiring conductor,
And a sealing member that is attached to the insulating base so as to cover the mounting portion and accommodates the electronic component between the insulating base and the insulating base.

本発明の電子部品収納用パッケージ、および電子装置は、外部接続用導体が形成されている凹部で発生する応力を抑制することができるという効果を奏する。   The electronic component storage package and the electronic device according to the present invention have an effect of suppressing the stress generated in the concave portion in which the external connection conductor is formed.

本実施形態に係る電子部品収納用パッケージあって、（ａ）は絶縁基体を上から見た斜視図、（ｂ）は絶縁基体を下から見た斜視図である。In the electronic component storage package according to the present embodiment, (a) is a perspective view of the insulating substrate as viewed from above, and (b) is a perspective view of the insulating substrate as viewed from below. 本実施形態に係る電子部品収納用パッケージであって、電子部品を設けた、図１の電子部品収納用パッケージをＸ−Ｘで切断した断面図である。FIG. 2 is a cross-sectional view taken along the line XX of the electronic component storage package of FIG. 1, which is an electronic component storage package according to the present embodiment and provided with the electronic component. 本実施形態に係る電子部品収納用パッケージの凹部を絶縁基体の下から見て下面を上側にした拡大斜視図である。It is the expansion perspective view which made the lower surface upper side seeing the recessed part of the electronic component storage package which concerns on this embodiment from the bottom of an insulation base | substrate. 本実施形態に係る電子部品収納用パッケージの変形例の凹部を絶縁基体の下から見て下面を上側にした拡大斜視図である。It is the expansion perspective view which made the lower surface upper side seeing the recessed part of the modification of the electronic component storage package which concerns on this embodiment from the bottom of an insulation base | substrate.

以下、本発明の一実施形態に係る電子部品収納用パッケージ、およびこれを備えた電子装置について、図面を参照しながら説明する。   Hereinafter, an electronic component storage package according to an embodiment of the present invention and an electronic apparatus including the same will be described with reference to the drawings.

＜実施形態＞
＜電子部品収納用パッケージの構成、および電子装置の構成＞
本実施形態に係る電子部品収納用パッケージは、図１乃至図３に示すように、平面視したときに外形が四角形状であり、上側主面に電子部品９の搭載部１を有する基板２および搭載部１を取り囲むように上側主面に取着された枠体３から成る絶縁基体４と、絶縁基体４の側面または角部に下面から枠体３の上面にかけて設けられた溝状の凹部５と、絶縁基体４の搭載部１の周辺から凹部５の内壁面に導出された配線導体６と、絶縁基体４の下面の外周部から凹部５の内壁面にかけて形成された、配線導体６と接続された外部接続用導体７とを備えており、凹部５は、枠体３の上面側に設けられた第１の凹部５ａと第１の凹部５ａの下側で下面から設けられた第２の凹部５ｂを有しており、第２の凹部５ｂは、平面視において中央部の内壁面が第１の凹部５ａの中央部の内壁面と同一面をなし、両側の内壁面が第１の凹部５ａの両側の内壁面よりも絶縁基体４の内側に後退している。 <Embodiment>
<Configuration of Electronic Component Storage Package and Configuration of Electronic Device>
As shown in FIGS. 1 to 3, the electronic component storage package according to the present embodiment has a rectangular shape when viewed in plan, and includes a substrate 2 having a mounting portion 1 for the electronic component 9 on the upper main surface, and An insulating base 4 comprising a frame 3 attached to the upper main surface so as to surround the mounting portion 1, and a groove-like recess 5 provided on the side or corner of the insulating base 4 from the lower surface to the upper surface of the frame 3. And the wiring conductor 6 led out from the periphery of the mounting portion 1 of the insulating base 4 to the inner wall surface of the recess 5 and the wiring conductor 6 formed from the outer peripheral portion of the lower surface of the insulating base 4 to the inner wall surface of the recess 5. The external connection conductor 7 is provided, and the concave portion 5 includes a first concave portion 5a provided on the upper surface side of the frame body 3 and a second lower surface provided on the lower side of the first concave portion 5a. It has a recess 5b, and the second recess 5b has an inner wall surface at the center in plan view. No inner wall surface and the same surface of the central portion of the first recess 5a, the inner wall surface of both sides of the inner wall surface of both sides of the first recess 5a are recessed to the inside of the insulating base 4.

また、本実施形態に係る電子装置は、本発明の電子部品収納用パッケージと、搭載部１に搭載されて、配線導体６に電気的に接続された電子部品９と、搭載部１を覆うように絶縁基体４に取着されて絶縁基体４との間に電子部品９を収納する封止部材１０とを備えている。   The electronic device according to the present embodiment covers the electronic component storage package of the present invention, the electronic component 9 mounted on the mounting portion 1 and electrically connected to the wiring conductor 6, and the mounting portion 1. And a sealing member 10 which is attached to the insulating base 4 and accommodates the electronic component 9 between the insulating base 4.

絶縁基体４は、上側主面に電子部品９の搭載部１を有する基板２と基板２の上側主面の搭載部１を取り囲むように設けられている枠体３で構成されている。なお、枠体３の外側面は基板２の外側面と同一面をなすようにして基板２の上側主面に取着されている。絶縁基体４は、枠体３で取り囲まれた部分に電子部品９を収納するための容器である。そして、搭載部１に電子部品９を搭載することによって、基板２の上側主面と枠体３の内側面とによって形成される容器内に電子部品９が収納される。なお、電子部品９は、例えば、半導体素子、水晶振動子等である。   The insulating base 4 includes a substrate 2 having a mounting portion 1 for mounting an electronic component 9 on the upper main surface and a frame 3 provided so as to surround the mounting portion 1 on the upper main surface of the substrate 2. The outer surface of the frame 3 is attached to the upper main surface of the substrate 2 so as to be flush with the outer surface of the substrate 2. The insulating base 4 is a container for storing the electronic component 9 in a portion surrounded by the frame 3. Then, by mounting the electronic component 9 on the mounting portion 1, the electronic component 9 is accommodated in a container formed by the upper main surface of the substrate 2 and the inner surface of the frame 3. The electronic component 9 is, for example, a semiconductor element or a crystal resonator.

また、絶縁基体４は、例えば、一方の辺幅が、２（ｍｍ）〜５０（ｍｍ）に、他方の辺幅が、２（ｍｍ）〜５０（ｍｍ）に設定されている。また、厚みが、１（ｍｍ）〜１０（ｍｍ）に設定されている。   In addition, the insulating base 4 has, for example, one side width set to 2 (mm) to 50 (mm) and the other side width set to 2 (mm) to 50 (mm). The thickness is set to 1 (mm) to 10 (mm).

また、絶縁基体４を構成している基板２および枠体３は、例えば、アルミナ質セラミックス、窒化アルミニウム質セラミックスまたはムライト質セラミックス等のセラミック材料から成る。絶縁基体４は、基板２の搭載部１に搭載される電子部品９の発熱をすみやかに放熱する材料が好ましい。基板２および枠体３の熱伝導率は、例えば、１５（Ｗ／ｍ・Ｋ）以上２００（Ｗ／ｍ・Ｋ）以下に設定されている。また、基板２および枠体３の熱膨張係数は、例えば、４（ｐｐｍ／℃）以上８（ｐｐｍ／℃）以下に設定されている。   The substrate 2 and the frame 3 constituting the insulating base 4 are made of a ceramic material such as alumina ceramics, aluminum nitride ceramics, or mullite ceramics. The insulating base 4 is preferably made of a material that quickly dissipates heat generated by the electronic component 9 mounted on the mounting portion 1 of the substrate 2. The thermal conductivity of the board | substrate 2 and the frame 3 is set to 15 (W / m * K) or more and 200 (W / m * K) or less, for example. The thermal expansion coefficients of the substrate 2 and the frame 3 are set to, for example, 4 (ppm / ° C.) or more and 8 (ppm / ° C.) or less.

基板２および枠体３は、金型を用いて平板形状のグリーンシートに打ち抜きを施すことによって、平板状や枠状の形状に製作される。そして、絶縁基体４は、これらの平板状や枠状の複数枚のグリーンシートを積層し、焼成することによって製作される。   The board | substrate 2 and the frame 3 are manufactured by the shape of a flat plate or a frame shape by stamping the flat green sheet using a metal mold | die. The insulating substrate 4 is manufactured by laminating and baking a plurality of these flat or frame green sheets.

絶縁基体４の側面または角部には、絶縁基体４の下面から枠体３の上面にかけて溝状の凹部５が設けられている。この凹部５の横断面形状は、曲面形状を有しており、例えば、半円形状となっている。なお、この凹部５の横断面形状は、半円形状に限らず、半長円形状、半楕円形状等であってもよく、形状は限定されない。   A groove-shaped recess 5 is provided on the side surface or corner of the insulating substrate 4 from the lower surface of the insulating substrate 4 to the upper surface of the frame 3. The cross-sectional shape of the recess 5 has a curved surface shape, for example, a semicircular shape. In addition, the cross-sectional shape of this recessed part 5 is not restricted to a semicircle shape, A semi-oval shape, a semi-elliptical shape, etc. may be sufficient, and a shape is not limited.

凹部５は、図３に示すように、枠体３の上面側に設けられた第１の凹部５ａと第１の凹部５ａの下側で絶縁基体４の下面から設けられた第２の凹部５ｂを有している。なお、図３は、絶縁基体４の角部の周辺部に位置する凹部５を絶縁基体４の下から見た斜視図であり、絶縁基体４の角部および側面の凹部５の拡大図である。そして、第２の凹部５ｂは、平面視において中央部の内壁面が第１の凹部５ａの中央部の内壁面と同一面をなしている。さらに、第２の凹部５ｂの両側の内壁面が第１の凹部５ａの両側の内壁面よりも絶縁基体４の内側に後退している。中央部の内壁面とは、第２の凹部５ｂの両側の内壁面が絶縁基体４の内側に後退している部分よりも中央部側に位置している内壁面のことをいう。   As shown in FIG. 3, the recess 5 includes a first recess 5 a provided on the upper surface side of the frame 3 and a second recess 5 b provided from the lower surface of the insulating base 4 below the first recess 5 a. have. FIG. 3 is a perspective view of the concave portion 5 located in the peripheral portion of the corner portion of the insulating base 4 as viewed from below the insulating base 4 and is an enlarged view of the corner portion of the insulating base 4 and the concave portion 5 on the side surface. . And the 2nd recessed part 5b has comprised the inner wall face of the center part in the planar view, and the same inner surface as the inner wall face of the center part of the 1st recessed part 5a. Furthermore, the inner wall surfaces on both sides of the second recess 5b are set back inside the insulating base 4 with respect to the inner wall surfaces on both sides of the first recess 5a. The inner wall surface of the central portion refers to an inner wall surface that is located closer to the center than the portion where the inner wall surfaces on both sides of the second recess 5b are retracted to the inside of the insulating base 4.

第２の凹部５ｂは、図３に示すように、両側の内壁面が第１の凹部５ａの両側の内壁面よりも絶縁基体４の内側に後退している。すなわち、第２の凹部５ｂは、内壁面の中央から端部に向かう途中から両側の内壁面が絶縁基体４の内側に後退している。なお、第２の凹部５ｂは、平面視して絶縁基体４の内側に直線的に後退しても、曲線的に後退してもよい。また、第２の凹部５ｂは、図３に示すように、両側の内壁面が絶縁基体４の内側に後退している後退部８を有しているため、凹部５の両側の内壁面の形状は、第１の凹部５ａと第２の凹部５ｂとでは異なっている。第２の凹部５ｂの後退部８は、図３に示すように、第１の凹部５ａと第２の凹部５ｂとの境界部で段差部８ａが生じるように設けられる。凹部５の後退部８は、平面視して第２の凹部５ｂの両側の内壁面の端部が第１の凹部５ａの両側の内壁面の端部よりも隣り合う凹部５側に位置して拡がるように設けられている。   As shown in FIG. 3, the second recess 5b has inner wall surfaces on both sides set back from the inner wall surfaces on both sides of the first recess 5a. That is, in the second recess 5 b, the inner wall surfaces on both sides recede to the inside of the insulating base 4 from the middle toward the end from the center of the inner wall surface. Note that the second recess 5b may recede linearly or inwardly in the insulating base 4 in plan view. Further, as shown in FIG. 3, the second recess 5 b has the receding portions 8 whose inner wall surfaces on both sides recede to the inside of the insulating base 4, so that the shape of the inner wall surfaces on both sides of the recess 5 is formed. Is different between the first recess 5a and the second recess 5b. As shown in FIG. 3, the receding portion 8 of the second concave portion 5b is provided such that a stepped portion 8a is generated at the boundary portion between the first concave portion 5a and the second concave portion 5b. The recesses 8 of the recess 5 are positioned so that the end portions of the inner wall surfaces on both sides of the second recess 5b are located closer to the recess 5 side than the end portions of the inner wall surfaces on both sides of the first recess 5a in plan view. It is provided to expand.

また、絶縁基体４の搭載部１の周辺から凹部５の内壁面に配線導体６が導出されている。
配線導体６のうち、図２に示すように、搭載部１の周辺に露出した部位に電子部品９の上面の電極がボンディングワイヤ等を介して電気的に接続される。また、電子部品９の下面に電極が設けられている場合は、電子部品９は、接合材を介して配線導体６に電気的に接続される。 A wiring conductor 6 is led out from the periphery of the mounting portion 1 of the insulating base 4 to the inner wall surface of the recess 5.
As shown in FIG. 2 in the wiring conductor 6, the electrode on the upper surface of the electronic component 9 is electrically connected to a portion exposed around the mounting portion 1 via a bonding wire or the like. Moreover, when the electrode is provided in the lower surface of the electronic component 9, the electronic component 9 is electrically connected to the wiring conductor 6 through a bonding material.

外部接続用導体７は、絶縁基体４の下面の外周部から凹部５の内壁面にかけて形成されている。この外部接続用導体７は、配線導体６のうち、凹部５の内壁面に導出されている部位と電気的に接続されている。   The external connection conductor 7 is formed from the outer peripheral portion of the lower surface of the insulating base 4 to the inner wall surface of the recess 5. The external connection conductor 7 is electrically connected to a portion of the wiring conductor 6 that is led out to the inner wall surface of the recess 5.

外部接続用導体７は、図３に示すように、第２の凹部５ｂの中央部の内壁面に形成されている。また、外部接続用導体７は、第２の凹部５ｂの中央部の内壁面に、図３に示すように、第２の凹部５ｂの内壁面の中心部を中央にして左右対称となるように形成されている。また、電子装置は、第２の凹部５ｂの中央部の内壁面で接合材を介して外部接続用導体７に電気的に接続される。なお、接合材は、ロウ材や半田材、銀（Ａｇ）ペースト等の導電性接合材である。   As shown in FIG. 3, the external connection conductor 7 is formed on the inner wall surface of the central portion of the second recess 5b. Further, as shown in FIG. 3, the external connection conductor 7 is symmetrical on the inner wall surface of the center portion of the second recess 5b with the center portion of the inner wall surface of the second recess 5b as the center. Is formed. Further, the electronic device is electrically connected to the external connection conductor 7 via a bonding material on the inner wall surface at the center of the second recess 5b. Note that the bonding material is a conductive bonding material such as a brazing material, a solder material, or a silver (Ag) paste.

電子装置が外部回路基板に接合材を介して接合される場合、第２の凹部５ｂの中央部の内壁面に外部接続用導体７が内壁面の中心部を中央にして左右対称となるように形成されていないと、接合材が第２の凹部５ｂの内壁面の中心部から外部接続用導体７に一様に広
がりにくくなり、外部接続用導体７に接合される接合材の形状や分布に偏りが生じ、局所的な応力が生じやすくなる。これにより、接合材の形状や分布に偏りが生じた部位に絶縁基体４と接合材との熱膨張係数差に起因して生じる応力が局所的に集中しやすくなる。 When the electronic device is bonded to the external circuit board via a bonding material, the external connection conductor 7 is symmetrical on the inner wall surface at the center of the second recess 5b with the center of the inner wall surface at the center. If it is not formed, it becomes difficult for the bonding material to spread uniformly from the center of the inner wall surface of the second recess 5b to the external connection conductor 7, and the shape and distribution of the bonding material bonded to the external connection conductor 7 Unevenness occurs and local stress is likely to occur. As a result, the stress caused by the difference in thermal expansion coefficient between the insulating base 4 and the bonding material is likely to be locally concentrated at a portion where the shape and distribution of the bonding material are biased.

しかしながら、第２の凹部５ｂの内壁面の中心部を中央にして左右対称となるように外部接続用導体７を形成することによって、接合材が第２の凹部５ｂの内壁面の中心部から外部接続用導体７に一様に広がり、内壁面の中心部を中央にして左右対称な応力分布になりやすくなる。これにより、絶縁基体４と接合材との熱膨張係数差に起因して生じる応力が、第２の凹部５ｂの内壁面の中心部から外部接続用導体７の左右に分散されやすくなり、応力が接合部に局所的に集中することが緩和される。したがって、電子装置と外部電気回路基板との接合部における応力が局所的に集中することが抑制される。これによって、接合材が外部接続用導体７から剥がれたり、絶縁基体４や接合材にクラック等が生じたりすることが抑制され、電子装置を正常に作動させることができる。   However, by forming the external connection conductor 7 so as to be bilaterally symmetric with the center of the inner wall surface of the second recess 5b as the center, the bonding material can be externally connected from the center of the inner wall surface of the second recess 5b. It spreads uniformly over the connection conductor 7 and tends to have a symmetrical stress distribution with the center of the inner wall surface at the center. As a result, the stress caused by the difference in thermal expansion coefficient between the insulating base 4 and the bonding material is easily dispersed from the center of the inner wall surface of the second recess 5b to the left and right of the external connection conductor 7, and the stress is increased. The local concentration at the joint is alleviated. Therefore, local concentration of stress at the joint between the electronic device and the external electric circuit board is suppressed. As a result, it is possible to prevent the bonding material from being peeled off from the external connection conductor 7 or to cause cracks or the like in the insulating base 4 or the bonding material, and the electronic device can be operated normally.

また、外部接続用導体７は、図３に示すように、後退部８が形成される部位には設けられていないため、接合材が、第２の凹部５ｂと外部接続用導体７に溜められ、接合材が絶縁基体４の外周部よりも外側にはみ出しにくくなる。これによって、電子装置は、外部電気回路基板に高密度に実装することが可能となる。   Further, as shown in FIG. 3, the external connection conductor 7 is not provided in the portion where the receding portion 8 is formed, so that the bonding material is stored in the second recess 5 b and the external connection conductor 7. The bonding material is less likely to protrude outside the outer peripheral portion of the insulating base 4. As a result, the electronic device can be mounted on the external electric circuit board with high density.

配線導体６および外部接続用導体７は、タングステン、モリブデンまたはマンガン等のメタライズ導体で形成されている。そして、外部接続用導体７は、外部電気回路基板の配線導体に、金（Ａｕ）−錫（Ｓｎ）半田、錫（Ｓｎ）−銀（Ａｇ）−銅（Ｃｕ）半田、Ｓｎ（錫）−銀（Ａｇ）半田等の接合材を介して接続される。これにより、電子部品９は、配線導体６と外部接続用導体７とを介して外部電気回路基板に電気的に接続される。外部電気回路基板は、例えば、プリント回路基板等である。   The wiring conductor 6 and the external connection conductor 7 are formed of a metallized conductor such as tungsten, molybdenum, or manganese. The external connection conductor 7 is connected to the wiring conductor of the external electric circuit board by gold (Au) -tin (Sn) solder, tin (Sn) -silver (Ag) -copper (Cu) solder, Sn (tin)- They are connected via a bonding material such as silver (Ag) solder. As a result, the electronic component 9 is electrically connected to the external electric circuit board via the wiring conductor 6 and the external connection conductor 7. The external electric circuit board is, for example, a printed circuit board.

配線導体６および外部接続用導体７は、セラミックグリーンシートに、例えば、タングステン、モリブデンまたはマンガン等の粉末に有機溶剤、溶媒を添加混合してなる金属ペーストを予め周知のスクリーン印刷法によって所定パターンに印刷塗布することによって形成される。また、封止部材１０が、金属材料から成る蓋体である場合には、絶縁基体４の枠体３の上面には、同じようにして、蓋体との接合部に該当する位置に接合用メタライズ層が枠状に形成される。   The wiring conductor 6 and the external connection conductor 7 are formed in a predetermined pattern by a well-known screen printing method in advance by using, for example, a metal paste obtained by adding an organic solvent and a solvent to a ceramic green sheet and powder of tungsten, molybdenum, manganese, or the like. It is formed by printing. When the sealing member 10 is a lid made of a metal material, the upper surface of the frame body 3 of the insulating base 4 is joined in the same manner at a position corresponding to a joint portion with the lid body. The metallized layer is formed in a frame shape.

また、電子装置は、搭載部１を覆うように絶縁基体４に取着されて絶縁基体４との間に電子部品９を収納する封止部材１０を備えている。封止部材１０は、電子部品９を気密に封止するものであれば、樹脂材料やガラス系材料等であっても、金属材料から成る蓋体であってもよい。封止部材１０は、例えば、エポキシ樹脂、シリコーン樹脂または低融点ガラス等である。また、蓋体の場合、封止部材１０は、例えば、鉄（Ｆｅ）−ニッケル（Ｎｉ）−コバルト（Ｃｏ）合金等である。これらの封止部材１０が、絶縁基体４に基板２の搭載部１を覆うように取着される。   In addition, the electronic device includes a sealing member 10 that is attached to the insulating base 4 so as to cover the mounting portion 1 and that houses the electronic component 9 between the insulating base 4. As long as the sealing member 10 seals the electronic component 9 in an airtight manner, the sealing member 10 may be a resin material, a glass-based material, or the like, or a lid made of a metal material. The sealing member 10 is, for example, an epoxy resin, a silicone resin, low-melting glass, or the like. In the case of a lid, the sealing member 10 is, for example, an iron (Fe) -nickel (Ni) -cobalt (Co) alloy. These sealing members 10 are attached to the insulating base 4 so as to cover the mounting portion 1 of the substrate 2.

また、配線導体６、外部接続用導体７および接続用メタライズ層の露出表面に、メッキ形成方法によって、ニッケルメッキ層および金メッキ層を順次被着させておくのがよい。なお、ニッケルメッキ層のメッキ厚みは、０．５（μｍ）以上９（μｍ）以下である。また、金メッキ層のメッキ厚みは、０．５（μｍ）以上５（μｍ）以下である。これらの金属メッキ層は、配線導体６、外部接続用導体７および接合用メタライズ層が酸化腐蝕するのを抑制することができる。また、搭載部１の周辺の配線導体６と電子部品９の電極との電気的な接続や、外部接続用導体７と外部電気回路基板の配線導体との電気的な接続を良好なものにすることができる。また、枠体３の接合用メタライズ層と封止部材１０との接合を良好なものにすることができる。   Further, it is preferable that a nickel plating layer and a gold plating layer are sequentially deposited on the exposed surfaces of the wiring conductor 6, the external connection conductor 7 and the connection metallization layer by a plating method. The plating thickness of the nickel plating layer is 0.5 (μm) or more and 9 (μm) or less. The plating thickness of the gold plating layer is 0.5 (μm) or more and 5 (μm) or less. These metal plating layers can suppress the oxidative corrosion of the wiring conductor 6, the external connection conductor 7, and the bonding metallization layer. Further, the electrical connection between the wiring conductor 6 around the mounting portion 1 and the electrode of the electronic component 9 and the electrical connection between the external connection conductor 7 and the wiring conductor of the external electric circuit board are improved. be able to. Further, the bonding between the metallization layer for bonding of the frame body 3 and the sealing member 10 can be improved.

本実施形態の電子部品収納用パッケージは、第２の凹部５ｂが、平面視において中央部の内壁面が第１の凹部５ａの中央部の内壁面と同一面をなし、第２の凹部５ｂの両側の内壁面が第１の凹部５ａの両側の内壁面よりも絶縁基体４の内側に後退している。   In the electronic component storage package of the present embodiment, the second recess 5b has an inner wall surface in the center portion that is flush with the inner wall surface in the center portion of the first recess 5a in plan view, and the second recess 5b The inner wall surfaces on both sides recede to the inside of the insulating base 4 from the inner wall surfaces on both sides of the first recess 5a.

第１の凹部５ａおよび第２の凹部５ｂの中央部の内壁面が、絶縁基体４の枠体３の上面から絶縁基体４の基板２の下面にかけて曲面形状で同一面にない場合には、凹部５の内壁面において第１の凹部５ａおよび第２の凹部５ｂの境界部には段差部が形成されることになり、この段差部に絶縁基体４と接合材との熱膨張係数差に起因した応力が集中しやくなる。そして、応力が集中した段差部の部分を起点にして、絶縁基体４や接合材にクラックや剥がれ等が発生しやすくなる。   If the inner wall surfaces of the central portions of the first recess 5a and the second recess 5b are curved and not coplanar from the upper surface of the frame 3 of the insulating base 4 to the lower surface of the substrate 2 of the insulating base 4, 5 is formed at the boundary between the first recess 5a and the second recess 5b on the inner wall surface, and this step is caused by a difference in thermal expansion coefficient between the insulating substrate 4 and the bonding material. Stress tends to concentrate. Then, starting from the stepped portion where the stress is concentrated, the insulating base 4 and the bonding material are likely to be cracked or peeled off.

しかしながら、第２の凹部５ｂが、平面視において中央部の内壁面が第１の凹部５ａの中央部の内壁面と同一面をなしているため、境界部に段差部が存在することがなく、第１の凹部５ａおよび第２の凹部５ｂは、その境界部に熱膨張係数差に起因した応力が集中しにくく、絶縁基体４や接合材にクラックや剥がれが発生しにくくなる。   However, since the second recessed portion 5b has the same inner surface as the inner wall surface of the central portion of the first recessed portion 5a in plan view, there is no stepped portion at the boundary, In the first concave portion 5a and the second concave portion 5b, stress due to the difference in thermal expansion coefficient is unlikely to concentrate at the boundary portion, and cracks and peeling are less likely to occur in the insulating base 4 and the bonding material.

また、絶縁基体４の凹部５の中央部の内壁面は、絶縁基体４、外部接続用導体７および接合材の各部材が位置しており、それぞれを構成している材料が異なっているため、それぞれの異なる材料に起因する応力が発生しやすくなる。しかしながら、凹部５は、第１の凹部５ａおよび第２の凹部５ｂのそれぞれの中央部の内壁面が、絶縁基体４の枠体３上面から絶縁基体４の基板２の下面にかけて曲面形状で同一面となるように設けられているため、絶縁基体４の凹部５に位置する部材と接合材との熱膨張係数差に起因して生じる応力が、同一面で設けられている第２の凹部５ｂおよび第１の凹部５ａの中央部の内壁面を介してその周囲に分散される。これによって、絶縁基体４は、凹部５と接合材との接合界面に生じる応力に起因したクラックや剥がれ等の発生が抑制される。   In addition, the inner wall surface of the central portion of the recess 5 of the insulating base 4 has the insulating base 4, the external connection conductor 7, and each member of the bonding material positioned, and the materials constituting each are different. Stress due to different materials is likely to occur. However, the inner surface of the central portion of each of the first concave portion 5a and the second concave portion 5b has a curved surface from the upper surface of the frame 3 of the insulating base 4 to the lower surface of the substrate 2 of the insulating base 4, and the concave portion 5 has the same surface. Since the stress generated due to the difference in thermal expansion coefficient between the member located in the recess 5 of the insulating base 4 and the bonding material is provided on the same surface, Dispersed around the inner wall surface of the central portion of the first recess 5a. As a result, the insulating substrate 4 is restrained from being cracked or peeled off due to the stress generated at the bonding interface between the recess 5 and the bonding material.

また、第２の凹部５ｂは、両側の内壁面が第１の凹部５ａの両側の内壁面よりも絶縁基体４の内側に後退しているため、この後退部８と第１の凹部５ａとの境界部で段差部８ａが形成される。この段差部８ａにより、第２の凹部５ｂに形成された外部接続用導体７に接合材が塗布されても、接合材が枠体３に向かって濡れ拡がる接合材の盛り上がりを抑制することができる。すなわち、外部接続用導体７と外部電気回路基板とを接合する接合材の濡れ拡がりを抑制することができる。   In addition, since the inner wall surfaces on both sides of the second recess 5b recede to the inner side of the insulating base 4 than the inner wall surfaces on both sides of the first recess 5a, the second recess 5b is formed between the recess 8b and the first recess 5a. A step 8a is formed at the boundary. Even if the bonding material is applied to the external connection conductor 7 formed in the second recess 5b, the stepped portion 8a can suppress the swelling of the bonding material in which the bonding material spreads toward the frame 3. . That is, wetting and spreading of the bonding material for bonding the external connection conductor 7 and the external electric circuit board can be suppressed.

さらに、絶縁基体４と接合材との熱膨張係数差に起因して生じる応力が、後退部８によって緩やかにされた第２の凹部５ｂの両側の内壁面に分散されて、絶縁基体４や接合材に生じるクラックや剥がれ等の発生が抑制される。   Further, the stress generated due to the difference in thermal expansion coefficient between the insulating base 4 and the bonding material is dispersed on the inner wall surfaces on both sides of the second recess 5b which is moderated by the receding portion 8, and the insulating base 4 and the bonding material are bonded. Generation | occurrence | production of the crack, peeling, etc. which arise in a material is suppressed.

＜電子部品収納用パッケージ、および電子装置の製造方法＞
ここで、電子部品収納用パッケージ、およびこれを備えた電子装置の製造方法を説明する。 <Electronic Component Storage Package and Electronic Device Manufacturing Method>
Here, an electronic component storage package and a method of manufacturing an electronic device including the same will be described.

絶縁基体４は、基板２と枠体３で構成されており、例えば、金型を用いて平板形状のグリーンシートに打ち抜きを施すことによって、平板形状や枠形状に合わせて製作される。また、配線導体６、外部接続用導体７は、セラミックグリーンシートに、例えば、タングステン、モリブデンまたはマンガン等の粉末に有機溶剤、溶媒を添加混合してなる金属ペーストを予め周知のスクリーン印刷法により所定パターンに印刷塗布しておくことによって形成される。   The insulating base 4 is composed of a substrate 2 and a frame 3, and is manufactured according to a flat plate shape or a frame shape, for example, by punching a flat green sheet using a mold. In addition, the wiring conductor 6 and the external connection conductor 7 are predetermined by a well-known screen printing method in advance by using a ceramic paste and a metal paste obtained by adding an organic solvent and a solvent to a powder of tungsten, molybdenum, manganese, or the like. It is formed by printing and applying to a pattern.

そして、これら平板形状や枠体形状のセラミックグリーンシートを複数積層することに
よって絶縁基体４が形成される。また、絶縁基体４は、枠体３の上面に、例えば、金属材料から成る蓋体として封止部材１０が設けられる場合には、封止部材１０と接合される部分に接合用メタライズ層が形成される。 And the insulating base | substrate 4 is formed by laminating | stacking two or more of these flat plate-shaped and frame-shaped ceramic green sheets. Further, in the insulating base 4, when the sealing member 10 is provided on the upper surface of the frame 3 as a lid made of a metal material, for example, a bonding metallized layer is formed at a portion to be bonded to the sealing member 10. Is done.

積層されたセラミックグリーンシートを、焼成することによって、電子部品収納用パッケージとなる。また、配線導体６、外部接続用導体７および接続用メタライズ層が露出している表面には、例えば、厚みが、１（μｍ）〜１０（μｍ）のニッケルメッキ層と厚みが、０．１（μｍ）〜３（μｍ）の金メッキ層とが被着される。   By firing the laminated ceramic green sheets, an electronic component storage package is obtained. Further, on the surface on which the wiring conductor 6, the external connection conductor 7 and the connection metallization layer are exposed, for example, a nickel plating layer having a thickness of 1 (μm) to 10 (μm) and a thickness of 0.1 (Μm) to 3 (μm) gold plating layer is applied.

また、封止部材１０が蓋体である場合、蓋体は、例えば、鉄（Ｆｅ）−ニッケル（Ｎｉ）−コバルト（Ｃｏ）合金を型枠に鋳込んで作製したインゴットを周知の切削加工や打ち抜き加工等の金属加工法を用いて所定の形状にして製作される。   In the case where the sealing member 10 is a lid, the lid is, for example, an ingot produced by casting iron (Fe) -nickel (Ni) -cobalt (Co) alloy into a mold, It is manufactured in a predetermined shape using a metal processing method such as punching.

ここで、電子装置の製造方法について説明する。   Here, a method for manufacturing the electronic device will be described.

電子装置は、電子部品子収納用パッケーの基板２の載置部１に電子部品９を、例えば、金（Ａｕ）−錫（Ｓｎ）半田または金（Ａｕ）−ゲルマニウム(Ｇｅ)半田等の材料で接着固定する。そして、電子部品９の上面に設けられている電極がボンディングワイヤ等を介して配線導体６に電気的に接続される。次に、封止部材１０として蓋体が、絶縁基体４に基板２の搭載部１を覆うように絶縁基体４に取着されて絶縁基体４との間に電子部品９を収納するように設けられる。そして、絶縁基体４と封止部材１０との間に電子部品９を気密に収納して電子装置とする。   In the electronic apparatus, the electronic component 9 is placed on the placement portion 1 of the substrate 2 of the electronic component storage package, for example, a material such as gold (Au) -tin (Sn) solder or gold (Au) -germanium (Ge) solder. Glue and fix with. And the electrode provided in the upper surface of the electronic component 9 is electrically connected to the wiring conductor 6 via a bonding wire etc. Next, a lid is provided as a sealing member 10 so as to be attached to the insulating base 4 so as to cover the mounting portion 1 of the substrate 2 on the insulating base 4 and to store the electronic component 9 between the insulating base 4. It is done. Then, the electronic component 9 is hermetically accommodated between the insulating base 4 and the sealing member 10 to obtain an electronic device.

また、封止部材１０がエポキシ樹脂、シリコーン樹脂や低融点ガラス等である場合、これらの封止部材１０が、絶縁基体４に基板２の搭載部１を覆うように枠体３の開口に充填され、絶縁基体４に取着される。そして、絶縁基体４との間に電子部品９が収納される。   When the sealing member 10 is an epoxy resin, a silicone resin, low-melting glass, or the like, the sealing member 10 fills the opening of the frame 3 so that the insulating base 4 covers the mounting portion 1 of the substrate 2. And attached to the insulating substrate 4. The electronic component 9 is accommodated between the insulating base 4.

本発明は上述の実施の形態に限定されるものではなく、本発明の要旨を逸脱しない範囲において種々の変更、改良等が可能である。以下、本実施形態の変形例について説明する。なお、本実施形態の変形例に係る電子部品収納用パッケージのうち、本実施形態に係る電子部品収納用パッケージと同様な部分については、同一の符号を付して適宜説明を省略する。   The present invention is not limited to the above-described embodiments, and various changes and improvements can be made without departing from the scope of the present invention. Hereinafter, modifications of the present embodiment will be described. Note that, in the electronic component storage package according to the modification of the present embodiment, the same parts as those of the electronic component storage package according to the present embodiment are denoted by the same reference numerals, and description thereof will be omitted as appropriate.

＜変形例１＞
本実施形態に係る変形例の電子部品収納用パッケージは、図４に示すように、外部接続用導体７が、第２の凹部５ｂの中央部の内壁面に加えて、後退部８にも形成されている。 <Modification 1>
As shown in FIG. 4, in the electronic component storage package according to the modified example of the present embodiment, the external connection conductor 7 is formed on the receding portion 8 in addition to the inner wall surface of the central portion of the second recess 5 b. Has been.

後退部８に、外部接続用導体７が設けられているため、基板２と接合材との熱膨張係数差に起因して生じる応力が、第２の凹部５ｂと後退部８との境界部に集中せず、後退部８に接合された接合材を介して第２の凹部５ｂと後退部８に分散される。これにより、これらの応力が絶縁基体４や接合材に作用して生じるクラックや剥がれ等の発生が抑制される。   Since the external connection conductor 7 is provided in the receding portion 8, the stress caused by the difference in thermal expansion coefficient between the substrate 2 and the bonding material is applied to the boundary portion between the second concave portion 5 b and the receding portion 8. Instead of being concentrated, the second concave portion 5b and the receding portion 8 are dispersed through the bonding material joined to the receding portion 8. Thereby, generation | occurrence | production of the crack, peeling, etc. which arise when these stress acts on the insulation base | substrate 4 and a joining material is suppressed.

また、第２の凹部５ｂの後退部８は、第１の凹部５ａの外周部との間で段差部８ａが生じるように設けられているが、この段差部８ａにも外部接続用導体７を設けてもよい。これによって、接合材は段差部８ａに濡れ拡がるように形成され、電子装置を外部電気回路基板に実装する際に、接合面積が増加するため接合強度を向上することができ、電子装置の信頼性を向上することができる。   Further, the receding portion 8 of the second concave portion 5b is provided so as to form a step portion 8a between the outer peripheral portion of the first concave portion 5a, and the external connection conductor 7 is also provided on the step portion 8a. It may be provided. As a result, the bonding material is formed so as to spread over the stepped portion 8a, and when the electronic device is mounted on the external electric circuit board, the bonding area increases, so that the bonding strength can be improved, and the reliability of the electronic device is improved. Can be improved.

１ 搭載部
２ 基板
３ 枠体
４ 絶縁基体
５ 凹部
５ａ 第１の凹部
５ｂ 第２の凹部
６ 配線導体
７ 外部接続用導体
８ 後退部
８ａ 段差部
９ 電子部品
１０ 封止部材 DESCRIPTION OF SYMBOLS 1 Mounting part 2 Board | substrate 3 Frame 4 Insulation base | substrate 5 Recessed part 5a 1st recessed part 5b 2nd recessed part 6 Wiring conductor 7 External connection conductor 8 Recessed part 8a Step part 9 Electronic component 10 Sealing member

Claims (3)

平面視したときに外形が四角形状であり、上側主面に電子部品の搭載部を有する基板および前記搭載部を取り囲むように前記上側主面に取着された枠体から成る絶縁基体と、
該絶縁基体の側面または角部に下面から前記枠体の上面にかけて設けられた溝状の凹部と、
前記絶縁基体の前記搭載部の周辺から前記凹部の内壁面に導出された配線導体と、
前記絶縁基体の前記下面の外周部から前記凹部の内壁面にかけて形成された、前記配線導体と接続された外部接続用導体とを備えており、
前記凹部は、前記枠体の上面側に設けられた第１の凹部と該第１の凹部の下側で前記下面から設けられた第２の凹部を有しており、該第２の凹部は、平面視において中央部の内壁面が前記第１の凹部の中央部の内壁面と同一面をなし、両側の内壁面が前記第１の凹部の両側の内壁面よりも前記絶縁基体の内側に後退していることを特徴とする電子部品収納用パッケージ。 When viewed in plan, the outer shape is rectangular, an insulating substrate comprising a substrate having an electronic component mounting portion on the upper main surface and a frame attached to the upper main surface so as to surround the mounting portion;
A groove-like recess provided on the side or corner of the insulating substrate from the lower surface to the upper surface of the frame;
A wiring conductor led to the inner wall surface of the recess from the periphery of the mounting portion of the insulating base;
An external connection conductor connected to the wiring conductor, formed from the outer peripheral portion of the lower surface of the insulating base to the inner wall surface of the recess;
The concave portion has a first concave portion provided on the upper surface side of the frame body and a second concave portion provided from the lower surface on the lower side of the first concave portion, and the second concave portion is In plan view, the inner wall surface of the central portion is flush with the inner wall surface of the central portion of the first recess, and the inner wall surfaces on both sides are closer to the inside of the insulating base than the inner wall surfaces on both sides of the first recess. An electronic component storage package characterized by being retracted. 請求項１に記載の電子部品収納用パッケージであって、
前記第２の凹部は、内壁面の全面にわたって前記外部接続用導体が形成されていることを特徴とする電子部品収納用パッケージ。 The electronic component storage package according to claim 1,
The electronic component housing package, wherein the second recess is formed with the external connection conductor over the entire inner wall surface. 請求項１または請求項２に記載の電子部品収納用パッケージと、
前記搭載部に搭載されて、前記配線導体に電気的に接続された電子部品と、
前記搭載部を覆うように前記絶縁基体に取着されて前記絶縁基体との間に前記電子部品を収納する封止部材と
を備えたことを特徴とする電子装置。 The electronic component storage package according to claim 1 or 2,
An electronic component mounted on the mounting portion and electrically connected to the wiring conductor;
An electronic device comprising: a sealing member that is attached to the insulating base so as to cover the mounting portion and that stores the electronic component between the insulating base.
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016006846A (en) * 2014-05-27 2016-01-14 京セラ株式会社 Wiring board and electronic apparatus
USD822629S1 (en) 2017-01-26 2018-07-10 Kyocera Corporation Semiconductor package
US10777493B2 (en) 2016-07-28 2020-09-15 Kyocera Corporation Semiconductor device mounting board and semiconductor package
CN114420676A (en) * 2022-03-31 2022-04-29 长电集成电路(绍兴)有限公司 Chip-scale packaging structure capable of reducing warpage and preparation method thereof

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000323601A (en) * 1999-05-06 2000-11-24 Murata Mfg Co Ltd Electronic part and package therefor
WO2009028289A1 (en) * 2007-08-29 2009-03-05 Murata Manufacturing Co., Ltd. Ceramic multilayer substrate

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000323601A (en) * 1999-05-06 2000-11-24 Murata Mfg Co Ltd Electronic part and package therefor
WO2009028289A1 (en) * 2007-08-29 2009-03-05 Murata Manufacturing Co., Ltd. Ceramic multilayer substrate

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016006846A (en) * 2014-05-27 2016-01-14 京セラ株式会社 Wiring board and electronic apparatus
US10777493B2 (en) 2016-07-28 2020-09-15 Kyocera Corporation Semiconductor device mounting board and semiconductor package
USD822629S1 (en) 2017-01-26 2018-07-10 Kyocera Corporation Semiconductor package
CN114420676A (en) * 2022-03-31 2022-04-29 长电集成电路(绍兴)有限公司 Chip-scale packaging structure capable of reducing warpage and preparation method thereof
CN114420676B (en) * 2022-03-31 2022-06-14 长电集成电路(绍兴)有限公司 Chip-scale packaging structure capable of reducing warpage and preparation method thereof

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