JP2011066372A - Circuit board manufacturing method - Google Patents

Circuit board manufacturing method Download PDF

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JP2011066372A
JP2011066372A JP2009247483A JP2009247483A JP2011066372A JP 2011066372 A JP2011066372 A JP 2011066372A JP 2009247483 A JP2009247483 A JP 2009247483A JP 2009247483 A JP2009247483 A JP 2009247483A JP 2011066372 A JP2011066372 A JP 2011066372A
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circuit board
board
circuit
layer
manufacturing
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JP5362519B2 (en
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Chin-Chung Chang
張欽崇
Chen-Chuan Chang
張振銓
Hung-Lin Chang
張宏麟
Han Pei Huang
黄瀚霈
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Unimicron Technology Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a circuit board manufacturing method used to manufacture a circuit board having a locally high wiring density, simplifying steps and reducing a manufacturing cost. <P>SOLUTION: The circuit board manufacturing method includes the following steps. First, a master substrate is cut and divided into a plurality of slave substrates. Then, the slave substrate is disposed in an opening in an inner layer circuit board. The inner layer circuit board has a first circuit layer, a second circuit layer, and a core layer positioned between the first circuit layer and the second circuit layer, wherein the wiring density of the slave substrate is higher than that of the inner layer circuit board. Then, insulating films and metal foil pieces are disposed on the both mating sides of the slave substrate and the inner layer circuit board, and the hot press joining step is performed to integrally couple the metal foil pieces and the insulating films on the both mating sides with the slave substrate and the inner layer circuit board. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

本発明は、回路板の製造方法に関し、且つ高/低配線密度を統合した回路板を製造方法に関する。   The present invention relates to a method for manufacturing a circuit board, and to a method for manufacturing a circuit board that integrates high / low wiring density.

消費性電子製品の市場は、ニーズが大きく、消費者は、機能が強力であることを要求するだけでなく、更に、軽く、薄く、短く、小さいことを要求しているので、市場の電子製品の回路は、益々細密になり、電子部材を取り付けるプリント回路板も多層に発展し、二層、四層から六層、八層へ、更には、十層以上へと変化し、電子部材をプリント回路板上により密集して設置できるようにし、プリント回路板の面積を縮小し、電子製品の体積をより小さくしている。   The market for consumer electronic products is not only demanding, but consumers demand not only that the functions are powerful, but also that they are light, thin, short and small, so the electronic products in the market The printed circuit board to which electronic components are attached has been developed in multiple layers, changing from two layers, four layers to six layers, eight layers, and more than ten layers, and printing electronic components. It is possible to install more densely on the circuit board, reducing the area of the printed circuit board and reducing the volume of the electronic product.

しかしながら、プリント回路板の層数が益々多くなるに伴い、製造のステップも極めて複雑になり、製造時間も長くなっている。高配線密度の回路を製造する為、プリント回路板の層数は、しばしば四層を超過するが、四層のプリント回路板を製造する時、フィルム、銅箔を内層回路と１つにプレス接合するのに必要な時間だけで、約数時間を要し、更に後続の処理ステップを加えた場合、約５時間を要する。製造するプリント回路板が四層以上の多層板、例えば、六層、八層、十層のプリント回路板である場合、プレス接合に必要な時間がより長くなるので、製造コストが過度に高くなる。   However, as the number of layers of printed circuit boards increases, the manufacturing steps become extremely complicated and the manufacturing time increases. In order to manufacture high wiring density circuits, the number of printed circuit board layers often exceeds four, but when manufacturing four-layer printed circuit boards, film and copper foil are press bonded to the inner circuit. Only the time required to do this takes about several hours, and if further processing steps are added, it takes about 5 hours. If the printed circuit board to be manufactured is a multilayer board having four or more layers, for example, a six-layer, eight-layer, or ten-layer printed circuit board, the time required for press bonding becomes longer, resulting in an excessively high manufacturing cost. .

相対して述べれば、低配線密度のプリント回路板は、層数が少ないことにより、製造のステップが比較的少なく、比較的短い時間内に完成できるので、生産量が高く、コストが低くなり、従って、業界は、比較的少ないステップで高配線密度のプリント回路板を製造することを希望している。注意すべきことは、局部的に高配線密度な回路板において、高配線密度の領域は、回路板全体の一部分を占めるだけであり、その残りの領域は、通常配置（低配線密度）の回路であるが、製造工程において新しいものを創造することの妨げになり、従来の製造方法は、依然として長い時間を必要とするので、製造コストが減少せず、経済効果に適合しない。   In other words, printed circuit boards with low wiring density have fewer production steps and can be completed in a relatively short time due to the small number of layers, resulting in high production and low cost. Accordingly, the industry desires to produce high wiring density printed circuit boards with relatively few steps. It should be noted that in a locally high wiring density circuit board, the high wiring density area occupies only a part of the entire circuit board, and the remaining area is a circuit with a normal layout (low wiring density). However, it obstructs the creation of new ones in the manufacturing process, and the conventional manufacturing method still requires a long time, so that the manufacturing cost is not reduced and the economic effect is not adapted.

本発明は、局部的に高配線密度な回路板を製造することに用い、ステップを簡易化し、製造コストを減少させることができる回路板の製造方法を提供する。   The present invention provides a method of manufacturing a circuit board that can be used to manufacture a circuit board having a high wiring density locally, simplifying steps and reducing manufacturing costs.

本発明が提示する回路板の製造方法は、以下のステップを含む。先ず、親基板（circuit mother board）を切断し、親基板を複数の子基板（circuit daughter board）に分離する。続いて、子基板を内層回路板の開口中に配置し、内層回路板が第１回路層と、第２回路層と、第１回路層及び第２回路層の間に位置するコア層と、を有し、そのうち、子基板の配線密度が内層回路板の配線密度より大きい。その後、絶縁フィルム及び金属箔片を子基板及び内層回路板の相対する両側にそれぞれ配置し、熱プレス接合ステップを行い、相対する両側の金属箔片、絶縁フィルムを子基板及び内層回路板と一体に結合する。   The circuit board manufacturing method presented by the present invention includes the following steps. First, a mother board (circuit mother board) is cut, and the parent board is separated into a plurality of child daughter boards (circuit daughter boards). Subsequently, the daughter board is disposed in the opening of the inner circuit board, and the inner circuit board is positioned between the first circuit layer, the second circuit layer, and the first circuit layer and the second circuit layer, Of which the wiring density of the sub-board is larger than the wiring density of the inner circuit board. After that, the insulating film and the metal foil piece are respectively arranged on opposite sides of the daughter board and the inner layer circuit board, and a heat press bonding step is performed, and the opposite metal foil pieces and the insulating film are integrated with the child board and the inner layer circuit board. To join.

本発明の一実施例では、上記熱プレス接合ステップを完成後、相対する両側の金属箔片、絶縁フィルム及び内層回路板を貫通する通孔を形成することを更に含む。   In one embodiment of the present invention, after completing the hot press bonding step, the method further includes forming a through-hole penetrating the opposing metal foil pieces, the insulating film, and the inner circuit board.

本発明の一実施例では、上記熱プレス接合ステップを完成後、それぞれ内層回路板上の第１回路層及び第２回路層を露出させる複数のブラインドビアを形成することを更に含む。本発明の一実施例では、上記のブラインドビアが子基板の少なくとも一側に位置する接続パッドを更に露出する。   In one embodiment of the present invention, after completing the hot press bonding step, the method further includes forming a plurality of blind vias exposing the first circuit layer and the second circuit layer on the inner circuit board, respectively. In one embodiment of the present invention, the blind via further exposes a connection pad located on at least one side of the daughter board.

本発明の一実施例では、上記通孔及びブラインドビアを完成後、相対する両側の金属箔片、子基板及び内層回路板中の少なくとも２つを電気接続する通孔鍍金工程を行うことを更に含む。   In one embodiment of the present invention, after the through hole and the blind via are completed, a through hole plating step of electrically connecting at least two of the metal foil pieces on the opposite sides, the daughter board, and the inner layer circuit board is further performed. Including.

本発明の一実施例では、上記熱プレス接合ステップを完成後、相対する両側の金属箔片をパターン化し、２つのパターン化回路層を形成することを更に含む。   In one embodiment of the present invention, after completing the hot press bonding step, the method further includes patterning the opposing metal foil pieces to form two patterned circuit layers.

本発明の一実施例では、上記熱プレス接合ステップを完成後、型抜きフィルムを子基板の少なくとも一側上に形成し、同様に子基板の少なくとも一側に位置する絶縁フィルムを隔離することを更に含む。   In one embodiment of the present invention, after completing the hot press bonding step, a die-cut film is formed on at least one side of the daughter board, and the insulating film located on at least one side of the daughter board is similarly isolated. In addition.

本発明の一実施例では、上記型抜きフィルムを形成後、少なくとも１つの所定開口領域をレーザで切断し、少なくとも１つの所定開口領域をカバーする絶縁フィルムの一部分及び金属箔片の一部分を除去する。その後、型抜きフィルムを除去し、子基板を少なくとも１つの開口領域中に露出させる。   In one embodiment of the present invention, after forming the die-cut film, at least one predetermined opening area is cut with a laser, and a part of the insulating film and a part of the metal foil piece covering the at least one predetermined opening area are removed. . Thereafter, the die-cut film is removed, and the daughter board is exposed in at least one opening region.

本発明の一実施例では、上記子基板が四層以上の回路層を有する。   In one embodiment of the present invention, the sub-board has four or more circuit layers.

本発明の一実施例では、上記子基板の層数が内層回路板の層数より大きい。   In an embodiment of the present invention, the number of layers of the sub-board is larger than the number of layers of the inner circuit board.

本発明の一実施例では、上記子基板がコア層中に埋め込まれ、且つ相対する両側の絶縁フィルムが子基板の周囲をカバーする。   In one embodiment of the present invention, the daughter board is embedded in the core layer, and the insulating films on opposite sides cover the circumference of the daughter board.

本発明の一実施例では、上記の子基板の厚さが内層回路板の厚さより小さいか等しい。   In one embodiment of the present invention, the thickness of the sub-board is less than or equal to the thickness of the inner circuit board.

上記に基づき、本発明の回路板は、予め完成された高配線密度の子基板を通常配置（低配線密度）の内層回路板中に統合し、２つの絶縁フィルム及び２つのパターン化回路層と一体に結合し、ステップを簡易化し、製造コストを減少させる。従って、回路板は、ただ一度のプレス接合に要する時間のみ必要とし、長い時間を浪費する必要がなく、従来の多層回路板の製造コストを大幅に減少する。   Based on the above, the circuit board of the present invention integrates a pre-finished high-wiring density sub-board into an inner-layer circuit board having a normal arrangement (low wiring density), two insulating films and two patterned circuit layers, Combined to simplify the steps and reduce manufacturing costs. Therefore, the circuit board requires only a time required for one press bonding and does not need to waste a long time, greatly reducing the manufacturing cost of the conventional multilayer circuit board.

本発明の上記及び他の目的、特徴、および利点をより分かり易くするため、図面と併せた幾つかの実施形態を以下に説明する。   In order to make the above and other objects, features and advantages of the present invention more comprehensible, several embodiments accompanied with figures are described below.

本発明の一実施例の回路板の製造方法を示すフロー図である。It is a flowchart which shows the manufacturing method of the circuit board of one Example of this invention. 本発明の一実施例の回路板の製造方法を示すフロー図である。It is a flowchart which shows the manufacturing method of the circuit board of one Example of this invention. 本発明の一実施例の回路板の製造方法を示すフロー図である。It is a flowchart which shows the manufacturing method of the circuit board of one Example of this invention. 本発明の一実施例の回路板の製造方法を示すフロー図である。It is a flowchart which shows the manufacturing method of the circuit board of one Example of this invention. 本発明の一実施例の回路板の製造方法を示すフロー図である。It is a flowchart which shows the manufacturing method of the circuit board of one Example of this invention. 本発明の他の実施例の回路板の製造方法を示すフロー図である。It is a flowchart which shows the manufacturing method of the circuit board of the other Example of this invention. 本発明の他の実施例の回路板の製造方法を示すフロー図である。It is a flowchart which shows the manufacturing method of the circuit board of the other Example of this invention. 本発明の他の実施例の回路板の製造方法を示すフロー図である。It is a flowchart which shows the manufacturing method of the circuit board of the other Example of this invention. 本発明の他の実施例の回路板の製造方法を示すフロー図である。It is a flowchart which shows the manufacturing method of the circuit board of the other Example of this invention. 本発明の他の実施例の回路板の製造方法を示すフロー図である。It is a flowchart which shows the manufacturing method of the circuit board of the other Example of this invention. 本発明の他の実施例の回路板の製造方法を示すフロー図である。It is a flowchart which shows the manufacturing method of the circuit board of the other Example of this invention.

図１Ａ〜図１Ｅは、それぞれ本発明の一実施例の回路板の製造方法を示すフロー図である。図１Ａにおいて、高配線密度を有する回路板１００は、親基板１０を切断することにより得られるものである。親基板１０を複数の子基板１００に分離した後、これら子基板１００は、何れも高配線密度の回路を有し、四層以上の回路層１０２を含み、例えば、六層、八層又は十層である。本実施例では、先ず、多層の回路層１０２及び絶縁層１０４を順にコア基板１０６上に積層し、更に、ブラインドビアＶ及び鍍金した通孔Ｐで回路層１０２の回路を電気接続し、複数の同一配置の子基板１００を親基板１０上に製造する。子基板１００の相対する両側に複数の接続パッドＢを有し、子基板１００上に密集して配列し、子基板１００を高水準処理する電子部材（図示せず）、例えば、ＣＰＵ又はビデオチップ等に電気接続できるようにする。   1A to 1E are flowcharts showing a method of manufacturing a circuit board according to an embodiment of the present invention. In FIG. 1A, a circuit board 100 having a high wiring density is obtained by cutting the parent substrate 10. After separating the parent substrate 10 into a plurality of child substrates 100, each of these child substrates 100 has a high wiring density circuit and includes four or more circuit layers 102, for example, six layers, eight layers, or ten layers. Is a layer. In this embodiment, first, a multilayer circuit layer 102 and an insulating layer 104 are sequentially laminated on the core substrate 106, and the circuit of the circuit layer 102 is electrically connected by blind vias V and plated through holes P, and a plurality of circuit layers 102 are electrically connected. The child boards 100 having the same arrangement are manufactured on the parent board 10. An electronic member (not shown) that has a plurality of connection pads B on opposite sides of the sub board 100, is densely arranged on the sub board 100, and processes the sub board 100 at a high level, for example, a CPU or a video chip So that it can be electrically connected.

続いて、図１Ｂ及び図１Ｃのステップにおいて、高配線密度を完成した子基板１００を内層回路板２００の開口Ｃ中に配置する。内層回路板２００の開口Ｃが、例えば、レーザで所定の形状及び大きさに切断され、寸法が比較的小さい子基板１００を収容することに用いられる。本実施例中、内層回路板２００は、第１回路層２０２と、第２回路層２０４と、第１回路層２０２及び第２回路層２０４間に位置するコア層２０６と、を有するが、図１Ｂから分かるように、子基板１００の配線密度が内層回路板２００の配線密度より大きく、且つ子基板１００の層数（四層以上）も内層回路板２００の層数（二層以上）より高い。
子基板１００の厚さは、概ね、内層回路板２００の厚さより小さい又は等しいものであることができ、設計の必要に応じて決定される。子基板１００がコア層２０６に埋め込まれる時、絶縁フィルム２１２及び金属箔片２１４を回路板１００及び内層回路板２００の相対する両側にそれぞれ配置し、熱プレス接合ステップを行い、上下両側の２つの金属箔片２１４を２つの絶縁フィルム２１２により子基板１００及び内層回路板２００上に固着させ、一体に結合する。 Subsequently, in the steps of FIG. 1B and FIG. 1C, the sub board 100 having a high wiring density is disposed in the opening C of the inner layer circuit board 200. The opening C of the inner layer circuit board 200 is cut into a predetermined shape and size by a laser, for example, and is used to accommodate the sub board 100 having a relatively small size. In this embodiment, the inner layer circuit board 200 includes a first circuit layer 202, a second circuit layer 204, and a core layer 206 positioned between the first circuit layer 202 and the second circuit layer 204. As can be seen from 1B, the wiring density of the sub board 100 is larger than the wiring density of the inner layer circuit board 200, and the number of layers (four layers or more) of the sub board 100 is also higher than the number of layers (two layers or more) of the inner layer circuit board 200. .
The thickness of the sub board 100 can be generally smaller than or equal to the thickness of the inner circuit board 200, and is determined according to the design needs. When the sub-board 100 is embedded in the core layer 206, the insulating film 212 and the metal foil piece 214 are respectively arranged on opposite sides of the circuit board 100 and the inner layer circuit board 200, and a hot press bonding step is performed. The metal foil piece 214 is fixed on the sub board 100 and the inner circuit board 200 by two insulating films 212 and bonded together.

続いて、図１Ｄ及び図１Ｅのステップにおいて、熱プレス接合ステップを完成後、通孔製造工程及び通孔鍍金工程を更に行うことができ、導電材料を通孔Ｐ１及び複数のブラインドビアＶ１中にそれぞれ形成する。通孔Ｐ１は、相対する両側の２つの金属箔片２１４と、２つの絶縁フィルム２１２と、内層回路板２００と、を貫通することができる。複数のブラインドビアＶ１は、内層回路板２００上の第１回路層２０２及び第２回路層２０４をそれぞれ露出させ、子基板１００の相対する両側に位置する接続パッドＢを露出させる。また、通孔鍍金工程は、例えば、導電材料を通孔Ｐ１中に電気鍍金し、相対する両側の２つの金属箔片２１４を内層回路板２００に電気接続し、導電材料をブラインドビアＶ１中に電気鍍金し、相対する両側の２つの金属箔片２１４を子基板１００及び内層回路板２００に電気接続する。   Subsequently, in the steps of FIGS. 1D and 1E, after completing the hot press bonding step, the through hole manufacturing process and the through hole plating process can be further performed, and the conductive material is inserted into the through hole P1 and the plurality of blind vias V1. Form each one. The through hole P <b> 1 can penetrate the two metal foil pieces 214, the two insulating films 212, and the inner layer circuit board 200 on opposite sides. The plurality of blind vias V1 expose the first circuit layer 202 and the second circuit layer 204 on the inner layer circuit board 200, respectively, and expose the connection pads B located on opposite sides of the daughter board 100. Further, in the through hole plating step, for example, the conductive material is electrically plated into the through hole P1, the two metal foil pieces 214 on both sides are electrically connected to the inner circuit board 200, and the conductive material is placed in the blind via V1. Electroplating is performed, and the two metal foil pieces 214 on opposite sides are electrically connected to the daughter board 100 and the inner layer circuit board 200.

詳細に言えば、通孔Ｐ，Ｐ１を形成する方式は、以下の二種がある。（１）実体導電柱を形成する。（２）中空導電中を形成し、該中空導電柱の空室中に更に充填材料を充填することができ、そのうち、充填材料は、以下のように分けることができる。（ａ）導体材料、例えば、金属ペースト又は導電高分子等を含む。（ｂ）絶縁材料、例えば、樹脂材料、セラミック材料又はセラミック材料顆粒分布を有する樹脂材料等を含む。（ｃ）導熱材料、例えば、金属顆粒、金属化合物顆粒又はセラミック材料顆粒分布を有する樹脂材料等を含む。   More specifically, there are the following two types of methods for forming the through holes P and P1. (1) Form an actual conductive pillar. (2) A hollow conductive medium can be formed, and a filling material can be further filled into the vacant space of the hollow conductive column, and the filling material can be divided as follows. (A) A conductive material such as a metal paste or a conductive polymer is included. (B) Insulating materials such as resin materials, ceramic materials, or resin materials having a ceramic material granule distribution are included. (C) A heat conductive material, for example, a resin material having a metal granule, a metal compound granule, or a ceramic material granule distribution is included.

前記導電柱体を形成する方式は、通常、化学気相成長法で通孔表面に無電解鍍金導体層を形成し、且つ/又は該導体層上に電気鍍金法を行い、電解鍍金導体層を形成するものを含む。   The conductive column body is usually formed by forming an electroless plating conductor layer on the surface of the through hole by chemical vapor deposition and / or conducting an electroplating method on the conductor layer, Including those that form.

前記ブラインドビアＶ，Ｖ１を形成する方式は、通常、以下を含む：（１）化学気相成長法でブラインドビア表面に無電解鍍金導体層を形成し、且つ/又は該導体層上に電気鍍金法を行い、電解鍍金導体層を形成し、中空導電柱を有するブラインドビアを形成する。（２）化学気相成長法でブラインドビア表面に無電解鍍金導体層を形成し、引き続き沈積し、実体導電柱を有するブラインドビアを形成する。   The methods for forming the blind vias V and V1 usually include the following: (1) An electroless plating conductor layer is formed on the surface of the blind via by chemical vapor deposition and / or an electric plating is formed on the conductor layer. Then, an electrolytic plating conductor layer is formed, and a blind via having a hollow conductive column is formed. (2) An electroless plating conductor layer is formed on the surface of the blind via by chemical vapor deposition, and subsequently deposited to form a blind via having a solid conductive column.

子基板１００のブラインドビアＶ及び/又は内層回路板２００の通孔を形成し、本技術分野において、通常、中空導電柱を形成し、中空導電柱中に樹脂材料、金属顆粒又はセラミック顆粒分布を有する樹脂材料、又は金属ペースト、例えば、銅ペース又は銀ペースト等を充填する。もちろん、状況に応じて中空状を保留し、直接熱プレス接合を行い、フィルムを半固化した接着体を熱プレス過程で該ブラインドビア又は通孔中に充填するよう流動させることもできる。   In this technical field, a hollow conductive column is usually formed, and a resin material, a metal granule, or a ceramic granule distribution is formed in the hollow conductive column by forming a blind via V of the sub board 100 and / or a through hole of the inner layer circuit board 200. A resin material or a metal paste such as a copper paste or a silver paste is filled. Of course, depending on the situation, it is possible to hold the hollow shape, perform direct hot press bonding, and allow the adhesive obtained by semi-solidifying the film to flow into the blind via or through-hole in the hot pressing process.

その後、相対する両側の２つの金属箔片２１４をパターン化し、２つのパターン化回路層２１４ａを形成する。このように、本発明の回路板２２０は、概ね、製造を完成し、子基板１００と、内層回路板２００と、２つの絶縁フィルム２１２と、２つのパターン化回路層２１４ａと、を含む。子基板１００が内層回路板２００中に埋め込まれ、且つ子基板１００の配線密度が内層回路板２００の配線密度より大きく、回路板２２０の高配線密度の領域とされる。また、２つの絶縁フィルム２１２は、子基板１００の周囲をカバーし、２つのパターン化回路層２１４ａと、第１回路層２０２及び第２回路層２０４との間を隔離する。また、子基板１００及び内層回路板２００は、外層のパターン化回路層２１４ａにより電子部材（図示せず）と電気接続し、信号を伝達することができる。   Thereafter, the two metal foil pieces 214 on opposite sides are patterned to form two patterned circuit layers 214a. As described above, the circuit board 220 of the present invention is generally manufactured and includes the sub-board 100, the inner layer circuit board 200, the two insulating films 212, and the two patterned circuit layers 214a. The sub board 100 is embedded in the inner layer circuit board 200, and the wiring density of the sub board 100 is larger than the wiring density of the inner layer circuit board 200, so that the circuit board 220 has a high wiring density region. The two insulating films 212 cover the periphery of the daughter board 100 and isolate the two patterned circuit layers 214a from the first circuit layer 202 and the second circuit layer 204. Further, the sub board 100 and the inner layer circuit board 200 can be electrically connected to an electronic member (not shown) through the outer patterned circuit layer 214a to transmit signals.

図２Ａ〜図２Ｆは、それぞれ本発明の他の実施例の回路板の製造方法を示すフロー図である。図２Ａにおいて、高配線密度を有する回路板１００は、親基板１０を切断したものである。親基板１０を複数の子基板１００に分離した後、これら子基板１００は、何れも高配線密度の回路を有し、四層以上の回路層１０２を含み、例えば、六層、八層又は十層である。関連する説明は、上記実施例を参考とし、ここでは再度記載しない。   2A to 2F are flowcharts showing a method of manufacturing a circuit board according to another embodiment of the present invention. In FIG. 2A, a circuit board 100 having a high wiring density is obtained by cutting the parent substrate 10. After separating the parent substrate 10 into a plurality of child substrates 100, each of these child substrates 100 has a high wiring density circuit and includes four or more circuit layers 102, for example, six layers, eight layers, or ten layers. Is a layer. The relevant description refers to the above example and will not be described again here.

続いて、図２Ｂ及び図２Ｃのステップでは、高配線密度を完成する子基板１００を内層回路板２００の開口Ｃ中に配置する。子基板１００の配線密度が内層回路板２００の配線密度より大きく、且つ子基板１００の層数（四層以上）も内層回路板２００の層数（二層以上）より高い。上記実施例と異なるのは、熱プレス接合を行う前、型抜きフィルム２１０を子基板１００の一側上に予め形成し、同様に子基板１００の一側に位置する絶縁フィルム２１２を隔離することができることである。型抜きフィルム２１０は、後続の通孔製造工程、通孔鍍金工程及びパターン化回路製造工程を完成した後、子基板１００上から引き離し、除去することができ、図２Ｆに示すように、子基板１００を開口領域中に露出する。図２Ｄ及び図２Ｅの通孔製造工程、通孔鍍金工程及びパターン化回路製造工程については、上記実施例を参考とし、ここでは再度記載しない。   Subsequently, in the steps of FIGS. 2B and 2C, the sub board 100 that completes the high wiring density is disposed in the opening C of the inner layer circuit board 200. The wiring density of the sub board 100 is higher than the wiring density of the inner layer circuit board 200, and the number of layers (four layers or more) of the sub board 100 is also higher than the number of layers (two layers or more) of the inner layer circuit board 200. The difference from the above embodiment is that the die-cut film 210 is formed in advance on one side of the child substrate 100 and the insulating film 212 located on one side of the child substrate 100 is isolated before performing hot press bonding. It is possible to do. The die cut film 210 can be removed from the daughter board 100 after the subsequent through hole manufacturing process, the through hole plating process, and the patterned circuit manufacturing process are completed. As shown in FIG. 100 is exposed in the open area. The through hole manufacturing process, the through hole plating process, and the patterned circuit manufacturing process in FIGS. 2D and 2E are referred to the above embodiment and are not described again here.

図２Ｅ及び図２Ｆにおいて、回路板構造２２０ａが所定開口領域Ａを有し、型抜き膜２１０がある位置に対応し、所定開口領域Ａ上に外層回路２１４ｂの一部分を保留することができるが、外層回路２１４ｂのこの部分を保留しないこともできる。本発明は、レーザにより所定開口領域Ａを切断し、所定開口領域をカバーする絶縁フィルム２１２の一部分及び金属箔片２１４の一部分を除去し、型抜きフィルム２１０を露出することができる。その後、型抜きフィルム２１０を除去し、子基板１００を開口領域Ｃ１中に露出する。   In FIG. 2E and FIG. 2F, the circuit board structure 220a has a predetermined opening area A and corresponds to the position where the die-cutting film 210 is located, and a part of the outer layer circuit 214b can be retained on the predetermined opening area A. It is also possible not to reserve this part of the outer layer circuit 214b. In the present invention, the predetermined opening area A can be cut by a laser, a part of the insulating film 212 and a part of the metal foil piece 214 covering the predetermined opening area can be removed, and the die-cut film 210 can be exposed. Thereafter, the die-cut film 210 is removed, and the daughter board 100 is exposed in the opening region C1.

他の実施例では、図示していないが、想定から分かるように、回路板が、例えば、２つの所定開口領域を有し、それぞれ２つの型抜きフィルムがある位置に対応し、そのうち、２つの型抜きフィルムが子基板の相対する両側に位置する。同様に、上記の説明のように、相対する両側の絶縁フィルムの一部分及び金属箔片の一部分を除去し、２つの型抜きフィルムを露出することができる。その後、型抜きフィルムを除去し、子基板の相対する両側を２つの開口領域中に露出する。   In other embodiments, although not shown, as can be seen from the assumption, the circuit board has, for example, two predetermined opening areas, each corresponding to a position where there are two die-cut films, of which two The die-cut film is located on opposite sides of the daughter board. Similarly, as described above, a part of the insulating film on both sides and a part of the metal foil piece can be removed to expose the two die-cut films. Thereafter, the die-cut film is removed, and opposite sides of the daughter board are exposed in the two open areas.

このように、本発明の回路板構造２２０ａは、概ね、製造を完成し、子基板１００と、内層回路板２００と、２つの絶縁フィルム２１２と、２つのパターン化回路層２１４ａと、を含む。子基板１００は、内層回路板２００中に埋め込まれ、且つ子基板１００の配線密度が内層回路板２００の配線密度より大きく、回路板２２０の高配線密度の領域とされる。また、２つの絶縁フィルム２１２が子基板１００の周囲をカバーし、２つのパターン化回路層２１４ａと、第１回路層２０２及び第２回路層２０４との間を隔離する。また、子基板１００の少なくとも一側が開口領域Ｃ１中に対応して露出される。開口領域Ｃ１は、１つ又は複数の電子部材（図示せず）を収容でき、導電ボール又は導電ブロック（図示せず）によって、子基板１００の接続パッドＢと電気接続し、信号を伝達することができる。   As described above, the circuit board structure 220a of the present invention is generally completed in manufacture, and includes the daughter board 100, the inner layer circuit board 200, the two insulating films 212, and the two patterned circuit layers 214a. The sub board 100 is embedded in the inner layer circuit board 200, and the wiring density of the sub board 100 is larger than the wiring density of the inner layer circuit board 200, so that the circuit board 220 has a high wiring density. In addition, the two insulating films 212 cover the periphery of the daughter board 100 and isolate the two patterned circuit layers 214a from the first circuit layer 202 and the second circuit layer 204. Further, at least one side of the sub board 100 is exposed corresponding to the opening area C1. The open area C1 can accommodate one or a plurality of electronic members (not shown), and is electrically connected to the connection pads B of the daughter board 100 by a conductive ball or conductive block (not shown) to transmit signals. Can do.

上記のように、本発明の回路板は、予め完成した高配線密度の子基板を通常配置（低配線密度）の内層回路板中に統合し、２つの絶縁フィルム及び２つのパターン化回路層と一体に結合し、ステップを簡易化し、製造コストを減少させる。従って、回路板は、一度のプレス接合に必要な時間のみを要し、長い時間を浪費する必要がなく、従来の多層回路板の製造コストを大幅に減少し、経済効果に適合し、産業上に利用させることができる発明である。   As described above, the circuit board of the present invention integrates a previously completed high-wiring density sub-board into a normal arrangement (low-wiring density) inner circuit board, and includes two insulating films and two patterned circuit layers. Combined to simplify the steps and reduce manufacturing costs. Therefore, the circuit board requires only the time required for one-time press bonding, and does not have to waste a long time, greatly reducing the manufacturing cost of the conventional multilayer circuit board, adapting to the economic effect, and industrially. It is an invention that can be used by

以上のごとく、この発明を実施形態により開示したが、もとより、この発明を限定するためのものではなく、当業者であれば容易に理解できるように、この発明の技術思想の範囲内において、適当な変更ならびに修正が当然なされうるものであるから、その特許権保護の範囲は、特許請求の範囲および、それと均等な領域を基準として定めなければならない。   As described above, the present invention has been disclosed by the embodiments. However, the present invention is not intended to limit the present invention, and is within the scope of the technical idea of the present invention so as to be easily understood by those skilled in the art. Therefore, the scope of patent protection should be defined based on the scope of claims and the equivalent area.

１０ 親基板
１００ 子基板
１０２ 回路層
１０４ 絶縁層
１０６ コア層
２００ 内層回路板
２０２ 第１回路層
２０４ 第２回路層
２０６ コア層
２１０ 型抜きフィルム
２１２ 絶縁フィルム
２１４ 金属箔片
２１４ａ パターン化回路層
２１４ｂ 外層回路
２２０ 回路板
２２０ａ 回路板構造
Ａ 所定開口領域
Ｂ 接続パッド
Ｃ 開口
Ｃ１ 開口領域
Ｐ 通孔
Ｐ１ 通孔
Ｖ ブランドビア
Ｖ１ ブラインドビア 10 parent substrate 100 child substrate 102 circuit layer 104 insulating layer 106 core layer 200 inner circuit board 202 first circuit layer 204 second circuit layer 206 core layer 210 die-cut film 212 insulating film 214 metal foil piece 214a patterned circuit layer 214b outer layer Circuit 220 Circuit board 220a Circuit board structure A Predetermined opening area B Connection pad C Opening C1 Opening area P Through hole P1 Through hole V Brand via V1 Blind via

Claims (10)

親基板を切断し、前記親基板を複数の子基板に分離することと、
前記子基板を内層回路板の開口中に配置し、前記内層回路板が第１回路層と、第２回路層と、前記第１回路層及び前記第２回路層の間に位置するコア層と、を有し、そのうち、前記子基板の配線密度が前記内層回路板の配線密度より大きいことと、
絶縁フィルム及び金属箔片を前記子基板及び前記内層回路板の相対する両側にそれぞれ配置し、熱プレス接合ステップを行い、相対する両側の前記金属箔片、前記絶縁フィルムを前記子基板及び前記内層回路板と一体に結合することと、
を含む回路板の製造方法。 Cutting the parent substrate and separating the parent substrate into a plurality of child substrates;
The sub board is disposed in an opening of an inner circuit board, and the inner circuit board includes a first circuit layer, a second circuit layer, and a core layer located between the first circuit layer and the second circuit layer; Wherein the wiring density of the sub-board is greater than the wiring density of the inner layer circuit board;
An insulating film and a metal foil piece are respectively arranged on opposite sides of the child board and the inner layer circuit board, and a hot press bonding step is performed, and the metal foil pieces and the insulating film on the opposite sides are placed on the child board and the inner layer. To be integrated with the circuit board,
A method of manufacturing a circuit board including: 前記熱プレス接合ステップを完成後、相対する両側の前記金属箔片、前記絶縁フィルム及び前記内層回路板を貫通する通孔を形成することを更に含む請求項１記載の回路板の製造方法。   The method for manufacturing a circuit board according to claim 1, further comprising forming a through-hole penetrating the metal foil pieces, the insulating film, and the inner layer circuit board on opposite sides after completing the hot press bonding step. 前記熱プレス接合ステップを完成後、それぞれ前記内層回路板上の前記第１回路層及び前記第２回路層を露出させる複数のブラインドビアを形成することを更に含む請求項１又は２記載の回路板の製造方法。   3. The circuit board according to claim 1, further comprising forming a plurality of blind vias that expose the first circuit layer and the second circuit layer on the inner circuit board after completing the hot press bonding step, respectively. Manufacturing method. 前記ブラインドビアが子基板の少なくとも一側に位置する接続パッドを更に露出する請求項３記載の回路板の製造方法。   4. The circuit board manufacturing method according to claim 3, wherein the blind via further exposes a connection pad located on at least one side of the sub-board. 相対する両側の前記金属箔片、前記子基板及び前記内層回路板中の少なくとも２つを電気接続する通孔鍍金工程を行うことを更に含む請求項２乃至４の何れか１項に記載の回路板の製造方法。   5. The circuit according to claim 2, further comprising performing a through-hole plating step of electrically connecting at least two of the metal foil pieces, the sub-board, and the inner layer circuit board on opposite sides. 6. A manufacturing method of a board. 前記熱プレス接合ステップを完成後、相対する両側の前記金属箔片をパターン化し、２つのパターン化回路層を形成することを更に含む請求項１乃至５の何れか１項に記載の回路板の製造方法。   6. The circuit board according to claim 1, further comprising patterning the metal foil pieces on opposite sides after forming the hot press bonding step to form two patterned circuit layers. 7. Production method. 前記熱プレス接合ステップを完成後、型抜きフィルムを前記子基板の少なくとも一側上に形成し、同様に前記子基板の前記少なくとも一側に位置する前記絶縁フィルムを隔離することを更に含む請求項１記載の回路板の製造方法。   The method further comprises forming a die-cut film on at least one side of the daughter board after completing the hot press bonding step, and isolating the insulating film located on the at least one side of the daughter board as well. A method for producing a circuit board according to 1. 前記型抜きフィルムを形成後、少なくとも１つの所定開口領域をレーザで切断し、前記少なくとも１つの所定開口領域をカバーする前記絶縁フィルムの一部分及び前記金属箔片の一部分を除去し、前記型抜きフィルムを露出させることを更に含む請求項７記載の回路板の製造方法。   After forming the die-cutting film, at least one predetermined opening area is cut with a laser, and a part of the insulating film and a part of the metal foil piece covering the at least one predetermined opening area are removed, and the die-cutting film The method of manufacturing a circuit board according to claim 7, further comprising exposing the substrate. 前記型抜きフィルムを除去し、前記子基板を少なくとも１つの開口領域中に露出させることを更に含む請求項８記載の回路板の製造方法。   9. The method of manufacturing a circuit board according to claim 8, further comprising removing the die-cut film and exposing the daughter board in at least one opening region. 前記子基板が四層以上の回路層を有し、且つ前記子基板の層数が前記内層回路板の層数より大きい請求項１記載の回路板の製造方法。   The method of manufacturing a circuit board according to claim 1, wherein the sub board has four or more circuit layers, and the number of layers of the sub board is larger than the number of layers of the inner circuit board.
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JP2014150090A (en) * 2013-01-31 2014-08-21 Kyocer Slc Technologies Corp Wiring board and method of manufacturing the same
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