JP2010503212A - シャロウ・トレンチ・アイソレーション角部の注入領域 - Google Patents
シャロウ・トレンチ・アイソレーション角部の注入領域 Download PDFInfo
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- 238000002955 isolation Methods 0.000 title claims abstract description 29
- 238000002347 injection Methods 0.000 title description 7
- 239000007924 injection Substances 0.000 title description 7
- 239000000758 substrate Substances 0.000 claims abstract description 70
- 239000004065 semiconductor Substances 0.000 claims abstract description 60
- 239000002019 doping agent Substances 0.000 claims abstract description 41
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 25
- 239000007943 implant Substances 0.000 claims abstract description 20
- 125000006850 spacer group Chemical group 0.000 claims abstract description 20
- 238000002513 implantation Methods 0.000 claims description 26
- 238000000034 method Methods 0.000 claims description 25
- 238000005530 etching Methods 0.000 claims description 24
- 238000001514 detection method Methods 0.000 claims description 11
- 229910052710 silicon Inorganic materials 0.000 claims description 8
- 239000010703 silicon Substances 0.000 claims description 8
- 239000012212 insulator Substances 0.000 claims description 5
- 239000000463 material Substances 0.000 claims description 5
- 238000000059 patterning Methods 0.000 claims description 3
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 claims description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims description 2
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 claims description 2
- 238000004519 manufacturing process Methods 0.000 abstract description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 7
- 238000009792 diffusion process Methods 0.000 description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052787 antimony Inorganic materials 0.000 description 2
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 2
- 229910052785 arsenic Inorganic materials 0.000 description 2
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 229910002601 GaN Inorganic materials 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 238000004380 ashing Methods 0.000 description 1
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 150000002978 peroxides Chemical class 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76237—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials introducing impurities in trench side or bottom walls, e.g. for forming channel stoppers or alter isolation behavior
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823481—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1463—Pixel isolation structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14689—MOS based technologies
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- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Electromagnetism (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Element Separation (AREA)
Abstract
Description
Claims (17)
- 半導体基板に分離領域を形成して前記基板に形成された素子を分離する方法であって、
第1のハードマスク層の開口部を介して第1のドーパントを注入することによって前記半導体基板の一部分に浅い注入領域を形成し、
前記半導体基板の前記一部分と前記第1のハードマスク層の上に第2のハードマスク層を形成し、
前記第2のハードマスク層をエッチングして前記第1のハードマスク層の前記側面に沿った側壁スペーサを形成し、各側壁スペーサが、前記半導体基板内の前記浅い注入領域の一部分に重ね、
前記側壁スペーサ間の前記半導体基板にエッチングして分離トレンチを形成することを含む方法。 - 請求項1に記載の方法において、さらに、
前記半導体基板表面の上にエッチング停止層を形成し、
前記エッチング停止層の上に前記第1のハードマスク層を形成し、
前記第1のハードマスク層の上にフォトレジスト・マスク層を提供し、
前記フォトレジスト・マスク層をパターニングして前記フォトレジスト・マスク層に開口部を形成し、
前記フォトレジスト・マスク層の前記開口部を介して前記第1のハードマスク層をエッチングして前記第1のハードマスク層に前記開口部を形成する、方法。 - さらに、前記分離トレンチの前記側壁と底壁に第2のドーパントを注入する、請求項1に記載の方法。
- さらに、前記分離トレンチの前記側壁と底壁の上に等角絶縁層を形成する、請求項3に記載の方法。
- 前記第2のドーパントは、前記第1のドーパントと同じ導電型を有する、請求項3に記載の方法。
- 請求項2に記載の方法において、
さらに、光を捕捉しその光を電荷に変換する光検出領域を前記半導体基板に形成し、
前記光検出領域は、前記分離トレンチの横に隣り合う、方法。 - 請求項2に記載の方法において、
前記側壁スペーサ間の前記半導体基板をエッチングして分離トレンチを形成するステップでは、前記第1のドーパントの縁を前記ハードマスク層の側壁と自己整合する、。 - イメージ・センサ基板にシャロウ・トレンチ・アイソレーション領域を形成して前記基板に形成されたデバイスを分離する方法であって、
(a)前記半導体基板表面上にエッチング停止層を形成し、
(b)前記エッチング停止層の上に、前記エッチング停止層の材料と異なる材料からなる第1のハードマスク層を形成し、
(c)前記第1のハードマスク層の上にフォトレジスト・マスク層を提供し、
(d)前記フォトレジスト・マスク層をパターニングして前記フォトレジスト層に開口部を形成し、
(e)前記フォトレジスト・マスク層の前記開口部を介して前記第1のハードマスク層をエッチングして前記第1のハードマスク層に開口部を形成し、
(f)第1のドーパントを、前記フォトレジスト・マスク層の前記開口部と、前記第1のハードマスク層の前記開口部と、前記エッチング停止層とを介して注入して、前記半導体基板に浅い注入領域を形成し、
(g)フォトレジスト・マスク層を除去し、
(h)上記ステップ(g)後に、残っている前記構造の上に第2のハードマスク層を形成し、
(i)前記第2のハードマスク層をエッチングして、前記第1のハードマスク層の側面に沿って、前記半導体基板内の前記浅い注入領域の一部分とそれぞれ重なる側壁スペーサを形成し、
(j)前記エッチング停止層を介して前記側壁スペーサ間の前記半導体基板をエッチングして分離トレンチを形成する、ことを含む方法。 - 請求項8に記載の方法において、
さらに、前記第1のドーパントと同じ導電型を有する第2のドーパントを前記分離トレンチの前記側壁と底壁に注入する、方法。 - 請求項8に記載の方法において、
前記第1のドーパントは、前記基板の基礎領域の導電型と同じ導電型を有する、方法。 - 前記第2のハードマスク層は、等角である、請求項8に記載の方法。
- 請求項8に記載の方法において、
前記第2のハードマスク層をエッチングして前記第1のハードマスク層の前記側面に側壁スペーサを形成するステップは、前記第2のハードマスク層を異方性エッチングして前記第1のハードマスク層の前記側面に側壁スペーサを形成することを含む、方法。 - 請求項8に記載の方法において、
前記エッチング停止層を介して前記側壁スペーサ間の前記半導体基板をエッチングして分離トレンチを形成するステップは、前記エッチング停止層を介して前記側壁スペーサ間の前記半導体基板を異方性エッチングして分離トレンチを形成ことを含む、方法。 - 請求項8に記載の方法において、
前記半導体基板は、シリコン、シリコン−オン−絶縁体、シリコンゲルマニウム及び砒化ガリウムから成るグループから選択される、方法。 - 請求項8に記載の方法において、
さらに、前記第2のドーパントを注入する前に前記分離トレンチの前記側壁と底壁の上に等角絶縁層を形成する、方法。 - 請求項8に記載の方法において、
さらに、前記第2のドーパントを注入した後に、前記分離トレンチの前記側壁と前記底壁の上に等角絶縁層を形成する、方法。 - 請求項8に記載の方法において、
さらに、前記イメージ・センサ基板に、光を捕捉しその光を電荷に変換する光検出領域を形成する、方法。
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US84207506P | 2006-09-01 | 2006-09-01 | |
US60/842,075 | 2006-09-01 | ||
US11/840,299 US20080057612A1 (en) | 2006-09-01 | 2007-08-17 | Method for adding an implant at the shallow trench isolation corner in a semiconductor substrate |
US11/840,299 | 2007-08-17 | ||
PCT/US2007/018997 WO2008030371A2 (en) | 2006-09-01 | 2007-08-29 | Implant at shallow trench isolation corner |
Publications (3)
Publication Number | Publication Date |
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JP2010503212A true JP2010503212A (ja) | 2010-01-28 |
JP2010503212A5 JP2010503212A5 (ja) | 2010-10-14 |
JP5281008B2 JP5281008B2 (ja) | 2013-09-04 |
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JP2009526696A Active JP5281008B2 (ja) | 2006-09-01 | 2007-08-29 | 半導体基板に形成された素子を分離する方法 |
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Country | Link |
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US (1) | US20080057612A1 (ja) |
EP (1) | EP2057675B1 (ja) |
JP (1) | JP5281008B2 (ja) |
KR (1) | KR101329462B1 (ja) |
DE (1) | DE602007009548D1 (ja) |
TW (1) | TWI413167B (ja) |
WO (1) | WO2008030371A2 (ja) |
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US9196547B2 (en) * | 2009-04-03 | 2015-11-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Dual shallow trench isolation and related applications |
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US8367512B2 (en) | 2010-08-30 | 2013-02-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Self-aligned implants to reduce cross-talk of imaging sensors |
FR2981502A1 (fr) | 2011-10-18 | 2013-04-19 | St Microelectronics Crolles 2 | Procede de realisation d'au moins une tranchee d'isolation profonde |
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CN109256389B (zh) * | 2017-07-13 | 2021-06-11 | 旺宏电子股份有限公司 | 半导体元件及其制造方法 |
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- 2007-08-17 US US11/840,299 patent/US20080057612A1/en not_active Abandoned
- 2007-08-29 JP JP2009526696A patent/JP5281008B2/ja active Active
- 2007-08-29 WO PCT/US2007/018997 patent/WO2008030371A2/en active Application Filing
- 2007-08-29 EP EP07837483A patent/EP2057675B1/en active Active
- 2007-08-29 KR KR1020097004162A patent/KR101329462B1/ko active IP Right Grant
- 2007-08-29 DE DE602007009548T patent/DE602007009548D1/de active Active
- 2007-08-31 TW TW096132663A patent/TWI413167B/zh active
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Publication number | Publication date |
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WO2008030371A3 (en) | 2008-04-17 |
TW200830381A (en) | 2008-07-16 |
TWI413167B (zh) | 2013-10-21 |
WO2008030371A2 (en) | 2008-03-13 |
KR20090045294A (ko) | 2009-05-07 |
JP5281008B2 (ja) | 2013-09-04 |
EP2057675B1 (en) | 2010-09-29 |
EP2057675A2 (en) | 2009-05-13 |
DE602007009548D1 (de) | 2010-11-11 |
US20080057612A1 (en) | 2008-03-06 |
KR101329462B1 (ko) | 2013-11-13 |
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