JP2010258260A - Heat radiation printed board - Google Patents

Heat radiation printed board Download PDF

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JP2010258260A
JP2010258260A JP2009107428A JP2009107428A JP2010258260A JP 2010258260 A JP2010258260 A JP 2010258260A JP 2009107428 A JP2009107428 A JP 2009107428A JP 2009107428 A JP2009107428 A JP 2009107428A JP 2010258260 A JP2010258260 A JP 2010258260A
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via conductor
substrate
opening
electronic component
heat
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Masahiro Tamura
政裕 田村
Riichi Sekimoto
利一 関本
Kazumasa Hirashima
一正 平島
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EITO KOGYO KK
NEC Corp
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EITO KOGYO KK
NEC Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To solve problems of: difficulty in fitting a via conductor into an opening despite of a small difference in size between the opening formed in a printed board in mounting the via conductor onto the printed board and the via conductor in prior art; and the board warped and twisted with heat generated in heating the via conductor with heat from an electronic component in a large-sized via conductor using one. <P>SOLUTION: A heat radiation printed board includes a substrate 1 with an opening 11 formed in its part to which the electronic component 5 of a high heating value is soldered, a plurality of protruded grooves 11a formed in an inner peripheral surface of the opening in the substrate, the via conductor 2 having protrusions 21 formed in its outer peripheral surface to be engaged with the protruded grooves when it is fitted into the opening and having an area smaller than that of the opening, and a filler 3 of an adhesive resin filled in a gap generated when the via conductor is fitted into the opening. The via conductor is integrated with a ground pattern 4 formed on a rear surface of the board. <P>COPYRIGHT: (C)2011,JPO&amp;INPIT

Description

本発明は、プリント基板に実装した発光ダイオード、電解効果トランジスタあるいは集積回路等の電子部品から発生する熱をプリント基板を介して放熱することで、前記実装した電子部品の発熱による性能劣化を防止できるようにした放熱プリント基板である。   The present invention can prevent performance deterioration due to heat generation of the mounted electronic component by radiating heat generated from the electronic component such as a light emitting diode, a field effect transistor, or an integrated circuit mounted on the printed circuit board through the printed circuit board. This is a heat dissipation printed circuit board.

近年、発光ダイオードや電解効果トランジスタおよび高密度集積回路等の電子部品の高出力化が進み各電子部品からの発熱も高くなっている。また、製品の小型化が図られていることから電子部品がプリント基板に高密度に搭載され、プリント基板を介しての電子部品の放熱が行われ難いといった問題が発生した。   In recent years, the output of electronic components such as light emitting diodes, field effect transistors, and high-density integrated circuits has been increased, and the heat generated from each electronic component has also increased. Further, since the product is downsized, there are problems that electronic components are mounted on the printed circuit board with high density and it is difficult to radiate the electronic components through the printed circuit board.

そこで、電子部品の発熱をプリント基板を介して放熱させ電子部品の劣化を防止するために電子部品用のプリント基板に銅またはアルミニュームを貼ったり、内蔵されたものが作られている。この銅基板やアルミニューム基板の場合には基板そのものが放熱効果の高い金属板であることから実装された電子部品の発熱は低く抑えられ前記基板を使用した場合には電子部品の性能劣化に対して効果がある。   Therefore, in order to dissipate heat generated from the electronic component through the printed board and prevent the electronic component from deteriorating, copper or aluminum is attached to the printed board for the electronic component or a built-in one. In the case of this copper substrate or aluminum substrate, since the substrate itself is a metal plate having a high heat dissipation effect, the heat generation of the mounted electronic component is suppressed to a low level. Is effective.

このような基板の材料がアルミニュームや銅の場合にはプリント基板としてのガラスエポキシ樹脂等の樹脂基板と比較して重量が重くなり（特に銅基板の場合は重くなる）、かつ、材料費が樹脂基板よりも高くなり、例えば、携帯して使用する電子機器用のプリント基板としては不向きであるといった問題があった。   When the material of such a substrate is aluminum or copper, it becomes heavier than a resin substrate such as a glass epoxy resin as a printed substrate (especially when it is a copper substrate), and the material cost is high. There is a problem that it is higher than the resin substrate and is not suitable as a printed circuit board for an electronic device to be carried and used, for example.

そこで、近年になって軽量で、かつ、材料費の安い樹脂基板を使用して電子部品で発生する熱を放熱するというプリント基板が開発されている。例えば、特開２０００−３１３２２号公報や特開２００６−４１２４１号公報に開示されている発明である。この発明にあっては、樹脂基板に銅材料を埋め込み（以下、ビア導体という）、このビア導体に電子部品を接触させた状態でリード部をプリント基板に半田付けして電子部品で発生する熱をビア導体から放熱するというものである。   Thus, recently, a printed circuit board has been developed that uses a resin substrate that is light in weight and has a low material cost to dissipate heat generated in electronic components. For example, it is an invention disclosed in Japanese Patent Application Laid-Open Nos. 2000-31322 and 2006-41241. According to the present invention, a copper material is embedded in a resin substrate (hereinafter referred to as a via conductor), and a lead portion is soldered to a printed circuit board in a state where the electronic component is in contact with the via conductor, and heat generated in the electronic component Radiates heat from the via conductor.

特開２０００−３１３２２号公報JP 2000-31322 A 特開２００６−４１２４１号公報JP 2006-41241 A

ところで、前記した先行技術にあっては、ビア導体をプリント基板に装着する時にプリント基板に形成した開口部の寸法とビア導体の寸法との僅かな誤差があってもビア導体を開口部に嵌合することが難しく、特に、放熱効果の大きい大型の複雑な形状のビア導体の嵌め込みは困難であり、かつ、大型のビア導体を使用したものにあっては、電子部品が発熱してビア導体が加熱されると、その熱によって基板が反ったり捩じれたりするといった問題があった。   By the way, in the prior art described above, even when there is a slight error between the size of the opening formed in the printed circuit board and the size of the via conductor when the via conductor is mounted on the printed circuit board, the via conductor is fitted into the opening. In particular, it is difficult to fit a large and complex via conductor with a large heat dissipation effect, and in the case of using a large via conductor, the electronic component generates heat and the via conductor When is heated, there is a problem that the substrate warps or twists due to the heat.

本発明は前記した問題点を解決せんとするもので、その目的とするところは、電子部品の発熱によってビア導体が加熱されても、基板開口部の内周面に形成した突溝にビア導体の外周面に形成した突起とでのみ結合され、ビア導体の外周面は基板開口部の隙間に充填された充填材を介して接触しているので、ビア導体と基板開口部との直接接触する面積が小さく、従って、熱による基板の反りや捩れを防止することができる放熱プリント基板を提供せんとするにある。   The present invention is intended to solve the above-described problems, and the object of the present invention is to provide via conductors in the protruding grooves formed on the inner peripheral surface of the substrate opening even when the via conductors are heated by the heat generated by the electronic components. Since the outer peripheral surface of the via conductor is in contact via a filler filled in the gap of the substrate opening, the via conductor and the substrate opening are in direct contact with each other. An object of the present invention is to provide a heat dissipating printed circuit board which has a small area and can prevent warping and twisting of the board due to heat.

本発明の放熱プリント基板は前記した目的を達成せんとするもので、請求項１の手段は、発熱量の大きな電子部品を半田付けする部分に開口部が形成された基板と、該基板の開口部の内周面に形成された複数個の突溝と、前記開口部に嵌め込むと前記突溝に係合される突起が外周面に形成された前記開口部の面積より小さな面積のビア導体と、該ビア導体を前記開口部に嵌め込んで生じる隙間に充填する接着性樹脂である充填材とより構成し、前記ビア導体を前記基板の裏面に形成されたグランド用パターンと一体化したことを特徴とする。   The heat dissipating printed circuit board of the present invention achieves the above-mentioned object, and the means of claim 1 includes a substrate in which an opening is formed in a portion where an electronic component having a large heat generation amount is soldered, and an opening of the substrate. Via conductors having an area smaller than the area of the opening formed on the outer peripheral surface, and a plurality of protruding grooves formed on the inner peripheral surface of the portion, and protrusions engaged with the protruding grooves when fitted into the opening And a filler that is an adhesive resin that fills a gap generated by fitting the via conductor into the opening, and the via conductor is integrated with a ground pattern formed on the back surface of the substrate. It is characterized by.

請求項２の手段は、前記した請求項１において、ビア導体と前記グランド用パターンとの一体化は、前記充填材の前記基板の裏面側で化学メッキを施し、前記ビア導体を前記開口部に嵌め込んだ状態において基板の裏面側を銅メッキ処理することで一体化したことを特徴とする。   According to a second aspect of the present invention, in the first aspect, the via conductor and the ground pattern are integrated by performing chemical plating on the back surface side of the substrate of the filler, and the via conductor is formed in the opening. In the inserted state, the back side of the substrate is integrated by copper plating.

請求項３の手段は、前記した請求項２において、前記基板の表面側に電子部品を収納する収納穴が形成された第２の基板を接着剤で一体化し、かつ、第２の基板に収納される電子部品の上面に金属膜を形成し、前記電子部品のリードを前記第２の基板の表面に形成された信号用パターンにリフロー炉による半田付けを行う際に、前記ビア導体と前記電子部品とを半田付けしたことを特徴とする。   According to a third aspect of the present invention, in the second aspect of the present invention, the second substrate in which a storage hole for storing an electronic component is formed on the surface side of the substrate is integrated with an adhesive and stored in the second substrate. A metal film is formed on the upper surface of the electronic component, and the via conductor and the electron are soldered to the signal pattern formed on the surface of the second substrate by a reflow furnace. It is characterized by soldering parts.

本発明は前記したように、基板に対してビア導体を基板の開口部に嵌め込んだ状態において、開口部の内周面に形成した突溝にビア導体の外周面に形成した突起を係合し、ビア導体と開口部との間に接着性樹脂である充填材を埋設したことにより、電子部品の発熱によってビア導体が加熱しても、基板とビア導体との接触面積が小さく、従って、熱による基板の反りや捩れを防止することができ、また、ビア導体は基板の裏面に形成されたグランド用パターンと一体化されているので、ビア導体の熱は大きな面積のグランド用パターンを介して放熱され電子部品の熱的劣化が防止される。   As described above, the present invention engages the protrusion formed on the outer peripheral surface of the via conductor with the protrusion groove formed on the inner peripheral surface of the opening in a state where the via conductor is fitted into the opening of the substrate with respect to the substrate. In addition, by burying a filler that is an adhesive resin between the via conductor and the opening, even if the via conductor is heated by the heat generated by the electronic component, the contact area between the substrate and the via conductor is small. The substrate can be prevented from warping and twisting due to heat, and the via conductor is integrated with the ground pattern formed on the back surface of the substrate, so the heat of the via conductor passes through the large area ground pattern. The heat is dissipated and thermal deterioration of the electronic components is prevented.

また、ビア導体は基板裏面のグランド用パターンを形成するための銅メッキ加工時にビア導体が一体化されるので、ビア導体とグランド用パターンとの隙間が発生することがなく、放熱ロスがなく、より電子部品の熱的劣化を防止できると共にビア導体が基板の開口部から抜け落ちるのを防止することができる。   In addition, since the via conductor is integrated during the copper plating process for forming the ground pattern on the back surface of the substrate, there is no gap between the via conductor and the ground pattern, and there is no heat loss. In addition, the thermal deterioration of the electronic component can be prevented, and the via conductor can be prevented from falling out of the opening of the substrate.

さらに、第２の基板に電子部品を収納する収納穴を形成し、かつ、電子部品の表面側に金属膜を形成した状態で半田付けすることで、電子部品のリードをリフロー炉で自動半田付けすると同時にビア導体と電子部品の金属膜が一体化されるので、電子部品で発生する熱は確実にビア導体を介してグランド用パターンから放熱され、電子部品の熱的劣化をより防止することができる等の効果を有するものである。   Furthermore, the lead hole of the electronic component is automatically soldered in a reflow furnace by forming a storage hole for storing the electronic component in the second substrate and soldering with the metal film formed on the surface side of the electronic component. At the same time, since the via conductor and the metal film of the electronic component are integrated, the heat generated in the electronic component is surely dissipated from the ground pattern through the via conductor, thereby further preventing the thermal deterioration of the electronic component. It has effects such as being able to.

本発明に係る放熱プリント基板の正面図である。It is a front view of the thermal radiation printed circuit board concerning the present invention. 同上の裏面図である。It is a back view same as the above. 電子部品を実装した状態のＡ−Ａ線拡大断面図である。It is an AA line expanded sectional view in the state where electronic parts were mounted. 第２の実施例のプリント基板の正面図である。It is a front view of the printed circuit board of the 2nd example. 第１の基板の断面図である。It is sectional drawing of a 1st board | substrate. 第１の基板と第２の基板とを貼着した状態の断面図である。It is sectional drawing of the state which bonded the 1st board | substrate and the 2nd board | substrate.

次に、本発明に係る放熱プリント基板の第１の実施例を図１〜図３と共に説明する。
１はガラスエポキシ樹脂等の樹脂で形成した基板にして、ビア導体２を嵌合するための開口部１１（図示にあっては四角形の開口部が示されているが円形やその他の形状であってもよい）と、該開口部１１の内周縁に複数の突溝１１ａが形成されている。なお、図示にあっては、前記突溝１１ａは長手方向には夫々３個が、短手方向には夫々２個が形成されているが、後述するビア導体２の大きさによって突溝１１ａの数は増減可能である。 Next, a first embodiment of the heat radiation printed board according to the present invention will be described with reference to FIGS.
Reference numeral 1 denotes a substrate formed of a resin such as glass epoxy resin, and an opening 11 for fitting the via conductor 2 (in the drawing, a rectangular opening is shown, but a circular shape or other shapes are used. A plurality of protruding grooves 11 a are formed on the inner peripheral edge of the opening 11. In the figure, three protrusion grooves 11a are formed in the longitudinal direction and two protrusion grooves 11a are formed in the short direction, respectively, but depending on the size of the via conductor 2 described later, The number can be increased or decreased.

また、前記基板１には発熱量の大きな電子部品（例えば、発光ダイオード等）の端子を半田付けするための信号用パターン１２が形成されている。   Further, a signal pattern 12 for soldering terminals of an electronic component (for example, a light emitting diode) having a large calorific value is formed on the substrate 1.

２は銅等の熱伝導率の大きな金属で構成したビア導体にして、前記開口部１１の形状と同形状に形成されると共に開口部１１の面積より片側で０．２〜０．５ｍｍ程度小さな形状に形成されている。そして、ビア導体２の外周面には該ビア導体２を開口部１１に嵌め込んだ状態において前記突溝１１ａに入り込む突起２１が形成されている。   2 is a via conductor made of a metal having a high thermal conductivity such as copper, and is formed in the same shape as the shape of the opening 11 and is smaller by 0.2 to 0.5 mm on one side than the area of the opening 11. It is formed into a shape. A protrusion 21 is formed on the outer peripheral surface of the via conductor 2 so as to enter the protrusion groove 11a when the via conductor 2 is fitted in the opening 11.

３は前記ビア導体２を基板１における突溝１１ａに突起２１を係合状態で嵌め込むと、ビア導体２は前記したように開口部１１の内周面との面積より小さいため、該開口部１１の内周面とビア導体２の外周面との間に隙間が生じるので、該隙間を埋めるための接着性樹脂（例えば、エポキシ樹脂）等の充填材である。   3, when the via conductor 2 is fitted in the projection groove 11 a in the substrate 1 in a state where the projection 21 is engaged, the via conductor 2 is smaller in area than the inner peripheral surface of the opening 11 as described above. Since a gap is formed between the inner peripheral surface of 11 and the outer peripheral surface of the via conductor 2, it is a filler such as an adhesive resin (for example, epoxy resin) for filling the gap.

４は基板１の裏面側に形成された銅メッキであるグランド用パターンにして、前記ビア導体２を開口部１１に嵌め込んだ後に電気メッキ加工を行って形成する。このメッキ工程において充填材３は金属ではなく接着性樹脂であることから、メッキ加工を行ってもメッキが行えない。そこで、充填剤３の裏面側をデスミア加工（表面部分を粗化する）を行い、その後に化学メッキを行って薄い金属膜形成した後に電気メッキを行うことで充填剤３の表面部分も銅メッキが施されることになる。   Reference numeral 4 denotes a ground pattern which is copper plating formed on the back side of the substrate 1 and is formed by electroplating after the via conductor 2 is fitted into the opening 11. In this plating step, the filler 3 is not a metal but an adhesive resin, so that plating cannot be performed even if plating is performed. Therefore, the back side of the filler 3 is desmeared (roughening the surface portion), and then a chemical plating is performed to form a thin metal film, followed by electroplating, so that the surface portion of the filler 3 is also copper plated. Will be given.

このように構成した基板１に電子部品５（実施例では発光ダイオード）を、基板１の信号用パターン１２に半田付けし、該信号用パターン１２に電力を供給することで電子部品５は発光する。そして、この発光時間が長くなると電子部品５は発熱し、その熱がビア導体２に伝達される。   The electronic component 5 (light emitting diode in the embodiment) is soldered to the signal pattern 12 of the substrate 1 and the electric power is supplied to the signal pattern 12 on the substrate 1 configured as described above, so that the electronic component 5 emits light. . When the light emission time becomes longer, the electronic component 5 generates heat, and the heat is transmitted to the via conductor 2.

このビア導体２の熱は、該ビア導体２がグランド用パターン４と一体化されていることからグランド用パターン４に伝達され大きな面積で放熱され電子部品５の熱的劣化が防止される。なお、グランド用パターン４を電子機器のケースにネジ止め等の手段によって固定すれば、より放熱効果が向上される。   Since the via conductor 2 is integrated with the ground pattern 4, the heat of the via conductor 2 is transmitted to the ground pattern 4 and is dissipated over a large area, thereby preventing thermal deterioration of the electronic component 5. If the ground pattern 4 is fixed to the case of the electronic device by means such as screwing, the heat dissipation effect is further improved.

前記ビア導体２が電子部品５によって加熱されると、基板１よりも熱膨張率が大きいのでビア導体２は膨張するが、基板１とビア導体２との隙間には充填剤３介在されており、かつ、基板１とビア導体２とは突溝１１ａと突起２１とのみで結合され接触面積が小さいので、熱による基板の反りや捩れを防止することができる。   When the via conductor 2 is heated by the electronic component 5, the via conductor 2 expands because the coefficient of thermal expansion is larger than that of the substrate 1, but the filler 3 is interposed in the gap between the substrate 1 and the via conductor 2. And since the board | substrate 1 and the via | veer conductor 2 are couple | bonded only by the protrusion groove | channel 11a and the processus | protrusion 21, and a contact area is small, the curvature and twist of a board | substrate by heat can be prevented.

また、ビア導体２は銅メッキであるグランド用パターン５と一体化されていることから、ビア導体２が基板１の開口部１１から抜け落ちるのを防止することができる。   In addition, since the via conductor 2 is integrated with the ground pattern 5 made of copper plating, the via conductor 2 can be prevented from falling off from the opening 11 of the substrate 1.

前記した実施例は、基板１に埋め込んだビア導体２の表面に電子部品５の底面を載置した場合であるが、このような構成にあっては、電子部品５のリード５１を基板１の信号用パターン１２に自動実装した場合に電子部品５の底面とビア導体２との間の密着度が低下する可能性がある。そこで、第２の実施例にあっては、自動実装時に電子部品５とビア導体２との半田付けも行うことで、電子部品５からの熱をビア導体２に確実に伝達し、該ビア導体２で受けた熱を基板１の背面に形成したグランド用パターン５から放熱することが可能なようにした。   In the embodiment described above, the bottom surface of the electronic component 5 is placed on the surface of the via conductor 2 embedded in the substrate 1. In such a configuration, the lead 51 of the electronic component 5 is connected to the substrate 1. When the signal pattern 12 is automatically mounted, the degree of adhesion between the bottom surface of the electronic component 5 and the via conductor 2 may be reduced. Therefore, in the second embodiment, the electronic component 5 and the via conductor 2 are also soldered at the time of automatic mounting, so that the heat from the electronic component 5 is reliably transmitted to the via conductor 2, and the via conductor The heat received in 2 can be dissipated from the ground pattern 5 formed on the back surface of the substrate 1.

次に、第２の実施例を図４〜図６と共に説明する。なお、前記した実施例と同一符号は同一部材を示し説明は省略する。
図３に示す如く、基板１の中央部には２つの電子部品５を収納する収納穴１３が形成され、この２つの収納穴１３に対して１つのビア導体２を配置したものと、１つの収納穴１３に対して１つのビア導体２を配置したものとを開示したものであり、これは、２つの電子部品５が近接して配置される場合と、単独で配置される場合とで使い分けができることを示している。 Next, a second embodiment will be described with reference to FIGS. The same reference numerals as those in the above-described embodiment denote the same members, and the description thereof is omitted.
As shown in FIG. 3, a housing hole 13 for housing two electronic components 5 is formed in the central portion of the substrate 1, and one via conductor 2 is disposed in the two housing holes 13 and one This discloses the one in which one via conductor 2 is arranged with respect to the housing hole 13, which is selectively used depending on whether the two electronic components 5 are arranged close to each other or when they are arranged alone. It shows that you can.

次に、第２の実施例の具体的な構造について説明するに、本実施例にあっては、第１の実施例と同様な構造の第１の基板１と、該第１の基板１の上面に接着剤を介して一体化される第２の基板６とから構成されている。なお、図４に示す第１の基板１の表面側には信号用パターン１２は形成されていない点で前記した第１の実施例の基板１とは異なるが、その他は同じ構成なので説明は省略する。   Next, the specific structure of the second embodiment will be described. In this embodiment, the first substrate 1 having the same structure as that of the first embodiment and the first substrate 1 The second substrate 6 is integrated with the upper surface via an adhesive. Although the signal pattern 12 is not formed on the front surface side of the first substrate 1 shown in FIG. 4, it differs from the substrate 1 of the first embodiment described above, but the rest of the configuration is the same, so the description is omitted. To do.

第２の基板６には、電子部品５を収納するための収納穴６１が形成され、表面側には収納穴６１に収納された電子部品５のリード５１に対して信号を供給するための信号用パターン６２が形成されている。そして、このように構成した第２の基板６の裏面と、第１の基板１のビア導体２の表面側とを接着剤７で一体化して１枚の基板を製作する。   A storage hole 61 for storing the electronic component 5 is formed in the second substrate 6, and a signal for supplying a signal to the lead 51 of the electronic component 5 stored in the storage hole 61 on the front surface side. A working pattern 62 is formed. And the back surface of the 2nd board | substrate 6 comprised in this way and the surface side of the via conductor 2 of the 1st board | substrate 1 are integrated with the adhesive agent 7, and one board | substrate is manufactured.

このように構成した一体化した基板１，６に対して電子部品５を収納すると共に電子部品５のリード５１を半田付けする信号用パターン６２にクリーム半田を塗布し、また、ビア導体２の上面にもクリーム半田を塗布した状態で電子部品５を図６のように配置する。   The electronic component 5 is housed on the integrated substrates 1 and 6 configured as described above, and cream solder is applied to the signal pattern 62 for soldering the lead 51 of the electronic component 5. In addition, the electronic component 5 is arranged as shown in FIG.

ここで、この実施例における電子部品５の前記リード５１が形成された面とは反対側の表面には半田付け可能な金属膜５２を形成しておくことにより、リフロー炉内を移動させることで、電子部品５のリード５１が信号用パターン６２に半田付けされ、また、電子部品５に予め形成された金属膜５２ドがビア導体２と半田付けされる。   Here, a metal film 52 that can be soldered is formed on the surface opposite to the surface on which the lead 51 of the electronic component 5 in this embodiment is formed, so that it can be moved in the reflow furnace. The lead 51 of the electronic component 5 is soldered to the signal pattern 62, and the metal film 52 formed in advance on the electronic component 5 is soldered to the via conductor 2.

従って、電子部品５で発生する熱は確実にビア導体２を介してグランド用パターン５から放熱されるので、電子部品５の熱的劣化が防止される。
なお、本実施例にあっては、基板１の面積に対してビア導体２の面積が小さく、かつ、最終的に放熱する面積は大きいがグランド用パターン６２が膜体であることから、従来に行われていた厚みが厚い金属板のように半田付け時に信号用パターン６２の熱が金属板によって放熱されて自動半田付けが行えないといった問題は発生しない。 Therefore, the heat generated in the electronic component 5 is surely radiated from the ground pattern 5 through the via conductor 2, so that the electronic component 5 is prevented from being thermally deteriorated.
In this embodiment, since the area of the via conductor 2 is small with respect to the area of the substrate 1 and the area to be finally radiated is large, the ground pattern 62 is a film body. There is no problem that automatic soldering cannot be performed because the heat of the signal pattern 62 is dissipated by the metal plate at the time of soldering like a thick metal plate.

１ 基板
１１ 開口部
１１ａ 突溝
１２ 信号用パターン
２ ビア導体
２１ 突起
３ 充填剤
４ グランド用パターン
５ 電子部品
５１ リード
６ 第２の基板
６１ 収納穴
６２ 信号用パターン
７ 接着剤 DESCRIPTION OF SYMBOLS 1 Board | substrate 11 Opening part 11a Protrusion groove | channel 12 Signal pattern 2 Via conductor 21 Protrusion 3 Filler 4 Ground pattern 5 Electronic component 51 Lead 6 2nd board | substrate 61 Storage hole 62 Signal pattern 7 Adhesive

Claims (3)

発熱量の大きな電子部品を半田付けする部分に開口部が形成された基板と、該基板の開口部の内周面に形成された複数個の突溝と、前記開口部に嵌め込むと前記突溝に係合される突起が外周面に形成された前記開口部の面積より小さな面積のビア導体と、該ビア導体を前記開口部に嵌め込んで生じる隙間に充填する接着性樹脂である充填材とより構成し、前記ビア導体を前記基板の裏面に形成されたグランド用パターンと一体化したことを特徴とする放熱プリント基板。   A board in which an opening is formed in a part where an electronic component having a large amount of heat is soldered, a plurality of projecting grooves formed in an inner peripheral surface of the opening of the board, and the protrusion when fitted into the opening. A via conductor having an area smaller than the area of the opening where the protrusion engaged with the groove is formed on the outer peripheral surface, and a filler that is an adhesive resin that fills a gap formed by fitting the via conductor into the opening. And the via conductor is integrated with a ground pattern formed on the back surface of the substrate. ビア導体と前記グランド用パターンとの一体化は、前記充填材の前記基板の裏面側で化学メッキを施し、前記ビア導体を前記開口部に嵌め込んだ状態において基板の裏面側を銅メッキ処理することで一体化したことを特徴とする請求項１記載の放熱プリント基板。   For the integration of the via conductor and the ground pattern, chemical plating is performed on the back surface side of the substrate of the filler, and the back surface side of the substrate is copper-plated in a state where the via conductor is fitted in the opening. The heat radiation printed circuit board according to claim 1, wherein the heat radiation printed circuit board is integrated. 前記基板の表面側に電子部品を収納する収納穴が形成された第２の基板を接着剤で一体化し、かつ、第２の基板に収納される電子部品の上面に金属膜を形成し、前記電子部品のリードを前記第２の基板の表面に形成された信号用パターンにリフロー炉による半田付けを行う際に、前記ビア導体と前記電子部品とを半田付けしたことを特徴とする請求項２記載の放熱プリント基板。   A second substrate having an accommodation hole for accommodating an electronic component on the surface side of the substrate is integrated with an adhesive, and a metal film is formed on an upper surface of the electronic component accommodated in the second substrate, 3. The via conductor and the electronic component are soldered when the lead of the electronic component is soldered to a signal pattern formed on the surface of the second substrate by a reflow furnace. The heat dissipation printed circuit board described.
JP2009107428A 2009-04-27 2009-04-27 Heat radiation printed board Pending JP2010258260A (en)

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014207815A1 (en) * 2013-06-25 2014-12-31 株式会社メイコー Heat dissipation substrate and manufacturing method for same
JP2015195304A (en) * 2014-03-31 2015-11-05 京セラサーキットソリューションズ株式会社 Printed circuit board and manufacturing method of the same
DE102016208557A1 (en) 2015-05-19 2016-11-24 Omron Automotive Electronics Co., Ltd. Printed circuit board and electronic device
KR101735439B1 (en) * 2015-09-10 2017-05-15 주식회사 코스모텍 Manufacturing method for radiant heat circuit board
JPWO2016063695A1 (en) * 2014-10-23 2017-08-10 住友ベークライト株式会社 Metal foil-clad board, circuit board, and heating element mounting board
CN111385959A (en) * 2018-12-27 2020-07-07 欣兴电子股份有限公司 Circuit board with heat dissipation block and manufacturing method thereof

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60111489A (en) * 1983-11-21 1985-06-17 イビデン株式会社 Board for placing electronic parts and method of producing same
JPS61172393A (en) * 1985-01-26 1986-08-04 イビデン株式会社 Substrate for carrying electronic component and manufacture thereof
JPH0484487A (en) * 1990-07-27 1992-03-17 Ibiden Co Ltd Substrate for mounting electronic parts
JPH04125954A (en) * 1990-09-17 1992-04-27 Ibiden Co Ltd Electronic part mounting substrate
JPH0697331A (en) * 1992-07-15 1994-04-08 Motorola Inc Pad-array semiconductor provided with heat conductor and its manufacture
JPH0786717A (en) * 1993-09-17 1995-03-31 Fujitsu Ltd Printing wiring board structure
JP2008218678A (en) * 2007-03-05 2008-09-18 Nichia Chem Ind Ltd Light-emitting device

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60111489A (en) * 1983-11-21 1985-06-17 イビデン株式会社 Board for placing electronic parts and method of producing same
JPS61172393A (en) * 1985-01-26 1986-08-04 イビデン株式会社 Substrate for carrying electronic component and manufacture thereof
JPH0484487A (en) * 1990-07-27 1992-03-17 Ibiden Co Ltd Substrate for mounting electronic parts
JPH04125954A (en) * 1990-09-17 1992-04-27 Ibiden Co Ltd Electronic part mounting substrate
JPH0697331A (en) * 1992-07-15 1994-04-08 Motorola Inc Pad-array semiconductor provided with heat conductor and its manufacture
JPH0786717A (en) * 1993-09-17 1995-03-31 Fujitsu Ltd Printing wiring board structure
JP2008218678A (en) * 2007-03-05 2008-09-18 Nichia Chem Ind Ltd Light-emitting device

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014207815A1 (en) * 2013-06-25 2014-12-31 株式会社メイコー Heat dissipation substrate and manufacturing method for same
JP2015195304A (en) * 2014-03-31 2015-11-05 京セラサーキットソリューションズ株式会社 Printed circuit board and manufacturing method of the same
JPWO2016063695A1 (en) * 2014-10-23 2017-08-10 住友ベークライト株式会社 Metal foil-clad board, circuit board, and heating element mounting board
DE102016208557A1 (en) 2015-05-19 2016-11-24 Omron Automotive Electronics Co., Ltd. Printed circuit board and electronic device
JP2016219562A (en) * 2015-05-19 2016-12-22 オムロンオートモーティブエレクトロニクス株式会社 Printed board and electronic system
US9924590B2 (en) 2015-05-19 2018-03-20 Omron Automotive Electronics Co., Ltd. Printed board and electronic apparatus
KR101735439B1 (en) * 2015-09-10 2017-05-15 주식회사 코스모텍 Manufacturing method for radiant heat circuit board
CN111385959A (en) * 2018-12-27 2020-07-07 欣兴电子股份有限公司 Circuit board with heat dissipation block and manufacturing method thereof

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