JP2010040884A - Semiconductor device and method of bonding semiconductor chip - Google Patents

Semiconductor device and method of bonding semiconductor chip Download PDF

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JP2010040884A
JP2010040884A JP2008203709A JP2008203709A JP2010040884A JP 2010040884 A JP2010040884 A JP 2010040884A JP 2008203709 A JP2008203709 A JP 2008203709A JP 2008203709 A JP2008203709 A JP 2008203709A JP 2010040884 A JP2010040884 A JP 2010040884A
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groove
shaped protrusion
semiconductor chip
wedge
electrode
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Toru Maeda
前田　　徹
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Shinkawa Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81193—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body

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Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device which is improved in reliability during substrate bonding, and to provide a method of bonding the semiconductor chip. <P>SOLUTION: The semiconductor device 100 has a wedge-like projection 13 which is formed on an electrode 11 of a semiconductor chip 10 and decreases in width with the distance away from the electrode 11, and a groove-like projection 28 which is formed on an electrode 21 disposed on a substrate 20 according to the electrode 11 of the semiconductor chip 10 and increases in width of a groove 27 with the distance away from the electrode 21, and the semiconductor chip 10 is bonded to the substrate 20 by pressing the wedge-like projection 13 of the semiconductor chip 10 against the groove 27 of the groove-like projection 28 of the substrate 20. Here, a width W<SB>1</SB>of a wedge-like projection tip 15 is narrower than a width W<SB>4</SB>of the groove 27 of a groove-like projection tip 25, and a width W<SB>2</SB>of a wedge-like projection root 14 is wider than a width W<SB>4</SB>of the groove 27 of the groove-like projection tip 25; and the tilt angle α of a wedge-like projection side surface 16 to a surface 12 of the electrode 11 of the semiconductor chip 10 is not larger than the tilt angle β of an inclined surface 26 of the groove-like projection 28 to a surface 22 of the electrode 21 of the substrate 20. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は、半導体チップを基板に接合した半導体装置及び半導体チップを基板に接合するボンディング方法に関する。   The present invention relates to a semiconductor device in which a semiconductor chip is bonded to a substrate and a bonding method for bonding the semiconductor chip to the substrate.

半導体チップを基板に実装する場合には、半導体チップの電極と基板の電極の上に鉛やはんだなどによってそれぞれバンプを形成し、半導体チップを反転させて半導体チップの電極上に形成されたバンプを基板のバンプの上に合わせた後、半導体チップと基板とを加熱して各バンプを溶かして一体の接続層とした後、半導体チップと基板とを冷却して半導体チップを基盤に接続する方法が用いられていた（例えば、特許文献１参照）。   When mounting a semiconductor chip on a substrate, bumps are formed on the electrodes of the semiconductor chip and the electrodes of the substrate with lead or solder, respectively, and the bumps formed on the electrodes of the semiconductor chip are inverted by inverting the semiconductor chip. After aligning the bumps on the substrate, the semiconductor chip and the substrate are heated to melt each bump to form an integral connection layer, and then the semiconductor chip and the substrate are cooled to connect the semiconductor chip to the substrate. It was used (for example, refer patent document 1).

しかし、近年、電子機器の小型化の要求から、半導体チップの電極の間隔は非常に狭くなってきている。この場合、上記のようはんだバンプを溶融させて半導体チップを基板に接合する方法では、溶融したはんだによって隣接する電極同士が接続されてしまう場合があり、電極ピッチの狭い半導体チップを基板に接合することが困難となってきた。   However, in recent years, the distance between the electrodes of the semiconductor chip has become very narrow due to the demand for downsizing of electronic devices. In this case, in the method of bonding the semiconductor chip to the substrate by melting the solder bump as described above, the adjacent electrodes may be connected to each other by the molten solder, and the semiconductor chip having a narrow electrode pitch is bonded to the substrate. It has become difficult.

このため、半導体チップの電極上に金バンプを形成し、この金バンプを銅などで形成された基板のランドに圧接させる方法が用いられるようになってきている。例えば、基板の上に封止樹脂をポッティングした後、半導体チップの電極上に形成した金バンプを１０μｍ程度沈みこませるようにランドに向かって加圧して金バンプとランドとを接続させた後、封止樹脂を加熱する。加熱による封止樹脂の収縮によって半導体チップと基板とが引き合う力を発生させ、この力によって半導体チップと基板とを電気的、物理的に接続する方法や、基板のランドに凹部を設け、この凹部に金バンプの先端を押しつけて凹部に沿った形状に金バンプを変形させて金バンプを凹部に嵌合させる方法が用いられている（例えば、特許文献２、特許文献３参照）。   For this reason, a method of forming a gold bump on an electrode of a semiconductor chip and pressing the gold bump against a land of a substrate formed of copper or the like has been used. For example, after potting a sealing resin on the substrate, the gold bump formed on the electrode of the semiconductor chip is pressed toward the land so as to sink about 10 μm, and the gold bump and the land are connected, The sealing resin is heated. A force that attracts the semiconductor chip and the substrate is generated by the shrinkage of the sealing resin due to heating, and a method of electrically and physically connecting the semiconductor chip and the substrate by this force, or a recess in the land of the substrate is provided. A method is used in which the tip of the gold bump is pressed to deform the gold bump into a shape along the recess and the gold bump is fitted into the recess (see, for example, Patent Document 2 and Patent Document 3).

実開昭６２−１６３９４５号公報Japanese Utility Model Publication No. 62-163945 特開平１１−２０４９１３号公報JP-A-11-204913 特開２００３−２４９５２４号公報JP 2003-249524 A

ところで、半導体チップの集積度が高くなると、半導体チップに設けられる電極の数も多くなってくる。近年は、電極の数が数百以上の半導体チップもある。このような多くの電極を同時に基板の電極に接合する場合には、例えば、半導体チップの電極上に金バンプを形成し、基板の電極には錫バンプを形成し、金バンプを錫バンプに圧接すると共に３００℃程度に加熱し、金と錫との共晶によってバンプ同士を金属的に接合する方法が用いられている。   By the way, as the degree of integration of the semiconductor chip increases, the number of electrodes provided on the semiconductor chip also increases. In recent years, some semiconductor chips have several hundreds of electrodes. When many such electrodes are simultaneously bonded to the substrate electrode, for example, a gold bump is formed on the electrode of the semiconductor chip, a tin bump is formed on the substrate electrode, and the gold bump is pressed against the tin bump. In addition, a method is used in which the bumps are metallically bonded to each other by eutectic of gold and tin by heating to about 300 ° C.

しかし、この方法は、すべての金属バンプ同士を圧接することが必要なため、高さにバラツキがあると半導体チップに過大な荷重が加わる場合があり、半導体チップや基板が損傷を受ける場合がある。特に、近年は誘電率による伝送損失の低減を図るため基板は非常に薄いものが使用される場合が多く、基板が損傷を受け、半導体装置の信頼性が低下する場合が多いという問題があった。また、バンプの位置にずれがあった場合に、圧接の際にバンプ同士が横方向に逃げ、隣接するバンプ同士が接触してショートする場合があり、半導体装置の信頼性が低下してしまうという問題があった。   However, this method requires that all the metal bumps be pressed against each other. If the height varies, an excessive load may be applied to the semiconductor chip, and the semiconductor chip or the substrate may be damaged. . In particular, in recent years, in order to reduce transmission loss due to dielectric constant, a very thin substrate is often used, and there is a problem that the substrate is often damaged and the reliability of the semiconductor device is often lowered. . In addition, when there is a deviation in the position of the bumps, the bumps may run away in the lateral direction during press contact, and adjacent bumps may come into contact with each other to cause a short circuit, reducing the reliability of the semiconductor device. There was a problem.

本発明は、半導体チップを基板に接合した半導体装置の信頼性を向上させることを目的とする。   An object of the present invention is to improve the reliability of a semiconductor device in which a semiconductor chip is bonded to a substrate.

本発明の半導体装置は、半導体チップの各電極上に形成され、各電極から離れるに従って幅が狭くなる各楔形突起と、半導体チップの各電極に対応して基板に配置された各電極上に形成され、各電極から離れるに従って溝幅が広くなる各溝形突起と、を備え、半導体チップの各楔形突起を基板の各溝形突起の溝に押しつけて半導体チップを基板に接合した半導体装置であって、各楔形突起先端の幅は各溝形突起先端の溝幅よりも狭く、各楔形突起根元の幅は各溝形突起先端の溝幅よりも広く、各楔形突起側面の半導体チップの各電極面に対する傾斜角は各溝形突起の溝側面の基板の各電極面に対する傾斜角以下であること、を特徴とする。   The semiconductor device according to the present invention is formed on each electrode of the semiconductor chip, formed on each electrode disposed on the substrate corresponding to each electrode of the semiconductor chip, and each wedge-shaped protrusion that becomes narrower as the distance from each electrode increases. Each of the groove-shaped protrusions having a groove width that increases as the distance from each electrode increases, and the wedge-shaped protrusions of the semiconductor chip are pressed against the grooves of the groove-shaped protrusions of the substrate to bond the semiconductor chip to the substrate. The width of each wedge-shaped protrusion tip is narrower than the groove width of each groove-shaped protrusion tip, the width of each wedge-shaped protrusion root is wider than the groove width of each groove-shaped protrusion tip, and each electrode of the semiconductor chip on the side of each wedge-shaped protrusion The inclination angle with respect to the surface is equal to or less than the inclination angle with respect to each electrode surface of the substrate of the groove side surface of each groove-shaped protrusion.

本発明の半導体装置において、溝形突起は、基板の各電極から離れるに従って幅が狭くなる一対の台形突起で形成され、溝側面は、各台形突起の対向する傾斜面であり、各台形突起の高さは根元の幅よりも大きいこと、としても好適であるし、各楔形突起は角柱形状で、同一方向に延びるよう半導体チップの各電極上に形成され、各溝形突起は、溝の方向が同一方向に延びるよう基板の電極上に形成され、各楔形突起の延びる方向を溝形突起の溝の延びる方向に合わせ、超音波加振によって各楔形突起を各溝の延びる方向に振動させつつ各溝形突起の溝に押しつけて半導体チップを基板に接合することとしても好適である。   In the semiconductor device of the present invention, the groove-shaped protrusion is formed by a pair of trapezoidal protrusions that become narrower as the distance from each electrode of the substrate increases, and the groove side surface is an inclined surface that faces each trapezoidal protrusion, It is also preferable that the height is larger than the width of the root, and each wedge-shaped projection is a prismatic shape, and is formed on each electrode of the semiconductor chip so as to extend in the same direction. Are formed on the electrode of the substrate so as to extend in the same direction, the extending direction of each wedge-shaped protrusion is matched with the extending direction of the groove-shaped protrusion, and each wedge-shaped protrusion is vibrated in the extending direction of each groove by ultrasonic vibration. It is also preferable that the semiconductor chip is bonded to the substrate by pressing against the groove of each groove-shaped protrusion.

本発明の半導体チップのボンディング方法は、半導体チップの各電極から離れるに従って幅が狭くなる各楔形突起と、半導体チップの各電極に対応して基板に配置された各電極から離れるに従って溝幅が広くなる各溝形突起と、を各楔形突起先端の幅が各溝形突起先端の溝幅よりも狭く、各楔形突起の根元の幅が各溝形突起先端の溝幅よりも広く、各楔形突起側面の半導体チップの各電極面に対する傾斜角が各溝形突起の溝側面の基板の各電極面に対する傾斜角以下となるように半導体チップの各電極上と基板の各電極上に各突起を形成する突起形成工程と、半導体チップの各楔形突起を基板の各溝形突起の溝に押しつけて半導体チップを基板に接合する接合工程と、を備えることを特徴とする。   In the semiconductor chip bonding method of the present invention, each wedge-shaped protrusion whose width becomes narrower as it gets away from each electrode of the semiconductor chip, and the groove width becomes wider as it gets away from each electrode arranged on the substrate corresponding to each electrode of the semiconductor chip. Each wedge-shaped protrusion, the width of each wedge-shaped protrusion tip is narrower than the groove width of each groove-shaped protrusion tip, and the width of the root of each wedge-shaped protrusion is wider than the groove width of each groove-shaped protrusion tip, and each wedge-shaped protrusion Each protrusion is formed on each electrode of the semiconductor chip and on each electrode of the substrate so that the inclination angle of each side surface of the semiconductor chip with respect to each electrode surface is equal to or less than the inclination angle of each groove-shaped protrusion with respect to each electrode surface of the substrate. And a bonding step of pressing each wedge-shaped protrusion of the semiconductor chip against a groove of each groove-shaped protrusion of the substrate to bond the semiconductor chip to the substrate.

本発明の半導体チップのボンディング方法において、突起形成工程は、基板の各電極から離れるに従って幅が狭くなり、その高さが根元の幅よりも大きく、その対向する傾斜面が溝側面となる一対の台形突起で溝形突起を形成すること、としても好適であるし、突起形成工程は、同一方向に延びる角柱形状に各楔形突起を形成し、溝の方向が同一方向に延びるように各溝形突起を形成し、接合工程は、各楔形突起の延びる方向を各溝形突起の溝の延びる方向に合わせた後、超音波加振によって各楔形突起を各溝の延びる方向に振動させつつ各溝形突起の溝に押しつけて半導体チップを基板に接合すること、としても好適である。   In the semiconductor chip bonding method of the present invention, the protrusion forming step has a width that becomes narrower as the distance from each electrode of the substrate increases, the height is larger than the width of the base, and the pair of inclined surfaces that face the groove side surfaces. It is also preferable to form groove-shaped protrusions with trapezoidal protrusions, and the protrusion forming step forms each wedge-shaped protrusion in a prismatic shape extending in the same direction, and each groove shape so that the groove direction extends in the same direction. Protrusions are formed, and in the joining step, after the extending direction of each wedge-shaped protrusion is matched with the extending direction of each groove-shaped protrusion, each wedge-shaped protrusion is vibrated in the extending direction of each groove by ultrasonic vibration. It is also preferable that the semiconductor chip is bonded to the substrate by pressing against the groove of the projection.

本発明は、半導体チップを基板に接合した半導体装置の信頼性を向上させることができるという効果を奏する。   The present invention has an effect that the reliability of a semiconductor device in which a semiconductor chip is bonded to a substrate can be improved.

以下、図面を参照しながら本発明の好適な実施形態について説明する。図１（ｂ）に示すように、本実施形態の半導体装置１００は、半導体チップ１０に設けられた電極１１の表面１２に形成された楔形の断面を有する楔形突起１３と、基板２０に設けられた電極２１の表面２２に形成され、台形の溝２７を有する溝形突起２８と、を備え、楔形突起１３が溝形突起２８の溝２７にはまり込んで半導体チップ１０と基板２０とを接合したものである。   Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings. As shown in FIG. 1B, the semiconductor device 100 of this embodiment is provided on a substrate 20 and a wedge-shaped protrusion 13 having a wedge-shaped cross section formed on a surface 12 of an electrode 11 provided on a semiconductor chip 10. A groove-shaped protrusion 28 having a trapezoidal groove 27 formed on the surface 22 of the electrode 21, and the wedge-shaped protrusion 13 fits into the groove 27 of the groove-shaped protrusion 28 to join the semiconductor chip 10 and the substrate 20. Is.

図１（ｂ）に示すように、楔形突起１３は、半導体チップ１０の電極１１の表面１２から離れるに従って幅が狭くなるような楔形の断面で、根元１４の幅Ｗ2は先端１５の幅Ｗ1よりも大きくなっている。楔形突起１３の先端１５から見た平面形状を図１（ａ）に示す。図１（ａ）に示すように、楔形突起１３は、四角形状の電極１１の一辺に平行な方向に延びる角柱形状となっている。図１(ｂ)に示すように、対向する各側面１６は、電極１１の表面１２に対して傾斜角αだけ傾斜している。楔形突起１３は、電極１１の表面１２に金をメッキして形成されたもので、その高さは例えば、２０〜３０μｍである。 As shown in FIG. 1 (b), the wedge-shaped protrusion 13 has a wedge-shaped cross section whose width decreases as the distance from the surface 12 of the electrode 11 of the semiconductor chip 10 increases. The width W 2 of the root 14 is the width W of the tip 15. It is larger than 1 . A planar shape viewed from the tip 15 of the wedge-shaped protrusion 13 is shown in FIG. As shown in FIG. 1A, the wedge-shaped protrusion 13 has a prismatic shape extending in a direction parallel to one side of the quadrangular electrode 11. As shown in FIG. 1B, the opposing side surfaces 16 are inclined by an inclination angle α with respect to the surface 12 of the electrode 11. The wedge-shaped protrusion 13 is formed by plating gold on the surface 12 of the electrode 11 and has a height of, for example, 20 to 30 μm.

図１（ｂ）に示すように、基板２０の表面には、電極２１がメッキなどによって形成されている。電極２１は半導体チップ１０の電極１１に対応する位置に形成され、形状も半導体チップ１０の電極１１と同様の四角形状である。   As shown in FIG. 1B, an electrode 21 is formed on the surface of the substrate 20 by plating or the like. The electrode 21 is formed at a position corresponding to the electrode 11 of the semiconductor chip 10 and has a rectangular shape similar to that of the electrode 11 of the semiconductor chip 10.

図１（ｂ）に示すように、溝形突起２８は、電極２１の表面２２から離れるに従って幅が広くなる台形の溝２７を有している。溝形突起２８の先端２５の溝の幅Ｗ4は、電極２１の表面２２の溝の幅Ｗ3よりも広くなっている。溝形突起２８は、電極２１の表面２２から離れるに従ってその幅が小さくなる台形状の断面を持つ一対の台形突起２３によって構成されている。溝型突起２８の先端２５から見た平面形状を図１（ｃ）に示す。図１（ｃ）に示すように、各台形突起２３は四角い電極２１の一つの辺に平行な方向であって、楔形突起１３と同様の方向に延びる角柱形状となっている。図１（ｂ）に示すように、各台形突起２３の対向する各傾斜面２６は、溝２７の側面を形成し、各傾斜面２６は電極２１の表面２２に対して傾斜角βだけ傾斜している。また、各台形突起２３高さＨは根元２４の幅Ｗ5よりも大きく、例えば、高さＨは根元２４の幅Ｗ5の２から３倍となっていてもよい。各台形突起２３は、電極２１の表面２２に錫メッキして形成されたもので、その高さは例えば、２０〜３０μｍである。 As shown in FIG. 1B, the groove-shaped protrusion 28 has a trapezoidal groove 27 whose width increases as the distance from the surface 22 of the electrode 21 increases. The width W 4 of the groove at the tip 25 of the groove-shaped projection 28 is wider than the width W 3 of the groove on the surface 22 of the electrode 21. The groove-shaped projection 28 is constituted by a pair of trapezoidal projections 23 having a trapezoidal cross section whose width decreases as the distance from the surface 22 of the electrode 21 increases. A planar shape viewed from the tip 25 of the groove-shaped protrusion 28 is shown in FIG. As shown in FIG. 1C, each trapezoidal protrusion 23 has a prismatic shape extending in a direction parallel to one side of the square electrode 21 and extending in the same direction as the wedge-shaped protrusion 13. As shown in FIG. 1B, each inclined surface 26 facing each trapezoidal protrusion 23 forms a side surface of the groove 27, and each inclined surface 26 is inclined with respect to the surface 22 of the electrode 21 by an inclination angle β. ing. The height H of each trapezoidal protrusion 23 is larger than the width W 5 of the root 24. For example, the height H may be 2 to 3 times the width W 5 of the root 24. Each trapezoidal protrusion 23 is formed by tin-plating the surface 22 of the electrode 21 and has a height of, for example, 20 to 30 μm.

図１（ｂ）に示すように、楔形突起１３の先端１５の幅Ｗ1は溝形突起２８の先端２５の溝２７の幅Ｗ4よりも狭く、楔形突起１３の根元１４の幅Ｗ2は溝形突起２８の先端２５の溝２７の幅Ｗ4よりも広く、楔形突起１３の側面１６の電極１１の表面１２に対する傾斜角αは溝形突起２８の溝２７の側面を構成する傾斜面２６の電極２１の表面２２に対する傾斜角βと略同一である。傾斜角αは傾斜角βよりも小さな角度となっていてもよい。 As shown in FIG. 1B, the width W 1 of the tip 15 of the wedge-shaped protrusion 13 is narrower than the width W 4 of the groove 27 of the tip 25 of the groove-shaped protrusion 28, and the width W 2 of the root 14 of the wedge-shaped protrusion 13 is The inclination angle α of the side surface 16 of the wedge-shaped protrusion 13 with respect to the surface 12 of the electrode 11 is wider than the width W 4 of the groove 27 at the tip 25 of the groove-shaped protrusion 28, and the inclined surface 26 constituting the side surface of the groove 27 of the groove-shaped protrusion 28. Is substantially the same as the inclination angle β with respect to the surface 22 of the electrode 21. The inclination angle α may be smaller than the inclination angle β.

図２と図３を参照しながら、半導体チップ１０と基板２０との接合について説明する。半導体チップ１０の電極１１の表面１２の上に先に説明した楔形突起１３を形成し、基板２０の電極２１の表面２２の上に先に説明した一対の台形突起２３によって構成される溝形突起２８を形成する（突起形成工程）。楔形突起１３の形成された半導体チップ１０は、図示しない反転装置によって楔形突起１３が下面となる様に反転されて図示しないボンディング装置のコレットに吸着される。また、基板２０はボンディングステージに吸着固定される。コレット側のヒータとボンディングステージ側のヒータによって半導体チップ１０と基板２０は加熱される。   The joining of the semiconductor chip 10 and the substrate 20 will be described with reference to FIGS. A groove-shaped protrusion formed of the pair of trapezoid protrusions 23 described above is formed on the surface 22 of the electrode 21 of the substrate 20 by forming the wedge-shaped protrusion 13 described above on the surface 12 of the electrode 11 of the semiconductor chip 10. 28 is formed (projection forming step). The semiconductor chip 10 on which the wedge-shaped protrusions 13 are formed is inverted by a reversing device (not shown) so that the wedge-shaped protrusions 13 are on the lower surface, and is attracted to a collet of a bonding device (not shown). Further, the substrate 20 is fixed to the bonding stage by suction. The semiconductor chip 10 and the substrate 20 are heated by the collet side heater and the bonding stage side heater.

反転した半導体チップ１０は、図示しないボンディング装置のコレットの位置を調整することによって楔形突起１３の延びる方向を基板２０の溝形突起２８の溝２７の延びる方向となる様に方向を合わせ、また、楔形突起１３の先端１５の位置が溝２７の幅方向の中心となる様に位置合わせをする。位置合わせが終了したら、ボンディング装置のコレットを降下させる。楔形突起１３の先端の幅Ｗ1は溝形突起２８の先端２５の溝２７の幅Ｗ4よりも狭いので、楔形突起１３の先端１５は溝形突起２８の溝２７の中に入り込んでいく。 The inverted semiconductor chip 10 is aligned so that the extending direction of the wedge-shaped protrusion 13 becomes the extending direction of the groove 27 of the groove-shaped protrusion 28 of the substrate 20 by adjusting the collet position of a bonding apparatus (not shown). Positioning is performed so that the position of the tip 15 of the wedge-shaped projection 13 is the center of the groove 27 in the width direction. When the alignment is completed, the collet of the bonding apparatus is lowered. Since the width W 1 of the tip of the wedge-shaped projection 13 is narrower than the width W 4 of the groove 27 of the tip 25 of the groove-shaped projection 28, the tip 15 of the wedge-shaped projection 13 enters the groove 27 of the groove-shaped projection 28.

図３に示すように、楔形突起１３が溝２７の中に入り込んでいくと、楔形突起１３の根元１４の幅Ｗ2は溝形突起２８の先端２５の溝２７の幅Ｗ4よりも広く、楔形突起１３の側面１６の電極１１の表面１２に対する傾斜角αは溝形突起２８の溝２７の側面を構成する傾斜面２６の電極２１の表面２２に対する傾斜角βと略同一または小さな角度となっているので、楔形突起１３の各側面１６は溝形突起２８を形成する一対の台形突起２３の各傾斜面２６に当たる。各台形突起２３は根元２４の幅の２から３倍の高さを持っているので、各台形突起２３の傾斜面２６に楔形突起１３の各側面１６が押しつけられると、その押しつけ力によって各台形突起２３は左右に曲がり変形をする。この台形突起２３の曲がり変形によって溝２７の幅が広がり、楔形突起１３は溝２７の中に割り込んで入ることができる。このため、楔形突起１３は比較的小さな押しつけ力で溝２７の中に割り込むことができる。 As shown in FIG. 3, when the wedge-shaped protrusion 13 enters the groove 27, the width W 2 of the root 14 of the wedge-shaped protrusion 13 is wider than the width W 4 of the groove 27 at the tip 25 of the groove-shaped protrusion 28. The inclination angle α of the side surface 16 of the wedge-shaped protrusion 13 with respect to the surface 12 of the electrode 11 is substantially the same or smaller than the inclination angle β of the inclined surface 26 constituting the side surface of the groove 27 of the groove-shaped protrusion 28 with respect to the surface 22 of the electrode 21. Therefore, each side surface 16 of the wedge-shaped projection 13 hits each inclined surface 26 of the pair of trapezoidal projections 23 forming the groove-shaped projection 28. Each trapezoidal protrusion 23 has a height that is 2 to 3 times the width of the root 24. Therefore, when each side surface 16 of the wedge-shaped protrusion 13 is pressed against the inclined surface 26 of each trapezoidal protrusion 23, each trapezoidal protrusion 23 is pressed by the pressing force. The protrusion 23 bends left and right and deforms. Due to the bending deformation of the trapezoidal protrusion 23, the width of the groove 27 is widened, and the wedge-shaped protrusion 13 can be inserted into the groove 27. For this reason, the wedge-shaped projection 13 can be inserted into the groove 27 with a relatively small pressing force.

そして、所定の位置まで半導体チップ１０を基板２０に向かって押し付けたら半導体チップの降下を停止する。半導体チップ１０と基板２０との加熱によって楔形突起１３と各台形突起２３も加熱されているので、金の楔形突起１３の側面１６が錫の傾斜面２６に接すると、その接合部に金と錫の共晶ができ、これによって楔形突起１３と台形突起２３とが金属的に接合される。この接合は、固相状態の金属同士を接合するもので固相接合となっている（接合工程）。   Then, when the semiconductor chip 10 is pressed toward the substrate 20 to a predetermined position, the lowering of the semiconductor chip is stopped. Since the wedge-shaped projections 13 and the trapezoidal projections 23 are also heated by the heating of the semiconductor chip 10 and the substrate 20, when the side surface 16 of the gold wedge-shaped projection 13 comes into contact with the inclined surface 26 of tin, gold and tin Thus, the wedge-shaped protrusion 13 and the trapezoidal protrusion 23 are metallically joined. This joining is what joins the metal of a solid state, and is solid phase joining (joining process).

図４に示すように、半導体チップ１０には複数の電極１１が配置され、基板２０の半導体チップ１０の各電極１１に対応する位置に複数の電極２１が配置され、半導体チップ１０の電極１１には各楔形突起１３が形成され、基板２０の各電極２１には溝形突起２８が形成されている。各楔形突起１３の高さにバラツキがあった場合、各楔形突起１３は各溝形突起２８の溝２７に入り込む深さが異なることとなるが、楔形突起１３は比較的小さな力で溝２７の中に割り込むことができるため、複数の楔形突起１３の高さにバラツキがある場合でも比較的小さな押しつけ力で各楔形突起１３の各側面１６を各溝２７の側面を構成する傾斜面２６に接しさせることができる。このため、楔形突起１３の高さにバラツキがあった場合でも半導体チップ１０あるいは基板２０の損傷を抑制しつつ金の楔形突起１３と錫の台形突起２３の傾斜面２６を加熱しながら接しさせることによって容易に半導体チップ１０の電極１１と基板２０の電極２１とを電気的、金属的に接合することができ、半導体装置１００の信頼性を向上させることができるという効果を奏する。   As shown in FIG. 4, a plurality of electrodes 11 are arranged on the semiconductor chip 10, and a plurality of electrodes 21 are arranged at positions corresponding to the respective electrodes 11 of the semiconductor chip 10 on the substrate 20. Each wedge-shaped protrusion 13 is formed, and each electrode 21 of the substrate 20 is formed with a groove-shaped protrusion 28. When the height of each wedge-shaped protrusion 13 varies, the depth of each wedge-shaped protrusion 13 entering the groove 27 of each groove-shaped protrusion 28 is different. Therefore, even when the height of the plurality of wedge-shaped projections 13 varies, the side surfaces 16 of the wedge-shaped projections 13 are brought into contact with the inclined surfaces 26 constituting the side surfaces of the grooves 27 with a relatively small pressing force. Can be made. For this reason, even if the height of the wedge-shaped projection 13 varies, the inclined surface 26 of the gold wedge-shaped projection 13 and the trapezoidal projection 23 of the tin is brought into contact with each other while being heated while suppressing damage to the semiconductor chip 10 or the substrate 20. As a result, the electrode 11 of the semiconductor chip 10 and the electrode 21 of the substrate 20 can be joined electrically and metallicly, and the reliability of the semiconductor device 100 can be improved.

また、本実施形態では、楔形突起１３の先端１５の幅Ｗ1は溝形突起２８の先端２５の溝２７の幅Ｗ4よりも狭くなっているので、楔形突起１３の先端１５の位置が溝２７の中央の位置となっていなくても、楔形突起１３の先端１５は溝２７の中に入り込むことができる。そして、楔形突起１３の先端１５は一旦溝２７の間に入ると、各台形突起２３の各傾斜面２６によってガイドされ、溝２７の外に外れることがない。このため、楔形突起１３が隣接する楔形突起１３と接触してショートが発生することを抑制することができるので、半導体装置１００の信頼性を向上させることができるという効果を奏する。 In the present embodiment, the width W 1 of the tip 15 of the wedge-shaped projection 13 is narrower than the width W 4 of the groove 27 of the tip 25 of the groove-shaped projection 28, so that the position of the tip 15 of the wedge-shaped projection 13 is the groove. The tip 15 of the wedge-shaped protrusion 13 can enter the groove 27 even if it is not located at the center position of 27. Then, once the tip 15 of the wedge-shaped protrusion 13 enters between the grooves 27, the wedge-shaped protrusion 13 is guided by the inclined surfaces 26 of the trapezoidal protrusions 23 and does not come out of the grooves 27. For this reason, since it can suppress that the wedge-shaped protrusion 13 contacts with the adjacent wedge-shaped protrusion 13 and a short circuit occurs, the reliability of the semiconductor device 100 can be improved.

半導体チップ１０の楔形突起１３を基板２０の溝形突起２８の溝２７に割り込ませる際に、楔形突起１３を傾斜面２６の延びる方向に超音波振動によって加振することとしてもよい。この場合、超音波加振によって楔形突起１３の側面１６と溝２７の傾斜面２６とが擦れ合うので、より小さな力で楔形突起１３を溝形突起２８の溝２７の中に割り込ませることができ、より小さな押しつけ力で各楔形突起１３の各側面１６を各溝２７の側面を構成する傾斜面２６に接しさせることができ、半導体チップ１０あるいは基板２０の損傷をより抑制することができるという効果を奏する。   When the wedge-shaped protrusion 13 of the semiconductor chip 10 is inserted into the groove 27 of the groove-shaped protrusion 28 of the substrate 20, the wedge-shaped protrusion 13 may be vibrated by ultrasonic vibration in the extending direction of the inclined surface 26. In this case, since the side surface 16 of the wedge-shaped projection 13 and the inclined surface 26 of the groove 27 are rubbed by ultrasonic vibration, the wedge-shaped projection 13 can be inserted into the groove 27 of the groove-shaped projection 28 with a smaller force. The side surface 16 of each wedge-shaped projection 13 can be brought into contact with the inclined surface 26 that constitutes the side surface of each groove 27 with a smaller pressing force, and the damage to the semiconductor chip 10 or the substrate 20 can be further suppressed. Play.

図４に示すように、半導体チップ１０に複数の電極１１が縦方向と横方向とに二次元的に並べて配置されている場合には、各半導体チップ１０の電極１１に形成される楔形突起１３の延びる方向と基板２０の電極２１に形成される溝形突起２８の溝２７の延びる方向が超音波加振の方向となるようにすることによって、電極１１が一列に配置されていない場合でも、楔形突起１３溝２７に割り込ませる際に超音波加振を行うことができ、様々な電極１１の配置に対応することができるという効果を奏する。   As shown in FIG. 4, when a plurality of electrodes 11 are two-dimensionally arranged in the vertical direction and the horizontal direction on the semiconductor chip 10, wedge-shaped protrusions 13 formed on the electrodes 11 of each semiconductor chip 10. Even when the electrodes 11 are not arranged in a row, the direction in which the groove 11 of the groove-shaped projection 28 formed on the electrode 21 of the substrate 20 and the direction in which the groove 27 extends is the direction of ultrasonic vibration. When the wedge-shaped protrusion 13 is inserted into the groove 27, ultrasonic vibration can be performed, and it is possible to cope with various arrangements of the electrodes 11.

以上説明した各実施形態では、溝型突起２８は基板２０の電極２１の上に形成された一対の台形突起２３によって構成されたものとして説明したが、各台形突起２３を電極２１の上に別途形成せず、例えば、電極２１の表面２２にメッキ層を形成し、その後、溝２７の部分のみをエッチングして一体の溝型突起２８としてもよい。また、楔形突起１３はメッキによらず、バンプボンダなどによって形成するようにしてもよい。また、本実施形態では、楔形突起１３は金によって構成され、溝型突起２８は錫によって構成されることとして説明したが、加熱によって共晶による固相接合ができれば、他の金属を用いてもよい。   In each of the embodiments described above, the groove-shaped protrusion 28 has been described as being constituted by a pair of trapezoidal protrusions 23 formed on the electrode 21 of the substrate 20. However, each trapezoidal protrusion 23 is separately provided on the electrode 21. For example, a plating layer may be formed on the surface 22 of the electrode 21, and then only the groove 27 may be etched to form an integrated groove-shaped protrusion 28. Further, the wedge-shaped protrusion 13 may be formed by a bump bonder or the like without using plating. In this embodiment, the wedge-shaped protrusion 13 is made of gold, and the groove-shaped protrusion 28 is made of tin. However, if solid phase bonding by eutectic can be achieved by heating, other metals can be used. Good.

本発明の実施形態における半導体装置の構成を示す説明図である。It is explanatory drawing which shows the structure of the semiconductor device in embodiment of this invention. 本発明の実施形態における半導体装置の半導体チップと基板との接合手順を示す説明図である。It is explanatory drawing which shows the joining procedure of the semiconductor chip and board | substrate of a semiconductor device in embodiment of this invention. 本発明の実施形態における半導体装置の半導体チップと基板との接合手順を示す説明図である。It is explanatory drawing which shows the joining procedure of the semiconductor chip and board | substrate of a semiconductor device in embodiment of this invention. 本発明の実施形態における半導体装置の半導体チップと基板との接合手順を示す説明図である。It is explanatory drawing which shows the joining procedure of the semiconductor chip and board | substrate of a semiconductor device in embodiment of this invention.

符号の説明Explanation of symbols

１０ 半導体チップ、１１，２１ 電極、１２，２２ 表面、１３ 楔形突起、１４，２４ 根元、１５，２５ 先端、１６ 側面、２０ 基板、２３ 台形突起、２６ 傾斜面、２７ 溝、２８ 溝形突起、１００ 半導体装置、Ｗ1〜Ｗ5 幅、α，β 傾斜角。 10 semiconductor chips, 11 and 21 electrodes, 12 and 22 surfaces, 13 wedge-shaped protrusions, 14 and 24 roots, 15 and 25 tips, 16 side surfaces, 20 substrates, 23 trapezoidal protrusions, 26 inclined surfaces, 27 grooves, and 28 groove-shaped protrusions, 100 Semiconductor device, W 1 to W 5 width, α, β tilt angle.

Claims (6)

半導体チップの各電極上に形成され、各電極から離れるに従って幅が狭くなる各楔形突起と、
半導体チップの各電極に対応して基板に配置された各電極上に形成され、各電極から離れるに従って溝幅が広くなる各溝形突起と、を備え、
半導体チップの各楔形突起を基板の各溝形突起の溝に押しつけて半導体チップを基板に接合した半導体装置であって、
各楔形突起先端の幅は各溝形突起先端の溝幅よりも狭く、各楔形突起根元の幅は各溝形突起先端の溝幅よりも広く、各楔形突起側面の半導体チップの各電極面に対する傾斜角は各溝形突起の溝側面の基板の各電極面に対する傾斜角以下であること、
を特徴とする半導体装置。 Each wedge-shaped protrusion formed on each electrode of the semiconductor chip and having a width narrowing as it is separated from each electrode;
Each groove-shaped protrusion formed on each electrode disposed on the substrate corresponding to each electrode of the semiconductor chip, and having a groove width that increases as the distance from each electrode increases.
A semiconductor device in which each wedge-shaped protrusion of a semiconductor chip is pressed against a groove of each groove-shaped protrusion of the substrate to bond the semiconductor chip to the substrate,
The width of each wedge-shaped protrusion tip is narrower than the groove width of each groove-shaped protrusion tip, the width of each wedge-shaped protrusion root is wider than the groove width of each groove-shaped protrusion tip, and each wedge-shaped protrusion side surface with respect to each electrode surface of the semiconductor chip The inclination angle is equal to or less than the inclination angle with respect to each electrode surface of the substrate on the groove side surface of each groove-shaped protrusion,
A semiconductor device characterized by the above. 請求項１に記載の半導体装置であって、
溝形突起は、基板の各電極から離れるに従って幅が狭くなる一対の台形突起で形成され、溝側面は、各台形突起の対向する傾斜面であり、
各台形突起の高さは根元の幅よりも大きいこと、
を特徴とする半導体装置。 The semiconductor device according to claim 1,
The groove-shaped protrusions are formed by a pair of trapezoidal protrusions that become narrower as they are separated from each electrode of the substrate, and the groove side surfaces are inclined surfaces facing each of the trapezoidal protrusions,
The height of each trapezoidal protrusion is larger than the width of the root,
A semiconductor device characterized by the above. 請求項１または２に記載の半導体装置であって、
各楔形突起は角柱形状で、同一方向に延びるよう半導体チップの各電極上に形成され、
各溝形突起は、溝の方向が同一方向に延びるよう基板の電極上に形成され、
各楔形突起の延びる方向を溝形突起の溝の延びる方向に合わせ、超音波加振によって各楔形突起を各溝の延びる方向に振動させつつ各溝形突起の溝に押しつけて半導体チップを基板に接合したこと、
を特徴とする半導体装置。 The semiconductor device according to claim 1, wherein
Each wedge-shaped projection has a prismatic shape and is formed on each electrode of the semiconductor chip so as to extend in the same direction.
Each groove-shaped protrusion is formed on the electrode of the substrate so that the direction of the groove extends in the same direction,
The extending direction of each wedge-shaped protrusion is matched with the extending direction of the groove-shaped protrusion, and each wedge-shaped protrusion is oscillated in the extending direction of each groove by ultrasonic vibration and pressed against the groove of each groove-shaped protrusion so that the semiconductor chip is placed on the substrate. Joined,
A semiconductor device characterized by the above. 半導体チップの各電極から離れるに従って幅が狭くなる各楔形突起と、半導体チップの各電極に対応して基板に配置された各電極から離れるに従って溝幅が広くなる各溝形突起と、を各楔形突起先端の幅が各溝形突起先端の溝幅よりも狭く、各楔形突起の根元の幅が各溝形突起先端の溝幅よりも広く、各楔形突起側面の半導体チップの各電極面に対する傾斜角が各溝形突起の溝側面の基板の各電極面に対する傾斜角以下となるように半導体チップの各電極上と基板の各電極上に各突起を形成する突起形成工程と、
半導体チップの各楔形突起を基板の各溝形突起の溝に押しつけて半導体チップを基板に接合する接合工程と、
を備えることを特徴とする半導体チップのボンディング方法。 Each wedge-shaped protrusion whose width becomes narrower as it gets away from each electrode of the semiconductor chip, and each groove-shaped protrusion whose groove width becomes wider as it gets away from each electrode arranged on the substrate corresponding to each electrode of the semiconductor chip, The width of the protrusion tip is narrower than the groove width of each groove-shaped protrusion tip, the width of the root of each wedge-shaped protrusion is wider than the groove width of each groove-shaped protrusion tip, and each wedge-shaped protrusion side surface is inclined with respect to each electrode surface of the semiconductor chip A protrusion forming step of forming each protrusion on each electrode of the semiconductor chip and on each electrode of the substrate so that the angle is equal to or less than an inclination angle with respect to each electrode surface of the substrate of the groove side surface of each groove-shaped protrusion;
A bonding step of pressing each wedge-shaped protrusion of the semiconductor chip against a groove of each groove-shaped protrusion of the substrate to bond the semiconductor chip to the substrate;
A method of bonding a semiconductor chip, comprising: 請求項４に記載の半導体チップのボンディング方法であって、
突起形成工程は、基板の各電極から離れるに従って幅が狭くなり、その高さが根元の幅よりも大きく、その対向する傾斜面が溝側面となる一対の台形突起で溝形突起を形成すること、
を特徴とする半導体チップのボンディング方法。 A semiconductor chip bonding method according to claim 4,
The protrusion forming step forms a groove-shaped protrusion with a pair of trapezoidal protrusions whose width becomes narrower as the distance from each electrode of the substrate increases, the height of which is larger than the width of the base, and the opposing inclined surfaces become the groove side surfaces. ,
A semiconductor chip bonding method characterized by the above. 請求項４または５に記載の半導体チップのボンディング方法であって、
突起形成工程は、同一方向に延びる角柱形状に各楔形突起を形成し、溝の方向が同一方向に延びるように各溝形突起を形成し、
接合工程は、各楔形突起の延びる方向を各溝形突起の溝の延びる方向に合わせた後、超音波加振によって各楔形突起を各溝の延びる方向に振動させつつ各溝形突起の溝に押しつけて半導体チップを基板に接合すること、
を特徴とする半導体チップのボンディング方法。 A semiconductor chip bonding method according to claim 4 or 5,
In the protrusion forming step, each wedge-shaped protrusion is formed in a prismatic shape extending in the same direction, each groove-shaped protrusion is formed so that the direction of the groove extends in the same direction,
In the joining process, after the extending direction of each wedge-shaped protrusion is matched with the extending direction of each groove-shaped protrusion, each wedge-shaped protrusion is vibrated in the extending direction of each groove by ultrasonic vibration, and the groove-shaped protrusion is formed into a groove. Pressing to bond the semiconductor chip to the substrate,
A semiconductor chip bonding method characterized by the above.
JP2008203709A 2008-08-07 2008-08-07 Semiconductor device and method of bonding semiconductor chip Withdrawn JP2010040884A (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011211042A (en) * 2010-03-30 2011-10-20 Fujitsu Ltd Electronic device
JPWO2014136241A1 (en) * 2013-03-07 2017-02-09 東北マイクロテック株式会社 Laminated body and method for producing the same
CN111670489A (en) * 2018-02-07 2020-09-15 三菱电机株式会社 Wedge tool, bonding apparatus, and bonding inspection method
EP3796367A4 (en) * 2018-11-21 2022-03-23 Tohoku-Microtec Co., Ltd Stacked semiconductor device and multiple chips used therein

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011211042A (en) * 2010-03-30 2011-10-20 Fujitsu Ltd Electronic device
JPWO2014136241A1 (en) * 2013-03-07 2017-02-09 東北マイクロテック株式会社 Laminated body and method for producing the same
CN111670489A (en) * 2018-02-07 2020-09-15 三菱电机株式会社 Wedge tool, bonding apparatus, and bonding inspection method
CN111670489B (en) * 2018-02-07 2024-04-19 三菱电机株式会社 Wedge tool, bonding device and bonding inspection method
EP3796367A4 (en) * 2018-11-21 2022-03-23 Tohoku-Microtec Co., Ltd Stacked semiconductor device and multiple chips used therein
US11495565B2 (en) 2018-11-21 2022-11-08 Tohoku-Microtec Co., Ltd. Stacked semiconductor device and multiple chips used therein

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