JP2009170911A - 印刷回路基板及びその製造方法 - Google Patents
印刷回路基板及びその製造方法 Download PDFInfo
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- JP2009170911A JP2009170911A JP2009004838A JP2009004838A JP2009170911A JP 2009170911 A JP2009170911 A JP 2009170911A JP 2009004838 A JP2009004838 A JP 2009004838A JP 2009004838 A JP2009004838 A JP 2009004838A JP 2009170911 A JP2009170911 A JP 2009170911A
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- Prior art keywords
- circuit pattern
- insulating layer
- layer
- resin layer
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/386—Improvement of the adhesion between the insulating substrate and the metal by the use of an organic polymeric bonding layer, e.g. adhesive
- H05K3/387—Improvement of the adhesion between the insulating substrate and the metal by the use of an organic polymeric bonding layer, e.g. adhesive for electroless plating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4661—Adding a circuit layer by direct wet plating, e.g. electroless plating; insulating materials adapted therefor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0358—Resin coated copper [RCC]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
- H05K2203/1152—Replicating the surface structure of a sacrificial layer, e.g. for roughening
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0055—After-treatment, e.g. cleaning or desmearing of holes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/381—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/426—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates without metal
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49126—Assembling bases
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
【解決手段】本発明の印刷回路基板の製造方法は、第1絶縁層、第1回路パターン、第2絶縁層、及び樹脂層が順に積層された基板を提供するステップと、基板を貫通する貫通孔を形成するステップと、デスミア処理により樹脂層に粗さを形成するステップと、貫通孔を介して層間導通を行うビアを形成するステップと、粗さが形成された樹脂層に第2回路パターンを形成するステップとを含むことを特徴とする。
【選択図】図6
Description
212、212' 樹脂層
21 第2基材
23 第1基材
232 第1絶縁層
231 第1回路パターン
22 第2絶縁層
24 貫通孔
26 シード層
27 メッキレジスト
28 第2回路パターン
29 ビア
Claims (6)
- 第1絶縁層、第1回路パターン、第2絶縁層、及び樹脂層が順に積層された基板を提供するステップと、
前記基板を貫通する貫通孔を形成するステップと、
デスミア(desmear)処理で前記樹脂層に粗さを形成するステップと、
前記貫通孔を介して層間導通を行うビアを形成するステップと、
前記粗さが形成された樹脂層に第2回路パターンを形成するステップと、
を含む印刷回路基板の製造方法。 - 前記ビアを形成するステップ及び前記第2回路パターンを形成するステップは、
前記粗さを形成するステップの後に、
前記樹脂層及び前記貫通孔の内壁にシード層を形成するステップと、
前記シード層に前記ビア及び前記第2回路パターンに対応するメッキレジストを形成するステップと、
電解メッキを行うステップと、
前記メッキレジストを除去するステップと、
フラッシュエッチングを行うステップと、を含んで同時に行われることを特徴とする請求項1に記載の印刷回路基板の製造方法。 - 前記基板は、
前記第1絶縁層及び前記第1回路パターンが積層された第1基材を提供するステップと、
前記樹脂層及び金属層が積層された第2基材を提供するステップと、
前記第2絶縁層を介在して、前記第1回路パターンと前記樹脂層とが対向するように、前記第1基材及び前記第2基材を圧着するステップと、
前記金属層を除去するステップと、を含んで製造されることを特徴とする請求項1または請求項2に記載の印刷回路基板の製造方法。 - 前記第2絶縁層は、半硬化(B-stage)状態であることを特徴とする請求項3に記載の印刷回路基板の製造方法。
- 前記金属層を除去するステップは、湿式エッチングで行われることを特徴とする請求項3または請求項4に記載の印刷回路基板の製造方法。
- 第1絶縁層と、
前記第1絶縁層に積層された第1回路パターンと、
前記第1回路パターンを覆うように前記第1絶縁層に積層された第2絶縁層と、
前記第2絶縁層に積層され、粗さが形成された樹脂層と、
前記樹脂層に形成された第2回路パターンと、
前記第2回路パターンと電気的に接続され、前記第1絶縁層、前記第1回路パターン、及び前記第2絶縁層を貫通するビアと、を含む印刷回路基板。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2008-0004387 | 2008-01-15 | ||
KR1020080004387A KR101070798B1 (ko) | 2008-01-15 | 2008-01-15 | 인쇄회로기판 및 그 제조방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2009170911A true JP2009170911A (ja) | 2009-07-30 |
JP4972753B2 JP4972753B2 (ja) | 2012-07-11 |
Family
ID=40849677
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009004838A Expired - Fee Related JP4972753B2 (ja) | 2008-01-15 | 2009-01-13 | 印刷回路基板の製造方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US7992296B2 (ja) |
JP (1) | JP4972753B2 (ja) |
KR (1) | KR101070798B1 (ja) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6144003B2 (ja) * | 2011-08-29 | 2017-06-07 | 富士通株式会社 | 配線構造及びその製造方法並びに電子装置及びその製造方法 |
JP7376509B2 (ja) * | 2018-12-25 | 2023-11-08 | 寿屋フロンテ株式会社 | 制振材 |
CN112312659B (zh) * | 2019-07-29 | 2021-09-21 | 庆鼎精密电子(淮安)有限公司 | 电路板的除胶方法 |
KR20230080171A (ko) * | 2021-11-29 | 2023-06-07 | 와이엠티 주식회사 | 표면조도가 낮은 금속박을 이용한 기판의 회로패턴 형성방법 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002246730A (ja) * | 2001-02-13 | 2002-08-30 | Mitsubishi Electric Corp | プリント配線板のデスミア方法及びデスミア装置 |
JP2004319887A (ja) * | 2003-04-18 | 2004-11-11 | Mitsubishi Gas Chem Co Inc | アディティブ用樹脂組成物基板へのレーザーによる孔形成方法及びプリント配線板の製造方法。 |
JP2005236067A (ja) * | 2004-02-20 | 2005-09-02 | Dainippon Printing Co Ltd | 配線基板と配線基板の製造方法、および半導パッケージ |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
MY144574A (en) * | 1998-09-14 | 2011-10-14 | Ibiden Co Ltd | Printed circuit board and method for its production |
JP4199198B2 (ja) * | 2003-01-16 | 2008-12-17 | 富士通株式会社 | 多層配線基板およびその製造方法 |
US7345350B2 (en) * | 2003-09-23 | 2008-03-18 | Micron Technology, Inc. | Process and integration scheme for fabricating conductive components, through-vias and semiconductor components including conductive through-wafer vias |
US7199970B2 (en) * | 2003-11-03 | 2007-04-03 | Material Sciences Corporation | Damped disc drive assembly, and method for damping disc drive assembly |
TW200602427A (en) * | 2004-03-30 | 2006-01-16 | Taiyo Ink Mfg Co Ltd | Thermosetting resin composition and multilayered printed wiring board comprising the same |
TWI241007B (en) * | 2004-09-09 | 2005-10-01 | Phoenix Prec Technology Corp | Semiconductor device embedded structure and method for fabricating the same |
JP4319976B2 (ja) * | 2004-12-27 | 2009-08-26 | 日本シイエムケイ株式会社 | 多層プリント配線板及びその製造方法 |
JP2007073834A (ja) * | 2005-09-08 | 2007-03-22 | Shinko Electric Ind Co Ltd | 絶縁樹脂層上の配線形成方法 |
US7989081B2 (en) | 2006-01-25 | 2011-08-02 | Mitsubishi Gas Chemical Company, Inc. | Resin composite copper foil, printed wiring board, and production processes thereof |
IL175011A (en) * | 2006-04-20 | 2011-09-27 | Amitech Ltd | Coreless cavity substrates for chip packaging and their fabrication |
-
2008
- 2008-01-15 KR KR1020080004387A patent/KR101070798B1/ko not_active IP Right Cessation
-
2009
- 2009-01-09 US US12/351,333 patent/US7992296B2/en not_active Expired - Fee Related
- 2009-01-13 JP JP2009004838A patent/JP4972753B2/ja not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002246730A (ja) * | 2001-02-13 | 2002-08-30 | Mitsubishi Electric Corp | プリント配線板のデスミア方法及びデスミア装置 |
JP2004319887A (ja) * | 2003-04-18 | 2004-11-11 | Mitsubishi Gas Chem Co Inc | アディティブ用樹脂組成物基板へのレーザーによる孔形成方法及びプリント配線板の製造方法。 |
JP2005236067A (ja) * | 2004-02-20 | 2005-09-02 | Dainippon Printing Co Ltd | 配線基板と配線基板の製造方法、および半導パッケージ |
Also Published As
Publication number | Publication date |
---|---|
KR101070798B1 (ko) | 2011-10-06 |
JP4972753B2 (ja) | 2012-07-11 |
US20090178840A1 (en) | 2009-07-16 |
US7992296B2 (en) | 2011-08-09 |
KR20090078518A (ko) | 2009-07-20 |
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