JP2007142167A - 表示装置およびその製造方法 - Google Patents
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- 238000004519 manufacturing process Methods 0.000 title claims description 35
- 239000000758 substrate Substances 0.000 claims abstract description 139
- 239000004065 semiconductor Substances 0.000 claims abstract description 55
- 239000013078 crystal Substances 0.000 claims description 52
- 238000000034 method Methods 0.000 claims description 45
- 230000001678 irradiating effect Effects 0.000 claims description 12
- 238000005520 cutting process Methods 0.000 claims description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 71
- 229910052710 silicon Inorganic materials 0.000 abstract description 71
- 239000010703 silicon Substances 0.000 abstract description 71
- 239000011521 glass Substances 0.000 abstract description 47
- 230000002776 aggregation Effects 0.000 abstract description 42
- 238000004220 aggregation Methods 0.000 abstract description 28
- 229910052581 Si3N4 Inorganic materials 0.000 abstract description 22
- 238000002425 crystallisation Methods 0.000 abstract description 22
- 230000008025 crystallization Effects 0.000 abstract description 22
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 abstract description 22
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 10
- 229910052814 silicon oxide Inorganic materials 0.000 abstract description 10
- 230000010355 oscillation Effects 0.000 abstract description 3
- 239000010408 film Substances 0.000 description 194
- 239000010409 thin film Substances 0.000 description 65
- 239000010410 layer Substances 0.000 description 29
- 230000008569 process Effects 0.000 description 20
- 238000010586 diagram Methods 0.000 description 19
- 230000015572 biosynthetic process Effects 0.000 description 18
- 239000004973 liquid crystal related substance Substances 0.000 description 16
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 16
- 229910021417 amorphous silicon Inorganic materials 0.000 description 15
- 238000005054 agglomeration Methods 0.000 description 14
- 229910004298 SiO 2 Inorganic materials 0.000 description 13
- 229920005591 polysilicon Polymers 0.000 description 12
- 239000011159 matrix material Substances 0.000 description 10
- 238000000059 patterning Methods 0.000 description 10
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 8
- 239000002184 metal Substances 0.000 description 8
- 229910052751 metal Inorganic materials 0.000 description 8
- 229920002120 photoresistant polymer Polymers 0.000 description 7
- 238000005530 etching Methods 0.000 description 6
- 230000004048 modification Effects 0.000 description 6
- 238000012986 modification Methods 0.000 description 6
- 229910021419 crystalline silicon Inorganic materials 0.000 description 5
- 239000011229 interlayer Substances 0.000 description 5
- 238000009792 diffusion process Methods 0.000 description 4
- 230000002093 peripheral effect Effects 0.000 description 4
- 239000011734 sodium Substances 0.000 description 4
- 239000000243 solution Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 239000002243 precursor Substances 0.000 description 3
- 238000005070 sampling Methods 0.000 description 3
- 238000000926 separation method Methods 0.000 description 3
- DGAQECJNVWCQMB-PUAWFVPOSA-M Ilexoside XXIX Chemical compound C[C@@H]1CC[C@@]2(CC[C@@]3(C(=CC[C@H]4[C@]3(CC[C@@H]5[C@@]4(CC[C@@H](C5(C)C)OS(=O)(=O)[O-])C)C)[C@@H]2[C@]1(C)O)C)C(=O)O[C@H]6[C@@H]([C@H]([C@@H]([C@H](O6)CO)O)O)O.[Na+] DGAQECJNVWCQMB-PUAWFVPOSA-M 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
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- 238000005224 laser annealing Methods 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 239000000565 sealant Substances 0.000 description 2
- 229910052708 sodium Inorganic materials 0.000 description 2
- 230000001629 suppression Effects 0.000 description 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- 229910009372 YVO4 Inorganic materials 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- 150000004770 chalcogenides Chemical class 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000008094 contradictory effect Effects 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000005499 laser crystallization Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 230000002035 prolonged effect Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000002407 reforming Methods 0.000 description 1
- 239000011856 silicon-based particle Substances 0.000 description 1
- 238000007711 solidification Methods 0.000 description 1
- 230000008023 solidification Effects 0.000 description 1
- 230000035882 stress Effects 0.000 description 1
- 230000003685 thermal hair damage Effects 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
- H01L27/1274—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
- H01L27/1281—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor by using structural features to control crystal growth, e.g. placement of grain filters
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
- H01L27/1274—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
- H01L27/1285—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor using control of the annealing or irradiation parameters, e.g. using different scanning direction or intensity for different transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1296—Multistep manufacturing methods adapted to increase the uniformity of device parameters
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Recrystallisation Techniques (AREA)
- Liquid Crystal (AREA)
- Thin Film Transistor (AREA)
Abstract
【解決手段】 凸部を形成したガラス基板101に窒化シリコン膜102と酸化シリコン膜103の下地膜を成膜し、その上にシリコン基膜107を成膜する。シリコン基膜107の下層にレーザの走査方向Sと交差する土手200を位置させる。レーザの走査で発生した凝集304は土手200を乗り越えた部分で停止し、その後は正常に帯状結晶シリコン膜302の形成がなされる。
【選択図】 図1
Description
基板または絶縁膜には土手を有し、この土手の長手方向を帯状結晶の長手方向の延長線と30度以上、90度以下の角度、好ましくは60度以上、90度以下の角度で交差させているが、土手の形成位置と方向を工夫することで、土手の長手方向を帯状結晶の長手方向の延長線と30度以上、60度以下の角度で交差させてもよい。
Claims (17)
- 基板と、
前記基板の上に形成された絶縁膜と、
前記絶縁膜の上に形成された半導体膜とを備えた表示装置の製造方法であって、
前記基板または前記絶縁膜に土手を形成する土手形成工程と、
前記土手と前記土手以外の平坦な部分とを覆って前記半導体膜を形成する半導体膜形成工程と、
連続発振レーザを前記半導体膜に照射しながら、前記土手を横切って前記土手の長手方向と30度以上、90度以下の角度で交差する方向に走査することにより、前記半導体膜に帯状結晶を形成する帯状結晶形成工程とを有することを特徴とする表示装置の製造方法。 - 前記帯状結晶形成工程は、前記連続発振レーザを前記半導体膜に照射しながら、前記土手を横切って前記土手の長手方向と60度以上、90度以下の角度で交差する方向に走査することにより、前記半導体膜に帯状結晶を形成する工程であることを特徴とする請求項1に記載の表示装置の製造方法。
- 前記帯状結晶形成工程は、前記連続発振レーザを前記半導体膜に照射しながら、前記土手を横切って前記土手の長手方向と30度以上、60度以下の角度で交差する方向に走査することにより、前記半導体膜に帯状結晶を形成する工程であることを特徴とする請求項1に記載の表示装置の製造方法。
- 前記基板を複数枚の表示装置に切断する切断工程を有し、
前記土手は切断箇所に沿って形成されていることを特徴とする請求項1から3の何れかに記載の表示装置の製造方法。 - 前記土手は前記切断箇所の近傍に形成されていることを特徴とする請求項4に記載の表示装置の製造方法。
- 前記土手は、高さが20nm以上であることを特徴とする請求項1から5の何れかに記載の表示装置の製造方法。
- 前記土手は、テーパ角が10度以上であることを特徴とする請求項1から6の何れかに記載の表示装置の製造方法。
- 前記連続発振レーザの走査は、前記連続発振レーザの照射光または前記基板のうち少なくとも一方を移動させることにより行うことを特徴とする請求項1から7の何れかに記載の表示装置の製造方法。
- 前記連続発振レーザをパルスに変調しながら前記半導体膜に照射することを特徴とする請求項1から8の何れかに記載の表示装置の製造方法。
- 基板と、
前記基板の上に形成された絶縁膜と、
前記絶縁膜の上に形成された半導体膜とを備えた表示装置であって、
前記半導体膜は帯状結晶を有し、
前記基板または前記絶縁膜は、土手を有し、
前記土手の長手方向は、前記帯状結晶の長手方向の延長線と30度以上、90度以下の角度で交差することを特徴とする表示装置。 - 前記土手の長手方向は、前記帯状結晶の長手方向の延長線と60度以上、90度以下の角度で交差することを特徴とする請求項10に記載の表示装置。
- 前記土手の長手方向は、前記帯状結晶の長手方向の延長線と30度以上、60度以下の角度で交差することを特徴とする請求項10に記載の表示装置。
- 前記土手は、前記基板の辺に沿って形成されていることを特徴とする請求項10から12の何れかに記載の表示装置。
- 前記土手は、前記基板の辺に沿って前記基板の辺の近傍の位置に形成されていることを特徴とする請求項13に記載の表示装置。
- 前記帯状結晶は平坦な場所に形成されていることを特徴とする請求項10から14の何れかに記載の表示装置。
- 前記土手は、高さが20nm以上であることを特徴とする請求項10から15の何れかに記載の表示装置。
- 前記土手は、テーパ角が10度以上であることを特徴とする請求項10から16の何れかに記載の表示装置。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005334164A JP2007142167A (ja) | 2005-11-18 | 2005-11-18 | 表示装置およびその製造方法 |
US11/593,552 US20070117292A1 (en) | 2005-11-18 | 2006-11-07 | Display device and fabrication method thereof |
Applications Claiming Priority (1)
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JP2005334164A JP2007142167A (ja) | 2005-11-18 | 2005-11-18 | 表示装置およびその製造方法 |
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JP2005334164A Pending JP2007142167A (ja) | 2005-11-18 | 2005-11-18 | 表示装置およびその製造方法 |
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JP (1) | JP2007142167A (ja) |
Families Citing this family (1)
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WO2017072921A1 (ja) * | 2015-10-29 | 2017-05-04 | 堺ディスプレイプロダクト株式会社 | 薄膜トランジスタ基板の製造方法 |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5856317A (ja) * | 1981-09-30 | 1983-04-04 | Toshiba Corp | 半導体薄膜の製造方法 |
JPS58114440A (ja) * | 1981-12-28 | 1983-07-07 | Fujitsu Ltd | 半導体装置用基板の製造方法 |
JPH11149094A (ja) * | 1997-11-18 | 1999-06-02 | Matsushita Electric Ind Co Ltd | アクティブマトリクス基板の製造方法 |
JP2003282437A (ja) * | 2002-03-26 | 2003-10-03 | Semiconductor Energy Lab Co Ltd | 半導体装置の作製方法 |
JP2003332257A (ja) * | 2002-05-17 | 2003-11-21 | Fujitsu Ltd | 半導体結晶化方法及び装置 |
JP2005217209A (ja) * | 2004-01-30 | 2005-08-11 | Hitachi Ltd | レーザアニール方法およびレーザアニール装置 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
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US6737672B2 (en) * | 2000-08-25 | 2004-05-18 | Fujitsu Limited | Semiconductor device, manufacturing method thereof, and semiconductor manufacturing apparatus |
JP4744700B2 (ja) * | 2001-01-29 | 2011-08-10 | 株式会社日立製作所 | 薄膜半導体装置及び薄膜半導体装置を含む画像表示装置 |
JP3903761B2 (ja) * | 2001-10-10 | 2007-04-11 | 株式会社日立製作所 | レ−ザアニ−ル方法およびレ−ザアニ−ル装置 |
EP1326273B1 (en) * | 2001-12-28 | 2012-01-18 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
TWI272666B (en) * | 2002-01-28 | 2007-02-01 | Semiconductor Energy Lab | Semiconductor device and method of manufacturing the same |
JP4326477B2 (ja) * | 2003-05-14 | 2009-09-09 | シャープ株式会社 | 半導体薄膜の結晶化方法 |
-
2005
- 2005-11-18 JP JP2005334164A patent/JP2007142167A/ja active Pending
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2006
- 2006-11-07 US US11/593,552 patent/US20070117292A1/en not_active Abandoned
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5856317A (ja) * | 1981-09-30 | 1983-04-04 | Toshiba Corp | 半導体薄膜の製造方法 |
JPS58114440A (ja) * | 1981-12-28 | 1983-07-07 | Fujitsu Ltd | 半導体装置用基板の製造方法 |
JPH11149094A (ja) * | 1997-11-18 | 1999-06-02 | Matsushita Electric Ind Co Ltd | アクティブマトリクス基板の製造方法 |
JP2003282437A (ja) * | 2002-03-26 | 2003-10-03 | Semiconductor Energy Lab Co Ltd | 半導体装置の作製方法 |
JP2003332257A (ja) * | 2002-05-17 | 2003-11-21 | Fujitsu Ltd | 半導体結晶化方法及び装置 |
JP2005217209A (ja) * | 2004-01-30 | 2005-08-11 | Hitachi Ltd | レーザアニール方法およびレーザアニール装置 |
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