JP2007115955A5 - - Google Patents

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Publication number
JP2007115955A5
JP2007115955A5 JP2005306930A JP2005306930A JP2007115955A5 JP 2007115955 A5 JP2007115955 A5 JP 2007115955A5 JP 2005306930 A JP2005306930 A JP 2005306930A JP 2005306930 A JP2005306930 A JP 2005306930A JP 2007115955 A5 JP2007115955 A5 JP 2007115955A5
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JP
Japan
Prior art keywords
layer
connection
bump
forming
counted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2005306930A
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English (en)
Japanese (ja)
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JP2007115955A (ja
JP4892924B2 (ja
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Application filed filed Critical
Priority to JP2005306930A priority Critical patent/JP4892924B2/ja
Priority claimed from JP2005306930A external-priority patent/JP4892924B2/ja
Publication of JP2007115955A publication Critical patent/JP2007115955A/ja
Publication of JP2007115955A5 publication Critical patent/JP2007115955A5/ja
Application granted granted Critical
Publication of JP4892924B2 publication Critical patent/JP4892924B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2005306930A 2005-10-21 2005-10-21 多層プリント配線基板及びその製造方法 Expired - Fee Related JP4892924B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005306930A JP4892924B2 (ja) 2005-10-21 2005-10-21 多層プリント配線基板及びその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005306930A JP4892924B2 (ja) 2005-10-21 2005-10-21 多層プリント配線基板及びその製造方法

Publications (3)

Publication Number Publication Date
JP2007115955A JP2007115955A (ja) 2007-05-10
JP2007115955A5 true JP2007115955A5 (zh) 2008-11-27
JP4892924B2 JP4892924B2 (ja) 2012-03-07

Family

ID=38097868

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005306930A Expired - Fee Related JP4892924B2 (ja) 2005-10-21 2005-10-21 多層プリント配線基板及びその製造方法

Country Status (1)

Country Link
JP (1) JP4892924B2 (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4825286B2 (ja) * 2009-08-07 2011-11-30 ナミックス株式会社 多層配線板の製造方法
US20240178124A1 (en) * 2022-11-30 2024-05-30 Compass Technology Company Limited Embedded Die Package

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0719939B2 (ja) * 1988-09-19 1995-03-06 三井東圧化学株式会社 フレキシブル両面金属箔積層板
JPH02109390A (ja) * 1988-10-18 1990-04-23 Furukawa Electric Co Ltd:The 高密度フレキシブルプリント回路基板
JP2787228B2 (ja) * 1989-07-26 1998-08-13 日本メクトロン株式会社 可撓性回路基板の製造法
JP3961092B2 (ja) * 1997-06-03 2007-08-15 株式会社東芝 複合配線基板、フレキシブル基板、半導体装置、および複合配線基板の製造方法
JP3892209B2 (ja) * 2000-06-22 2007-03-14 大日本印刷株式会社 プリント配線板およびその製造方法
JP2003017856A (ja) * 2001-06-29 2003-01-17 Kyocera Chemical Corp 多層プリント配線板及びその製造方法

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