JP2007103569A - 薄膜トランジスタ、薄膜トランジスタアレイ基板、液晶表示装置およびそれらの製造方法 - Google Patents
薄膜トランジスタ、薄膜トランジスタアレイ基板、液晶表示装置およびそれらの製造方法 Download PDFInfo
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- 239000000758 substrate Substances 0.000 title claims abstract description 56
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 32
- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 20
- 238000005530 etching Methods 0.000 claims abstract description 182
- 239000010408 film Substances 0.000 claims abstract description 137
- 238000002161 passivation Methods 0.000 claims abstract description 103
- 239000004065 semiconductor Substances 0.000 claims abstract description 14
- 239000010410 layer Substances 0.000 claims description 339
- 238000000034 method Methods 0.000 claims description 29
- 238000001312 dry etching Methods 0.000 claims description 20
- 229920002120 photoresistant polymer Polymers 0.000 claims description 20
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 12
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical group N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 12
- 239000000203 mixture Substances 0.000 claims description 11
- 239000011521 glass Substances 0.000 claims description 8
- 238000005268 plasma chemical vapour deposition Methods 0.000 claims description 5
- 239000000956 alloy Substances 0.000 claims description 4
- 229910045601 alloy Inorganic materials 0.000 claims description 4
- 239000002356 single layer Substances 0.000 claims description 4
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 claims description 3
- 229910052751 metal Inorganic materials 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims description 3
- 230000015572 biosynthetic process Effects 0.000 claims description 2
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- 230000008021 deposition Effects 0.000 claims description 2
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- 238000001039 wet etching Methods 0.000 description 9
- 238000000206 photolithography Methods 0.000 description 8
- QTBSBXVTEAMEQO-UHFFFAOYSA-N acetic acid Substances CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 description 7
- 229910021417 amorphous silicon Inorganic materials 0.000 description 7
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 4
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 3
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- 230000007423 decrease Effects 0.000 description 3
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- 238000009751 slip forming Methods 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- 238000005033 Fourier transform infrared spectroscopy Methods 0.000 description 2
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- LKJPSUCKSLORMF-UHFFFAOYSA-N Monolinuron Chemical compound CON(C)C(=O)NC1=CC=C(Cl)C=C1 LKJPSUCKSLORMF-UHFFFAOYSA-N 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76804—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics by forming tapered via holes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
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- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Optics & Photonics (AREA)
- Thin Film Transistor (AREA)
- Liquid Crystal (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
【解決手段】 絶縁基板1上にゲート層2、ゲート絶縁膜3、半導体層4、ドレイン層5、パッシベーション層60を設け、かつ前記パッシベーション層60上に配置された導電層7がコンタクトホールを介して前記ゲート層2若しくは前記ドレイン層5と接続される薄膜トランジスタにおいて、前記パッシベーション層60が、表面側を高速エッチングレート層62、基板側を低速エッチングレート層61の2層以上で形成され、かつ前記高速エッチングレート層62の膜厚を前記導電層7の膜厚以下とする。
【選択図】 図1
Description
本実施形態の液晶表示装置においては、上述した薄膜トランジスタアレイ基板を搭載したことを特徴とする、
本実施形態の薄膜トランジスタによれば、パッシベーション膜を高速エッチングレート層62と低速エッチングレート層61の2層以上の構成にすることにより、高速エッチングレート層62のサイドエッチングにより低速エッチングレート層は順テーパ形状となる。本実施形態では、単位装置あたりの生産能力向上を目的としてエッチングレートを高速化するドライエッチング条件を適用することが可能となる。この場合、フォトレジスト8のエッチングレートに対しパッシベーション層60及びゲート絶縁膜3のエッチングレートが大きくなった場合でも、高速エッチングレート層62のサイドエッチングにより低速エッチングレート層61は順テーパ形状とできる。
2 ゲート層
3 ゲート絶縁膜
4 半導体層
5 ドレイン層
6,60 パッシベーション層
7 画素電極層
7a 画素電極部
8 フォトレジスト
8a 後退したフォトレジスト
9 コンタクトホール部
10 薄膜トランジスタアレイ基板
11 ゲート端子部
12 TFT
13 ドレイン端子部
21 下層膜
22 上層膜
61 低速エッチングレート層
62 高速エッチングレート層
Claims (20)
- 絶縁基板上にゲート層、ゲート絶縁膜、半導体層、ドレイン層およびパッシベーション層を設け、かつ前記パッシベーション層の上に配置された導電層がコンタクトホールを介して前記ゲート層若しくは前記ドレイン層と接続される薄膜トランジスタにおいて、
前記パッシベーション層が、表面側を高速エッチングレート層、基板側を低速エッチングレート層の2層以上で形成されると共に、前記高速エッチングレート層の膜厚を前記導電層の膜厚以下とすることを特徴とする薄膜トランジスタ。 - パッシベーション層を窒化シリコン(SiN)とする請求項1記載の薄膜トランジスタ。
- パッシベーション層SiNにおける、高速エッチングレート層のエッチングレートを、低速エッチングレート層のエッチングレートの1.1倍以上とする請求項2記載の薄膜トランジスタ。
- パッシベーション層SiNにおける、高速エッチングレート層のN−H/Si−H比を、低速エッチングレート層のN−H/Si−H比の2.3倍以上とする請求項2記載の薄膜トランジスタ。
- パッシベーション層SiNにおける、最高速エッチングレート層のN/Si組成比を、低速エッチングレート層のN/Si組成比の1.7倍以上とする請求項2記載の薄膜トランジスタ。
- 絶縁基板をガラスなどの透明絶縁部材とし、ゲート絶縁膜をSiNとし、導電膜を酸化インジウム−錫(ITO)とし、ゲート層、ドレイン層を金属または合金の単層または積層とする請求項1記載の薄膜トランジスタ。
- 請求項1乃至6のうちの1項に記載の薄膜トランジスタを有することを特徴とする薄膜トランジスタアレイ基板。
- 請求項7に記載の薄膜トランジスタアレイ基板を搭載したことを特徴とする液晶表示装置。
- 絶縁基板上にゲート層、ゲート絶縁膜、半導体層、ドレイン層およびパッシベーション層を形成し、前記パッシベーション層の上に配置された導電層がコンタクトホールを介して前記ゲート層若しくは前記ドレイン層と接続される薄膜トランジスタの製造方法において、
前記パッシベーション層を、表面側を高速エッチングレート層、基板側を低速エッチングレート層の2層以上で形成すると共に、前記高速エッチングレート層の膜厚を前記導電層の膜厚以下にすることを特徴とする薄膜トランジスタの製造方法。 - パッシベーション層をSiNとする請求項9に記載の薄膜トランジスタの製造方法。
- パッシベーション層SiNにおける、高速エッチングレート層のエッチングレートを、低速エッチングレート層のエッチングレートの1.1倍以上とする請求項10に記載の薄膜トランジスタの製造方法。
- パッシベーション層SiNにおける、高速エッチングレート層のN−H/Si−H比を、低速エッチングレート層のN−H/Si−H比の2.3倍以上とする請求項10に記載の薄膜トランジスタの製造方法。
- パッシベーション層SiNにおける、高速エッチングレート層のN/Si組成比を、低速エッチングレート層のN/Si組成比の1.7倍以上とする請求項10に記載の薄膜トランジスタの製造方法。
- 前記2層以上のパッシベーション層を、同一成膜室にて形成する請求項10ないし請求項13のうちの1項に記載の薄膜トランジスタの製造方法。
- 前記2層以上のパッシベーション層を、複数の成膜室にて形成する請求項10ないし請求項13のうちの1項に記載の薄膜トランジスタの製造方法。
- 前記2層以上のパッシベーション層を、ドライエッチングにてエッチングする請求項10ないし請求項15のうちの1項に記載の薄膜トランジスタの製造方法。
- SiNのエッチングレートをフォトレジストのエッチングレートの1.1倍以上とする請求項10ないし請求項16のうちの1項に記載の薄膜トランジスタの製造方法。
- パッシベーション層のエッチングレートの制御を、プラズマCVDにおいて、導入ガス流量を調整して行う請求項10乃至17のうちの1項に記載の薄膜トランジスタの製造方法。
- 請求項9乃至18のうちの1項に記載の薄膜トランジスタの製造方法により薄膜トランジスタを形成することを特徴とする薄膜トランジスタアレイ基板の製造方法。
- 請求項19に記載の薄膜トランジスタアレイ基板の製造方法により薄膜トランジスタアレイ基板を形成することを特徴とする液晶表示装置の製造方法。
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JP2005289890A JP5234301B2 (ja) | 2005-10-03 | 2005-10-03 | 薄膜トランジスタ、薄膜トランジスタアレイ基板、液晶表示装置およびそれらの製造方法 |
US11/540,959 US7683375B2 (en) | 2005-10-03 | 2006-10-02 | Thin-film transistor with controllable etching profile |
KR1020060097263A KR100797916B1 (ko) | 2005-10-03 | 2006-10-02 | 박막 트랜지스터, τfτ-어레이 기판, 액정 디스플레이장치 및 그의 제조방법 |
TW095136535A TWI336135B (en) | 2005-10-03 | 2006-10-02 | Thin-film transistor, tft-array substrate, liquid-crystal display device and method of fabricating the same |
CNB2006101420871A CN100527443C (zh) | 2005-10-03 | 2006-10-08 | 薄膜晶体管、tft阵列基板、液晶显示器及其制造方法 |
US12/216,959 US7871846B2 (en) | 2005-10-03 | 2008-07-14 | Thin-film transistor, TFT-array substrate, liquid-crystal display device and method of fabricating the same |
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TW (1) | TWI336135B (ja) |
Cited By (7)
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EP1981005A2 (en) | 2007-04-11 | 2008-10-15 | Sony Corporation | Information processing method, electronic money terminal device, and electronic money reporting device |
JP2009071058A (ja) * | 2007-09-13 | 2009-04-02 | Oki Electric Ind Co Ltd | Mis型fet及びその製造方法 |
WO2009093602A1 (ja) * | 2008-01-21 | 2009-07-30 | Nec Lcd Technologies, Ltd. | 表示装置 |
JP2010199556A (ja) * | 2009-01-27 | 2010-09-09 | Casio Computer Co Ltd | 多層膜の形成方法及び表示パネルの製造方法 |
WO2011158704A1 (en) * | 2010-06-18 | 2011-12-22 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
JP2012038965A (ja) * | 2010-08-09 | 2012-02-23 | Lapis Semiconductor Co Ltd | 半導体装置及びその製造方法 |
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JP2012038965A (ja) * | 2010-08-09 | 2012-02-23 | Lapis Semiconductor Co Ltd | 半導体装置及びその製造方法 |
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Also Published As
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US20080280385A1 (en) | 2008-11-13 |
KR20070037692A (ko) | 2007-04-06 |
KR100797916B1 (ko) | 2008-01-24 |
US7871846B2 (en) | 2011-01-18 |
TWI336135B (en) | 2011-01-11 |
JP5234301B2 (ja) | 2013-07-10 |
TW200721503A (en) | 2007-06-01 |
CN1945855A (zh) | 2007-04-11 |
US7683375B2 (en) | 2010-03-23 |
US20070087486A1 (en) | 2007-04-19 |
CN100527443C (zh) | 2009-08-12 |
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