JP2006313763A - Resistor - Google Patents

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JP2006313763A
JP2006313763A JP2005134738A JP2005134738A JP2006313763A JP 2006313763 A JP2006313763 A JP 2006313763A JP 2005134738 A JP2005134738 A JP 2005134738A JP 2005134738 A JP2005134738 A JP 2005134738A JP 2006313763 A JP2006313763 A JP 2006313763A
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resistor
ceramic substrate
copper
alloy foil
nickel
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JP4792806B2 (en
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Yoshinori Shinohara
義典 篠原
Masahiko Nakamura
雅彦 中村
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Mitsubishi Materials Corp
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Mitsubishi Materials Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To obtain an excellent temperature-resistance value characteristic having a low thermal resistance between a ceramic substrate and a resistor body in a resistor. <P>SOLUTION: The resistor is provided with the ceramic substrate 1, the resistor body 2 made of a copper-nickel alloy foil bonded on the ceramic substrate 1 by direct thermal diffusion, and a pair of terminal electrodes 3 connected to the resistor body 2 provided on the ceramic substrate 1. With this configuration, since the copper-nickel alloy foil is directly bonded without a brazing material or an adhesive, the temperature coefficient of a resistance value is lowered and the excellent temperature-resistance value characteristic can be obtained. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、例えばモータやスイッチング・レギュレータの制御回路等に電流検出用として用いられる低抵抗の抵抗器に関する。   The present invention relates to a low-resistance resistor used for current detection in, for example, a control circuit of a motor or a switching regulator.

従来、モータ制御やスイッチング・レギュレータ制御等に用いる回路に電流検出用として用いるシャント抵抗があるが、近年、このような抵抗器として、特に小型化された電子機器に対応して表面実装可能な低抵抗のチップ型抵抗器が用いられている。例えば、特許文献1では、高伝熱性セラミックス基板の表面に銅−マンガン合金(マンガニン)のシート状抵抗体を銀ろう等のろう材で貼り付けたチップ型シャント抵抗素子が提案されている。また、特許文献2では、基板の表面にシリカを主成分とする無機接着剤を介して抵抗箔を設けた抵抗器が提案されている。   Conventionally, there are shunt resistors used for current detection in circuits used for motor control, switching regulator control, and the like. However, in recent years, such resistors are particularly low in surface mountable for downsized electronic devices. Resistive chip resistors are used. For example, Patent Document 1 proposes a chip-type shunt resistor element in which a copper-manganese alloy (manganin) sheet-like resistor is bonded to the surface of a highly heat-conductive ceramic substrate with a brazing material such as silver brazing. Patent Document 2 proposes a resistor in which a resistance foil is provided on the surface of a substrate via an inorganic adhesive mainly composed of silica.

特開平11−97203号公報(段落番号0011、図1)Japanese Patent Laid-Open No. 11-97203 (paragraph number 0011, FIG. 1) 特開平9−320802号公報(特許請求の範囲、図1)JP-A-9-320802 (Claims, FIG. 1)

上記従来の技術には、以下の課題が残されている。
すなわち、従来の特許文献1に記載の技術では、ろう材を用いて抵抗体を貼り付けているが、ろう材自体が導電性を有するために、抵抗器全体の抵抗値及び抵抗値の温度特性を制御することが難しいという不都合があった。また、従来の特許文献2に記載の技術では、接着剤を用いて抵抗箔を貼り付けているが、この場合、接着剤の介在により抵抗体(抵抗箔)の熱放散性が悪化し、抵抗体の許容電流や温度特性等が劣化してしまうという不都合があった。なお、スパッタやメッキを用いて抵抗体をセラミックス基板に直接形成する方法も考えられる。しかしながら、スパッタによる場合は、厚膜形成に時間がかかり製造コストが増大してしまうと共に、高い接合強度が得難い不都合がある。また、メッキによる場合は、二成分合金や三成分合金における組成制御が難しいという不都合があった。
The following problems remain in the conventional technology.
That is, in the conventional technique described in Patent Document 1, a resistor is attached using a brazing material. However, since the brazing material itself has conductivity, the resistance value of the entire resistor and the temperature characteristics of the resistance value. There was a disadvantage that it was difficult to control. Moreover, in the technique of the conventional patent document 2, although resistive foil is affixed using an adhesive agent, in this case, heat dissipation of a resistor (resistive foil) deteriorates by interposition of an adhesive agent, and resistance. There is a disadvantage that the allowable current and temperature characteristics of the body deteriorate. A method of directly forming the resistor on the ceramic substrate using sputtering or plating is also conceivable. However, when sputtering is used, it takes a long time to form a thick film, resulting in an increase in manufacturing cost and a disadvantage that it is difficult to obtain high bonding strength. Further, in the case of plating, there is an inconvenience that it is difficult to control the composition of a binary alloy or a ternary alloy.

本発明は、前述の課題に鑑みてなされたもので、セラミックス基板と抵抗体との熱抵抗が小さく、温度−抵抗値特性に優れた抵抗器を提供することを目的とする。   The present invention has been made in view of the above-described problems, and an object of the present invention is to provide a resistor having a small thermal resistance between a ceramic substrate and a resistor and having excellent temperature-resistance characteristics.

本発明は、前記課題を解決するために以下の構成を採用した。すなわち、本発明の抵抗器は、セラミックス基板と、前記セラミックス基板上に直接熱拡散で接合された銅−ニッケル合金箔の抵抗体と、前記セラミックス基板に設けられ前記抵抗体に接続された一対の端子電極と、を備えていることを特徴とする。   The present invention employs the following configuration in order to solve the above problems. That is, the resistor of the present invention includes a ceramic substrate, a copper-nickel alloy foil resistor bonded directly on the ceramic substrate by thermal diffusion, and a pair of resistors provided on the ceramic substrate and connected to the resistor. And a terminal electrode.

また、本発明の抵抗器は、セラミックス基板と、前記セラミックス基板上に直接接合された銅−ニッケル合金箔の抵抗体と、前記セラミックス基板に設けられ前記抵抗体に接続された一対の端子電極と、を備え、前記セラミックス基板の前記抵抗体との接合面近傍における粒界内に、銅が含まれていることを特徴とする。   The resistor of the present invention includes a ceramic substrate, a copper-nickel alloy foil resistor directly bonded on the ceramic substrate, and a pair of terminal electrodes provided on the ceramic substrate and connected to the resistor. The copper is contained in the grain boundary in the vicinity of the joint surface with the resistor of the ceramic substrate.

これらの抵抗器では、セラミックス基板上に銅−ニッケル合金箔の抵抗体がろう材や接着剤を介さずに直接接合されているので、抵抗値の温度係数が低下し、優れた温度−抵抗値特性を得ることができる。また、抵抗体とセラミックス基板との熱抵抗が小さくなり、抵抗体の負荷電流による温度上昇の小さい抵抗器を得ることができる。さらに、ろう材や接着剤が不要であるため、製造コストが安価になると共に、予め組成制御された合金箔を作製して、これを接合させるので、二成分合金や三成分合金でも高精度な組成成分を得ることができる。また、熱拡散によってセラミックス基板の抵抗体との接合面近傍における粒界内に、銅が含まれるので、銅によるアンカー効果が得られ、高い接合強度を得ることができる。なお、本発明における熱拡散による接合は、上記合金箔の融点に近い温度まで加熱した状態で上記合金箔とセラミックス基板とを密着させる接合手法である。   In these resistors, a resistor of copper-nickel alloy foil is directly bonded on the ceramic substrate without using a brazing material or an adhesive, so that the temperature coefficient of the resistance value is reduced and an excellent temperature-resistance value is obtained. Characteristics can be obtained. Further, the thermal resistance between the resistor and the ceramic substrate is reduced, and a resistor with a small temperature rise due to the load current of the resistor can be obtained. In addition, since no brazing material or adhesive is required, the manufacturing cost is low, and an alloy foil whose composition is controlled in advance is manufactured and bonded, so that even a binary alloy or a ternary alloy is highly accurate. A composition component can be obtained. Moreover, since copper is contained in the grain boundary in the vicinity of the joint surface with the resistor of the ceramic substrate by thermal diffusion, an anchor effect by copper can be obtained and high joint strength can be obtained. In addition, the joining by thermal diffusion in the present invention is a joining technique in which the alloy foil and the ceramic substrate are in close contact with each other while being heated to a temperature close to the melting point of the alloy foil.

さらに、本発明の抵抗器は、前記銅−ニッケル合金箔が、銅−ニッケル−マンガン合金箔であることを特徴とする。
また、本発明の抵抗器は、前記銅−ニッケル合金箔が、銅−ニッケル−マンガン合金箔であり、前記接合面近傍における粒内に、マンガンが含まれていることを特徴とする。
Furthermore, the resistor of the present invention is characterized in that the copper-nickel alloy foil is a copper-nickel-manganese alloy foil.
In the resistor of the present invention, the copper-nickel alloy foil is a copper-nickel-manganese alloy foil, and manganese is contained in grains in the vicinity of the joint surface.

これらの抵抗器では、銅−ニッケル−マンガン合金箔が直接熱拡散で接合されているので、接合面近傍におけるセラミックス基板の粒内にマンガンが侵入して拡散されており、より密着度が高くなり、熱伝導性をさらに向上させることができる。   In these resistors, the copper-nickel-manganese alloy foil is joined by direct thermal diffusion, so that manganese penetrates and diffuses into the grains of the ceramic substrate in the vicinity of the joint surface, resulting in higher adhesion. The thermal conductivity can be further improved.

また、本発明の抵抗器は、前記セラミックス基板上に、前記抵抗体を覆うと共に前記抵抗体と前記セラミックス基板との段差を埋めて表面を平坦面とする保護層が形成されていることを特徴とする。すなわち、抵抗体とセラミックス基板との段差があると、自動実装の際のハンドリングに支障が生じるおそれがあるが、この抵抗器では、セラミックス基板上に表面を平坦面とする保護層が形成されているので、自動実装時に正確で安定したハンドリングが可能になる。   The resistor of the present invention is characterized in that a protective layer is formed on the ceramic substrate so as to cover the resistor and fill a step between the resistor and the ceramic substrate so as to have a flat surface. And In other words, if there is a step between the resistor and the ceramic substrate, handling during automatic mounting may be hindered. However, in this resistor, a protective layer having a flat surface is formed on the ceramic substrate. Therefore, accurate and stable handling is possible during automatic mounting.

本発明によれば、以下の効果を奏する。
すなわち、本発明に係る抵抗器によれば、セラミックス基板上に銅−ニッケル合金箔の抵抗体が直接熱拡散で接合されているので、優れた温度−抵抗値特性を得ることができると共に、抵抗体の負荷電流による温度上昇の小さい抵抗器を高精度にかつ安価に得ることができる。また、セラミックス基板の抵抗体との接合面近傍における粒界内に、銅が含まれるので、アンカー効果で高い接合強度を得ることができる。したがって、モータ等の制御回路等の電流検出用に好適な低抵抗の抵抗器を得ることができる。
The present invention has the following effects.
That is, according to the resistor according to the present invention, since the resistor of the copper-nickel alloy foil is directly bonded by thermal diffusion on the ceramic substrate, it is possible to obtain excellent temperature-resistance characteristic and resistance. A resistor with a small temperature rise due to the load current of the body can be obtained with high accuracy and at low cost. Moreover, since copper is contained in the grain boundary in the vicinity of the joint surface with the resistor of the ceramic substrate, high joint strength can be obtained by the anchor effect. Therefore, a low resistance resistor suitable for current detection of a control circuit such as a motor can be obtained.

以下、本発明に係る抵抗器の一実施形態を、図1から図7を参照しながら説明する。   Hereinafter, an embodiment of a resistor according to the present invention will be described with reference to FIGS.

本実施形態の抵抗器は、図1に示すように、セラミックス基板1と、セラミックス基板1の表裏面上に直接熱拡散で接合された銅(Cu)−ニッケル(Ni)合金箔の抵抗体2と、セラミックス基板1の両端部に設けられ抵抗体2に接続された一対の端子電極3と、セラミックス基板1の表裏面上に抵抗体2を覆って形成された保護層4と、を備えている。   As shown in FIG. 1, the resistor of the present embodiment includes a ceramic substrate 1 and a copper (Cu) -nickel (Ni) alloy foil resistor 2 bonded directly on the front and back surfaces of the ceramic substrate 1 by thermal diffusion. And a pair of terminal electrodes 3 provided at both ends of the ceramic substrate 1 and connected to the resistor 2, and a protective layer 4 formed on the front and back surfaces of the ceramic substrate 1 so as to cover the resistor 2. Yes.

上記セラミックス基板1は、例えばアルミナ(Al)セラミックスで形成されている。なお、本実施形態では、厚さ0.2mmのセラミックス基板1を用いている。
上記銅−ニッケル合金箔は、マンガン(Mn)を含む銅−ニッケル−マンガン合金箔であって、例えば10〜13重量%のマンガン、1〜4重量%のニッケル、及び残りが銅の合金箔を採用している。なお、本実施形態では、厚さ50μmの銅−ニッケル−マンガン合金箔を用いている。
The ceramic substrate 1 is made of alumina (Al 2 O 3 ) ceramics, for example. In the present embodiment, the ceramic substrate 1 having a thickness of 0.2 mm is used.
The copper-nickel alloy foil is a copper-nickel-manganese alloy foil containing manganese (Mn), for example, 10-13 wt% manganese, 1-4 wt% nickel, and the remainder copper alloy foil Adopted. In this embodiment, a copper-nickel-manganese alloy foil having a thickness of 50 μm is used.

上記保護層4は、樹脂又はガラス等で形成され、抵抗体2とセラミックス基板1との段差を埋めて表面を平坦面とするように成形されている。なお、本実施形態では、ガラス材料で保護層4が形成されている。
上記端子電極3は、保護層4がガラス材料であるので、これに対応して銅粉末を用いたサーメット系電極材料で形成されている。
The protective layer 4 is made of resin, glass, or the like, and is molded so as to fill the step between the resistor 2 and the ceramic substrate 1 and make the surface flat. In the present embodiment, the protective layer 4 is formed of a glass material.
Since the protective layer 4 is made of a glass material, the terminal electrode 3 is made of a cermet-based electrode material using copper powder correspondingly.

この抵抗器では、図2に示すように、セラミックス基板1の抵抗体2との接合面J近傍における粒界内に、銅(Cu)が拡散して含まれていると共に、接合面J近傍におけるアルミナ(Al)粒内に、マンガン(Mn)が拡散して含まれている。 In this resistor, as shown in FIG. 2, copper (Cu) is diffused and contained in the grain boundary in the vicinity of the joint surface J of the ceramic substrate 1 with the resistor 2, and in the vicinity of the joint surface J. Manganese (Mn) is diffused and contained in alumina (Al 2 O 3 ) grains.

次に、本実施形態の抵抗器の製造方法について、図1、図3から図7を参照して説明する。   Next, a method for manufacturing the resistor of this embodiment will be described with reference to FIGS. 1 and 3 to 7.

まず、セラミックス基板1の表裏両面に銅−ニッケル−マンガン合金箔を配し、カーボン板で挟んだ状態で加熱し、熱拡散による接合を行うことにより、図3に示すように、セラミックス基板1上に板状の抵抗体2を形成する。この熱拡散による接合は、上記銅−ニッケル−マンガン合金箔の融点に近い温度まで加熱した状態で合金箔とセラミックス基板1とを密着させる接合方法である。なお、本実施形態では、酸素濃度50ppm以下、温度960℃〜980℃の雰囲気中で5分間〜70分間加熱することで熱拡散を行う。次に、図4に示すように、板状の抵抗体2を、エッチング等により所望の形状や抵抗値が得られる短冊状に整形する。さらに、単品の抵抗器となる各部分で、レーザトリミング等を施して所望の抵抗値となるように抵抗体2を整形する。   First, copper-nickel-manganese alloy foils are arranged on both front and back surfaces of the ceramic substrate 1, heated in a state of being sandwiched between carbon plates, and bonded by thermal diffusion, as shown in FIG. The plate-like resistor 2 is formed on the substrate. This bonding by thermal diffusion is a bonding method in which the alloy foil and the ceramic substrate 1 are in close contact with each other while being heated to a temperature close to the melting point of the copper-nickel-manganese alloy foil. In this embodiment, thermal diffusion is performed by heating in an atmosphere having an oxygen concentration of 50 ppm or less and a temperature of 960 ° C. to 980 ° C. for 5 minutes to 70 minutes. Next, as shown in FIG. 4, the plate-like resistor 2 is shaped into a strip shape in which a desired shape and resistance value can be obtained by etching or the like. Further, the resistor 2 is shaped so as to obtain a desired resistance value by performing laser trimming or the like at each part to be a single resistor.

次に、図5に示すように、抵抗体2を覆うように樹脂又はガラス等をコーティングして保護層4を形成する。この際、抵抗体2とセラミックス基板1の表裏面との段差を埋めて表面を平坦面とするように、保護層4を成形する。そして、図6に示すように、短冊状の抵抗体2に対して長尺方向に直交する方向に、セラミックス基板1及び抵抗体2をダイシングラインDに沿ってダイシングして短冊状の一次分割体とする。なお、ダイシングの代わりにレーザスクライバを用いて分割しても構わない。   Next, as shown in FIG. 5, a protective layer 4 is formed by coating resin or glass so as to cover the resistor 2. At this time, the protective layer 4 is formed so as to fill the step between the resistor 2 and the front and back surfaces of the ceramic substrate 1 and to make the surface flat. Then, as shown in FIG. 6, the strip-shaped primary divided body is obtained by dicing the ceramic substrate 1 and the resistor 2 along the dicing line D in a direction orthogonal to the longitudinal direction with respect to the strip-shaped resistor 2. And In addition, you may divide | segment using a laser scriber instead of dicing.

次に、ダイシングされた一次分割体の切断面(セラミックス基板1、抵抗部2及び保護層4の切断面)に、スパッタ等により銅粉末を用いたサーメット系電極材料で端子電極3を形成する。さらに、この端子電極3を形成した面と直交する方向に、一次分割体をダイシングして、図1に示すように、チップ状の抵抗器が作製される。このとき、ダイシングの他にレーザスクライバを用いて分割しても構わない。なお、端子電極3上に、図7に示すように、銅めっき、ニッケルめっき又は錫めっき等を施してめっき膜5を形成しても構わない。この場合、めっき膜5によって、より表面実装を容易かつ確実に行うことが可能になる。   Next, the terminal electrode 3 is formed with a cermet-based electrode material using copper powder by sputtering or the like on the cut surface of the diced primary divided body (the cut surface of the ceramic substrate 1, the resistance portion 2, and the protective layer 4). Further, the primary divided body is diced in a direction orthogonal to the surface on which the terminal electrode 3 is formed, and a chip-shaped resistor is produced as shown in FIG. At this time, it may be divided by using a laser scriber in addition to dicing. Note that the plating film 5 may be formed on the terminal electrode 3 by performing copper plating, nickel plating, tin plating, or the like, as shown in FIG. In this case, the surface mount can be performed more easily and reliably by the plating film 5.

本実施形態では、セラミックス基板1上に銅−ニッケル−マンガン合金箔の抵抗体2がろう材や接着剤を介さずに直接接合されているので、抵抗値の温度係数が200ppm/℃以下に低下し、優れた温度−抵抗値特性を得ることができる。また、抵抗体2とセラミックス基板1との熱抵抗が小さくなり、抵抗体2の負荷電流による温度上昇の小さい抵抗器を得ることができる。   In this embodiment, since the resistor 2 of the copper-nickel-manganese alloy foil is directly joined on the ceramic substrate 1 without using a brazing material or an adhesive, the temperature coefficient of the resistance value is reduced to 200 ppm / ° C. or less. In addition, excellent temperature-resistance value characteristics can be obtained. Further, the thermal resistance between the resistor 2 and the ceramic substrate 1 is reduced, and a resistor with a small temperature rise due to the load current of the resistor 2 can be obtained.

さらに、ろう材や接着剤が不要であるため、製造コストが安価になると共に、予め組成制御された合金箔を作製して、これを接合させるので、三成分合金でも高精度な組成成分を得ることができる。また、セラミックス基板1の抵抗体2との接合面J近傍における粒界内に銅(Cu)が拡散して含まれるので、銅(Cu)によるアンカー効果が得られ、高い接合強度を得ることができる。また、接合面J近傍におけるセラミックス基板1の粒内にマンガン(Mn)が侵入して拡散されているため、より密着度が高くなり、熱伝導性をさらに向上させることができる。   Furthermore, since a brazing material and an adhesive are not required, the manufacturing cost is reduced, and an alloy foil whose composition is controlled in advance is produced and bonded, so that a highly accurate composition component can be obtained even with a ternary alloy. be able to. Moreover, since copper (Cu) is diffused and contained in the grain boundary in the vicinity of the joint surface J with the resistor 2 of the ceramic substrate 1, an anchor effect by copper (Cu) can be obtained and high joint strength can be obtained. it can. In addition, since manganese (Mn) penetrates and diffuses into the grains of the ceramic substrate 1 in the vicinity of the bonding surface J, the degree of adhesion becomes higher and the thermal conductivity can be further improved.

さらに、抵抗体2とセラミックス基板1との段差があると、自動実装の際のハンドリングに支障が生じるおそれがあるが、この抵抗器では、セラミックス基板1上に表面を平坦面とする保護層4が形成されているので、自動実装時に正確で安定したハンドリングが可能になる。   Further, if there is a step between the resistor 2 and the ceramic substrate 1, there is a possibility that handling during automatic mounting may be hindered. However, in this resistor, the protective layer 4 having a flat surface on the ceramic substrate 1. Therefore, accurate and stable handling is possible during automatic mounting.

上記実施形態と同様の製造方法で抵抗器を実際に作製し、ESCA(XPS)分析(X線光電子分光分析)を行ってセラミックス基板1の接合面J近傍における深さ方向の金属元素(アルミニウム(Al)、マンガン)の含有状態を調べた。このESCA分析の結果を、図8のグラフに示す。なお、図8において、横軸はスパッタリング時間を示し、縦軸は各元素の含有量を示している。なお、このグラフでは、スパッタリング時間が長い程、接合面Jから深いことを示している。
この分析結果から、マンガンが接合面Jからセラミックス基板1内に拡散して存在していることがわかる。
A resistor is actually manufactured by the same manufacturing method as that in the above embodiment, and ESCA (XPS) analysis (X-ray photoelectron spectroscopy) is performed to detect a metal element (aluminum (aluminum The contents of Al) and manganese) were examined. The result of this ESCA analysis is shown in the graph of FIG. In FIG. 8, the horizontal axis represents the sputtering time, and the vertical axis represents the content of each element. This graph shows that the longer the sputtering time, the deeper the bonding surface J.
From this analysis result, it can be seen that manganese is diffused from the bonding surface J into the ceramic substrate 1.

また、この接合面J近傍の断面TEM(透過電子顕微鏡)観察及びEDS分析(エネルギー分散形X線分析)等を行った結果、セラミックス基板1と抵抗体2との界面(すなわち接合面J)から100〜200nm程度までのセラミックス基板1内に、マンガンが拡散していることがわかった。そして、電子線回折によりマンガンが拡散している領域の構造を調べた結果、セラミックス基板1のアルミナと反応して異なる相を形成しておらず、単にアルミナの粒内へマンガンが拡散していることがわかった。また、アルミナの粒界には、銅が検出された。
このように、本実施例では、セラミックス基板1と抵抗体2との接合面J近傍において、アルミナの粒内にマンガンが拡散していると共に、アルミナの粒界に銅が侵入している。
Further, as a result of cross-sectional TEM (transmission electron microscope) observation, EDS analysis (energy dispersive X-ray analysis), etc. in the vicinity of the bonding surface J, from the interface between the ceramic substrate 1 and the resistor 2 (that is, the bonding surface J). It was found that manganese was diffused in the ceramic substrate 1 of about 100 to 200 nm. And as a result of investigating the structure of the region where manganese is diffused by electron beam diffraction, it does not react with alumina of the ceramic substrate 1 to form a different phase, and manganese simply diffuses into the alumina grains. I understood it. Copper was detected at the grain boundaries of alumina.
As described above, in this embodiment, manganese is diffused in the alumina grains and copper penetrates into the alumina grain boundaries in the vicinity of the joint surface J between the ceramic substrate 1 and the resistor 2.

なお、本発明の技術範囲は上記実施形態に限定されるものではなく、本発明の趣旨を逸脱しない範囲において種々の変更を加えることが可能である。
例えば、抵抗体2として、銅−ニッケル−マンガン合金箔を用いたが、銅−ニッケル合金箔を用いても構わない。この場合、アルミナ粒界に侵入した銅によるアンカー効果等を得ることができる。
The technical scope of the present invention is not limited to the above embodiment, and various modifications can be made without departing from the spirit of the present invention.
For example, although the copper-nickel-manganese alloy foil is used as the resistor 2, a copper-nickel alloy foil may be used. In this case, the anchor effect etc. by the copper which penetrate | invaded the alumina grain boundary can be acquired.

本発明に係る一実施形態の抵抗器を示す断面図である。It is sectional drawing which shows the resistor of one Embodiment which concerns on this invention. 本実施形態の抵抗器において、セラミックス基板と抵抗体との接合面近傍における金属元素の拡散状態を説明するための断面模式図である。In the resistor of this embodiment, it is a cross-sectional schematic diagram for demonstrating the diffusion state of the metallic element in the joint surface vicinity of a ceramic substrate and a resistor. 本実施形態の抵抗器の製造方法において、抵抗体の接合工程を示す断面図である。It is sectional drawing which shows the joining process of a resistor in the manufacturing method of the resistor of this embodiment. 本実施形態の抵抗器の製造方法において、抵抗体のエッチング工程を示す斜視図である。It is a perspective view which shows the etching process of a resistor in the manufacturing method of the resistor of this embodiment. 本実施形態の抵抗器の製造方法において、保護層の形成工程を示す断面図である。It is sectional drawing which shows the formation process of a protective layer in the manufacturing method of the resistor of this embodiment. 本実施形態の抵抗器の製造方法において、ダイシング工程を示す平面図である。In the manufacturing method of the resistor of this embodiment, it is a top view which shows a dicing process. 本実施形態の抵抗器の製造方法において、めっき膜の形成工程を示す断面図である。It is sectional drawing which shows the formation process of a plating film in the manufacturing method of the resistor of this embodiment. 本発明に係る実施例において、ESCA分析の結果を示すグラフである。In the Example which concerns on this invention, it is a graph which shows the result of an ESCA analysis.

符号の説明Explanation of symbols

1…セラミックス基板、2…抵抗体、3…端子電極、4…保護層、5…めっき膜   DESCRIPTION OF SYMBOLS 1 ... Ceramic substrate, 2 ... Resistor, 3 ... Terminal electrode, 4 ... Protective layer, 5 ... Plating film

Claims (5)

セラミックス基板と、
前記セラミックス基板上に直接熱拡散で接合された銅−ニッケル合金箔の抵抗体と、
前記セラミックス基板に設けられ前記抵抗体に接続された一対の端子電極と、を備えていることを特徴とする抵抗器。
A ceramic substrate;
A resistor of copper-nickel alloy foil directly bonded by thermal diffusion on the ceramic substrate;
And a pair of terminal electrodes provided on the ceramic substrate and connected to the resistor.
請求項1に記載の抵抗器において、
前記銅−ニッケル合金箔が、銅−ニッケル−マンガン合金箔であることを特徴とする抵抗器。
The resistor of claim 1, wherein
The resistor characterized in that the copper-nickel alloy foil is a copper-nickel-manganese alloy foil.
セラミックス基板と、
前記セラミックス基板上に直接接合された銅−ニッケル合金箔の抵抗体と、
前記セラミックス基板に設けられ前記抵抗体に接続された一対の端子電極と、を備え、
前記セラミックス基板の前記抵抗体との接合面近傍における粒界内に、銅が含まれていることを特徴とする抵抗器。
A ceramic substrate;
A resistor of copper-nickel alloy foil directly bonded on the ceramic substrate;
A pair of terminal electrodes provided on the ceramic substrate and connected to the resistor,
A resistor containing copper in a grain boundary in the vicinity of a joint surface of the ceramic substrate with the resistor.
請求項3に記載の抵抗器において、
前記銅−ニッケル合金箔が、銅−ニッケル−マンガン合金箔であり、
前記接合面近傍における粒内に、マンガンが含まれていることを特徴とする抵抗器。
The resistor of claim 3,
The copper-nickel alloy foil is a copper-nickel-manganese alloy foil,
Manganese is contained in the grains in the vicinity of the joint surface.
請求項3又は4に記載の抵抗器において、
前記セラミックス基板上に、前記抵抗体を覆うと共に前記抵抗体と前記セラミックス基板との段差を埋めて表面を平坦面とする保護層が形成されていることを特徴とする抵抗器。
The resistor according to claim 3 or 4,
A resistor comprising a protective layer which covers the resistor and fills a step between the resistor and the ceramic substrate and has a flat surface on the ceramic substrate.
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JP2009016793A (en) * 2007-06-29 2009-01-22 Feel Cherng Enterprise Co Ltd Apertured chip resistor and method for fabricating the same
JP2010114167A (en) * 2008-11-04 2010-05-20 Sumitomo Metal Mining Co Ltd Low-resistive chip resistor, and method for manufacturing the same
WO2011018842A1 (en) * 2009-08-11 2011-02-17 釜屋電機株式会社 Low-resistance chip resistor and method of manufacturing same
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CN108666057B (en) * 2018-04-03 2024-04-30 广东风华高新科技股份有限公司 Chip resistor and preparation method thereof
WO2022129669A1 (en) * 2020-12-17 2022-06-23 Universitat Jaume I Ceramic switch tile and method for manufacturing the same

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