JP2006261261A5 - - Google Patents

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Publication number
JP2006261261A5
JP2006261261A5 JP2005074280A JP2005074280A JP2006261261A5 JP 2006261261 A5 JP2006261261 A5 JP 2006261261A5 JP 2005074280 A JP2005074280 A JP 2005074280A JP 2005074280 A JP2005074280 A JP 2005074280A JP 2006261261 A5 JP2006261261 A5 JP 2006261261A5
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JP
Japan
Prior art keywords
polishing
slurry
wafer
polished
semiconductor device
Prior art date
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Pending
Application number
JP2005074280A
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Japanese (ja)
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JP2006261261A (en
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Publication date
Application filed filed Critical
Priority to JP2005074280A priority Critical patent/JP2006261261A/en
Priority claimed from JP2005074280A external-priority patent/JP2006261261A/en
Publication of JP2006261261A publication Critical patent/JP2006261261A/en
Publication of JP2006261261A5 publication Critical patent/JP2006261261A5/ja
Pending legal-status Critical Current

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Claims (9)

ウェハの表面を研磨する化学機械研磨装置であって、
前記ウェハを載置する研磨テーブルと、
前記研磨テーブル上にスラリーを滴下して供給する複数のスラリー供給ラインと、
前記複数のスラリー供給ラインにそれぞれ異なるスラリーを供給する複数のスラリーユ
ニットと、
を含むことを特徴とする化学機械研磨装置。
A chemical mechanical polishing apparatus for polishing the surface of a wafer,
A polishing table for mounting the wafer;
A plurality of slurry supply lines for dropping and supplying the slurry onto the polishing table;
A plurality of slurry units for supplying different slurries to the plurality of slurry supply lines;
A chemical mechanical polishing apparatus comprising:
前記複数のスラリーユニットとして、前記ウェハの被研磨膜により形成された表面の凸
部の段差を緩和するための高平坦化スラリーを供給する第一のスラリーユニットと、前記
ウェハの被研磨膜と比較してストッパー膜の研磨速度が小さい高選択スラリーを供給する
第二のスラリーユニットと、前記ウェハの被研磨膜およびストッパー膜の表面の段差を緩
和するための低選択スラリーを供給する第三のスラリーユニットと、を含むことを特徴と
する請求項1に記載の化学機械研磨装置。
Compared with the first slurry unit for supplying a highly planarized slurry for relaxing the step of the convex portion of the surface formed by the film to be polished of the wafer as the plurality of slurry units, and the film to be polished of the wafer A second slurry unit for supplying a high-selection slurry having a low polishing rate for the stopper film, and a third slurry for supplying a low-selection slurry for alleviating the level difference between the polishing target film and the stopper film on the wafer. The chemical mechanical polishing apparatus according to claim 1, further comprising a unit.
連続した複数の研磨ステップによりウェハの表面を同一の研磨テーブル上で研磨する半導体装置の製造方法であって、
前記複数の研磨ステップのうちいずれかの研磨ステップに、異なる性質のスラリーを混
合した混合スラリーを用いる研磨ステップを含むことを特徴とする半導体装置の製造方法
A method for manufacturing a semiconductor device, wherein the surface of a wafer is polished on the same polishing table by a plurality of successive polishing steps,
Wherein in any of the polishing step of the plurality of polishing steps, the method of manufacturing a semiconductor device characterized by comprising a polishing step using a mixed slurry obtained by mixing a slurry of different nature.
前記混合スラリーを用いる研磨ステップを、二種類の異なる性質のスラリーを前記研磨
テーブル上に前記ウェハの被研磨膜により形成された表面の凸部の段差を緩和するための
高平坦化スラリーの割合を大きくして混合比を変化させることなく所定の混合比で滴下し
ながら混合して研磨する研磨ステップとすることを特徴とする請求項3に記載の半導体装置の製造方法
In the polishing step using the mixed slurry, the ratio of the highly flattened slurry for relaxing the step of the convex portion of the surface formed by the polishing target film of the wafer on the polishing table with two types of slurry having different properties is set. 4. The method of manufacturing a semiconductor device according to claim 3, wherein the polishing step is a polishing step in which the polishing step is performed while adding and dropping while dropping at a predetermined mixing ratio without changing the mixing ratio.
前記混合スラリーを用いる研磨ステップを、二種類の異なる性質のスラリーを前記研磨
テーブル上に混合比を変化させて滴下しながら混合して研磨する研磨ステップとすること
を特徴とする請求項3に記載の半導体装置の製造方法
4. The polishing step using the mixed slurry is a polishing step in which two types of slurry having different properties are mixed and polished while dripping the slurry with different mixing ratios on the polishing table. Semiconductor device manufacturing method .
連続した複数の研磨ステップによりウェハの表面を同一の研磨テーブル上で研磨する半導体装置の製造方法であって、
前記ウェハの表面を、前記ウェハの被研磨膜により形成された表面の凸部の段差を緩和
するための高平坦化スラリーを前記研磨テーブル上に滴下して研磨する第一研磨ステップ
と、
前記第一研磨ステップにより研磨された前記ウェハの表面を、前記高平坦化スラリーと
、前記ウェハの被研磨膜と比較してストッパー膜の研磨速度が小さい高選択スラリーとを
前記研磨テーブル上に混合比を変化させることなく所定の混合比で滴下しながら混合して
研磨する第二研磨ステップと、
前記第二研磨ステップにより研磨された前記ウェハの表面を、前記高選択スラリーと、
前記ウェハの被研磨膜およびストッパー膜の表面の段差を緩和するための低選択スラリー
とを高選択スラリーの割合が大から小になるように混合比を変化させて前記研磨テーブル
上に滴下しながら混合して研磨する第三研磨ステップと、
を含むことを特徴とする半導体装置の製造方法
A method for manufacturing a semiconductor device in which a surface of a wafer is polished on the same polishing table by a plurality of successive polishing steps,
A first polishing step for polishing the surface of the wafer by dropping a highly planarized slurry on the polishing table for relaxing a step of a convex portion of the surface formed by the film to be polished of the wafer;
The surface of the wafer polished by the first polishing step is mixed on the polishing table with the highly planarized slurry and a highly selective slurry whose polishing rate of the stopper film is lower than the film to be polished of the wafer. A second polishing step for mixing and polishing while dropping at a predetermined mixing ratio without changing the ratio;
The surface of the wafer polished by the second polishing step, the highly selective slurry,
While dripping the low-selection slurry for relaxing the level difference between the polishing target film and the stopper film on the wafer onto the polishing table while changing the mixing ratio so that the ratio of the high-selection slurry is large to small. A third polishing step for mixing and polishing;
A method for manufacturing a semiconductor device, comprising:
前記複数の研磨ステップのうちいずれかの研磨ステップにおいて、純水を混合したスラ
リーを用いて研磨することを特徴とする請求項3〜6のいずれかに記載の半導体装置の製造方法
The method of manufacturing a semiconductor device according to claim 3, wherein polishing is performed using a slurry mixed with pure water in any one of the plurality of polishing steps.
第一の研磨テーブル上でウェハの表面を第一のスラリーで化学機械研磨する第一研磨ステップと、  A first polishing step of chemically mechanically polishing the surface of the wafer with a first slurry on a first polishing table;
前記第一の研磨テーブル上で前記ウェハの表面を、前記第一のスラリーに第二のスラリーを加えて化学機械研磨する第二研磨ステップとを有する半導体装置の製造方法。  A method of manufacturing a semiconductor device, comprising: a second polishing step of chemically mechanically polishing the surface of the wafer on the first polishing table by adding a second slurry to the first slurry.
前記第一のスラリーと前記第二のスラリーとして、互いに性質が異なるものを用い、  As the first slurry and the second slurry, those having different properties from each other,
前記第一研磨ステップの後に前記第二研磨ステップを連続的に実施し、  Performing the second polishing step continuously after the first polishing step;
前記第一研磨ステップと前記第二研磨ステップとを行う化学機械研磨装置として、前記第一の研磨テーブルと、前記第一のスラリーを前記第一の研磨テーブルに供給する第一のスラリーユニットと、前記第二のスラリーを前記第一の研磨テーブルに供給する第二のスラリーユニットとを含むものを用いることを特徴とする請求項8に記載の半導体装置の製造方法。  As a chemical mechanical polishing apparatus that performs the first polishing step and the second polishing step, the first polishing table, a first slurry unit that supplies the first slurry to the first polishing table, 9. The method of manufacturing a semiconductor device according to claim 8, comprising a second slurry unit that supplies the second slurry to the first polishing table. 10.
JP2005074280A 2005-03-16 2005-03-16 Apparatus and method for chemical mechanical polishing Pending JP2006261261A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005074280A JP2006261261A (en) 2005-03-16 2005-03-16 Apparatus and method for chemical mechanical polishing

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005074280A JP2006261261A (en) 2005-03-16 2005-03-16 Apparatus and method for chemical mechanical polishing

Publications (2)

Publication Number Publication Date
JP2006261261A JP2006261261A (en) 2006-09-28
JP2006261261A5 true JP2006261261A5 (en) 2008-04-10

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Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5990444B2 (en) * 2012-11-01 2016-09-14 昭和電工株式会社 Method for manufacturing silicon carbide semiconductor device
CN109243976B (en) 2013-01-11 2023-05-23 应用材料公司 Chemical mechanical polishing apparatus and method
US20160027668A1 (en) * 2014-07-25 2016-01-28 Applied Materials, Inc. Chemical mechanical polishing apparatus and methods

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08139060A (en) * 1994-11-04 1996-05-31 Ricoh Co Ltd Method of manufacturing semiconductor device and chemical machine polisher
JPH10180616A (en) * 1996-12-19 1998-07-07 Hitachi Ltd Polishing device and polishing method
JP3575942B2 (en) * 1997-02-28 2004-10-13 株式会社東芝 Method for manufacturing semiconductor device
US6204169B1 (en) * 1997-03-24 2001-03-20 Motorola Inc. Processing for polishing dissimilar conductive layers in a semiconductor device
JP2000208454A (en) * 1999-01-18 2000-07-28 Tokyo Seimitsu Co Ltd Method of supplying abrasives to wafer polisher
JP3033574B1 (en) * 1999-02-15 2000-04-17 日本電気株式会社 Polishing method
JP3616989B2 (en) * 2000-04-24 2005-02-02 日本電信電話株式会社 Polishing apparatus and polishing method
JP2001322899A (en) * 2000-05-11 2001-11-20 Matsushita Electric Ind Co Ltd Gallium nitride-based compound semiconductor substrate and method of producing the same
JP4310884B2 (en) * 2000-05-12 2009-08-12 株式会社デンソー Polishing method, abrasive composition and polishing apparatus
JP2002184734A (en) * 2000-12-19 2002-06-28 Tokuyama Corp Manufacturing method of semiconductor device
JP2002324772A (en) * 2001-04-25 2002-11-08 Hitachi Ltd Method and apparatus for manufacturing semiconductor device
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