JP2006203041A - Method for manufacturing semiconductor device and spin coating device - Google Patents

Method for manufacturing semiconductor device and spin coating device Download PDF

Info

Publication number
JP2006203041A
JP2006203041A JP2005014035A JP2005014035A JP2006203041A JP 2006203041 A JP2006203041 A JP 2006203041A JP 2005014035 A JP2005014035 A JP 2005014035A JP 2005014035 A JP2005014035 A JP 2005014035A JP 2006203041 A JP2006203041 A JP 2006203041A
Authority
JP
Japan
Prior art keywords
wafer
processed
developer
resist
developing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2005014035A
Other languages
Japanese (ja)
Inventor
Toru Saito
徹 齋藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP2005014035A priority Critical patent/JP2006203041A/en
Publication of JP2006203041A publication Critical patent/JP2006203041A/en
Withdrawn legal-status Critical Current

Links

Images

Landscapes

  • Coating Apparatus (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device for developing a resist pattern further improving an evenness of a pattern size, and to provide a spin coating device. <P>SOLUTION: A predetermined time for filling a predetermined volume of developing solution 16 with a developing-solution-discharging nozzle 15 is set. The developing-solution-discharging time and the expansion of the predetermined volume of the developing solution 16 over the wafer WF to be processed after the elapse of the developing-solution-filling time are completed without preferably biasing the thickness. When the developing solution 16 is filled during the developing-solution-filling time, the wafer WF to be processed is rotated at the predetermined number of revolutions SP1. From the immediately after the elapse of the developing-solution-filling time, the number of revolutions of the wafer WF to be processed is decreased to not more than a half (SP2) so that the developing solution 16 expands more slowly to the periphery part of the wafer WF to be processed. It is important not to increase the difference between the high and low area of the developing solution 16 as shown by the dotted line 16NG. This preferably uniformizes the developing reaction starting immediately after the filling of the developing solution. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、半導体装置製造に係り、特に半導体ウェハのレジスト表面に現像液を塗布して現像し、所望のレジストパターンを形成する半導体装置の製造方法及びスピン塗布装置に関する。   The present invention relates to semiconductor device manufacturing, and more particularly, to a semiconductor device manufacturing method and spin coating apparatus for forming a desired resist pattern by applying a developing solution to a resist surface of a semiconductor wafer and developing the resist.

ウェハ上に形成されるパターンの微細化、高精度化が要求されるに従って、レジストの現像工程は、露光技術と共に重要になってきている。
レジストの現像工程は、半導体ウェハにおける露光済みのレジスト表面に現像液をスピン塗布する。所定時間現像反応を進行させた後、現像液を洗い流す。
As the pattern formed on the wafer is required to be finer and more accurate, the resist development process has become important along with the exposure technique.
In the resist development process, a developer is spin-coated on the exposed resist surface of the semiconductor wafer. After the development reaction is allowed to proceed for a predetermined time, the developer is washed away.

従来、現像反応を進行させる上で仕上がりのパターン寸法の均一性が悪化する問題があった。対策として、レジスト表面へ現像液供給後、現像反応が進行している間に回転と停止を繰返す。これにより、現像液を流動させ、現像液を攪拌させる(例えば、特許文献1参照)。これにより、現像液の温度、濃度、反応生成物(現像液と反応し溶け出したレジスト)の濃度、等の均一性を高める。
特開平11−238676号公報(図2)
Conventionally, there has been a problem that the uniformity of the finished pattern dimension deteriorates when the development reaction proceeds. As a countermeasure, after supplying the developing solution to the resist surface, rotation and stop are repeated while the developing reaction is in progress. Thereby, a developing solution is made to flow and a developing solution is stirred (for example, refer patent document 1). Thereby, the uniformity of the temperature and concentration of the developing solution, the concentration of the reaction product (resist dissolved and reacted with the developing solution), and the like are increased.
Japanese Patent Laid-Open No. 11-238676 (FIG. 2)

従来では、レジスト表面への現像液供給後において、現像反応をより均一に進行させるための工夫がなされていた。しかしながら、現像は現像液がレジスト表面に接触した瞬間から開始される。このため、レジストパターンの寸法均一性をより高めるには上記の工夫だけでは不十分である。   Conventionally, after the developer is supplied to the resist surface, a device has been devised to make the development reaction proceed more uniformly. However, development is started from the moment when the developer contacts the resist surface. For this reason, in order to further improve the dimensional uniformity of the resist pattern, the above device is not sufficient.

本発明は上記のような事情を考慮してなされたもので、パターン寸法の均一性がいっそう向上するレジストパターンを現像する半導体装置の製造方法及びスピン塗布装置を提供しようとするものである。   The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a method of manufacturing a semiconductor device and a spin coating apparatus for developing a resist pattern that further improves the uniformity of pattern dimensions.

本発明に係る半導体装置の製造方法は、表面のレジストが露光された被処理ウェハを回転させながら前記レジストの表面へ現像液を塗布し、前記レジストを現像して所定のレジストパターンを現出させる半導体装置の製造方法において、前記被処理ウェハにおける前記レジスト上へ前記現像液が盛られる所定の液盛り時間が設定され、前記液盛り時間内の前記被処理ウェハの回転数に比べ前記液盛り時間経過直後からの前記被処理ウェハの回転数を半分以下に減少させることを特徴とする。   In the method for manufacturing a semiconductor device according to the present invention, a developing solution is applied to the surface of the resist while rotating the wafer to be processed on which the resist on the surface is exposed, and the resist is developed to reveal a predetermined resist pattern. In the method of manufacturing a semiconductor device, a predetermined liquid build-up time in which the developer is poured onto the resist in the wafer to be processed is set, and the liquid filling time is compared with the number of rotations of the wafer to be processed within the liquid filling time. The number of rotations of the wafer to be processed immediately after the lapse is reduced to half or less.

上記本発明に係る半導体装置の製造方法によれば、現像液が盛られている最中は新しい現像液が被処理ウェハのレジスト表面へ次々供給される。このため、より早く現像液が流動するように被処理ウェハの回転数が設定される。液盛り時間経過直後からは遠心力を抑え、現像液が被処理ウェハの外周部で大きく溜まらないようにする。これにより、液盛り直後から始まる現像反応をなるべく均一化する。
なお、好ましくは、上記本発明に係る半導体装置の製造方法において、前記被処理ウェハの回転数は、所定量の前記現像液が前記被処理ウェハの外周部まで広がる直前に低下し、前記現像液がより緩やかに前記被処理ウェハの外周部に広がっていくように最適化されることを特徴とする。
According to the method for manufacturing a semiconductor device of the present invention, new developer is successively supplied to the resist surface of the wafer to be processed while the developer is being accumulated. For this reason, the rotation speed of the wafer to be processed is set so that the developer flows faster. Immediately after the liquid build-up time elapses, the centrifugal force is suppressed so that the developer does not accumulate largely on the outer periphery of the wafer to be processed. As a result, the development reaction starting immediately after the liquid buildup is made as uniform as possible.
Preferably, in the method of manufacturing a semiconductor device according to the present invention, the number of rotations of the wafer to be processed decreases immediately before a predetermined amount of the developing solution spreads to an outer peripheral portion of the processing wafer, and the developing solution Is optimized so as to spread more gradually on the outer periphery of the wafer to be processed.

本発明に係る半導体装置の製造方法は、表面のレジストが露光された被処理ウェハについて第1の回転数で回転させながらレジスト表面に所定量の現像液を吐出し前記現像液を前記被処理ウェハの外周部に向かって広げる現像液盛り工程と、前記被処理ウェハを前記第1の回転数より低い第2の回転数で回転させ、前記レジスト表面の前記所定量の現像液をより緩やかに前記被処理ウェハの外周部まで広げる現像液拡張工程と、前記被処理ウェハについて前記第2の回転数と同等かより高い第3の回転数でもって回転及び停止を繰り返し、前記現像液を前記レジスト表面全域に攪拌する現像液攪拌工程と、前記被処理ウェハを前記第3の回転数より高い第4の回転数で回転させながら、現像反応後の前記レジスト表面に洗浄液を供給して前記現像液を含む反応生成物を除去し、レジストパターンを現出する洗浄工程と、を含む。   In the method of manufacturing a semiconductor device according to the present invention, a predetermined amount of developer is discharged onto the resist surface while rotating the wafer to be processed, on which the resist on the surface is exposed, at a first rotation speed, and the developer is discharged to the wafer to be processed. A developer stacking step that spreads toward the outer periphery of the substrate, and the wafer to be processed is rotated at a second rotational speed lower than the first rotational speed, so that the predetermined amount of the developer on the resist surface is more gently A developer expansion step of extending the outer periphery of the wafer to be processed, and a rotation and stop of the wafer to be processed at a third rotational speed that is equal to or higher than the second rotational speed. A developer agitating step for agitating the entire region, and supplying a cleaning solution to the resist surface after the development reaction while rotating the wafer to be processed at a fourth rotational speed higher than the third rotational speed; Removing a reaction product comprising an image solution, comprising a cleaning step of revealing the resist pattern.

上記本発明に係る半導体装置の製造方法によれば、被処理ウェハの外周部まで現像液を広げる動作を、現像液盛り工程から現像液拡張工程に移行するような、2工程に分けた。現像液盛り工程中は、新しい現像液が被処理ウェハのレジスト表面へ次々と供給される。このため、現像液を被処理ウェハの外周部に向かって早く広げるように被処理ウェハの回転数が第1の回転数に設定される。しかし、現像液が被処理ウェハの外周部に到達する直前で現像液盛り工程は終わる。続いて現像液拡張工程では、被処理ウェハの回転数が第2の回転数に落とされる。これにより遠心力が抑えられ、現像液が被処理ウェハの外周部に片寄ることはない。これにより、液盛り直後から始まる現像反応をなるべく均一化する。それ以降の現像液攪拌工程においても現像反応の均一化を図る動作をする。すなわち、第3の回転数での回転及び停止の繰り返しが実施される。その後、洗浄工程によりレジストパターンが現出される。   According to the method of manufacturing a semiconductor device according to the present invention, the operation of spreading the developing solution to the outer peripheral portion of the wafer to be processed is divided into two steps in which the developing solution filling step is shifted to the developing solution expansion step. During the developer stacking process, new developer is successively supplied to the resist surface of the wafer to be processed. For this reason, the rotation speed of the wafer to be processed is set to the first rotation speed so that the developer is spread quickly toward the outer periphery of the wafer to be processed. However, the developer stacking process ends just before the developer reaches the outer periphery of the wafer to be processed. Subsequently, in the developer expanding step, the rotation speed of the wafer to be processed is lowered to the second rotation speed. As a result, the centrifugal force is suppressed, and the developer does not shift to the outer peripheral portion of the wafer to be processed. As a result, the development reaction starting immediately after the liquid buildup is made as uniform as possible. In the subsequent developer agitation step, the developing reaction is made uniform. That is, the rotation and stop at the third rotation number are repeated. Thereafter, a resist pattern appears by a cleaning process.

なお、上記本発明に係る半導体装置の製造方法において、次のいずれかの特徴を有することによって、現像液のより好ましい均一な拡張が期待できる。
前記現像液盛り工程は、所定量の前記現像液が前記被処理ウェハの外周部まで広がる直前までの所定時間だけ設けられた後、前記現像液拡張工程に移行し、前記現像液拡張工程は、前記被処理ウェハの中心部と外周部における前記現像液の高低差がより小さく抑えられるように、前記所定時間、前記第1の回転数と前記第2の回転数を最適化することを特徴とする。
前記第2の回転数は前記第1の回転数の1/3以下にされることを特徴とする。
In addition, in the semiconductor device manufacturing method according to the present invention, it is possible to expect a more preferable uniform expansion of the developer by having any of the following features.
The developer stacking step is provided only for a predetermined time until a predetermined amount of the developer spreads to the outer peripheral portion of the wafer to be processed, and then proceeds to the developer expanding step. The first rotation speed and the second rotation speed are optimized for the predetermined time so that a difference in height of the developing solution between a central portion and an outer peripheral portion of the wafer to be processed can be suppressed to be smaller. To do.
The second rotational speed is set to 1/3 or less of the first rotational speed.

なお、上記本発明に係る半導体装置の製造方法において、前記被処理ウェハを前記第4の回転数より高い第5の回転数で回転させながら前記レジストパターン表面を乾燥させる乾燥工程をさらに含むことを特徴とする。   The semiconductor device manufacturing method according to the present invention further includes a drying step of drying the resist pattern surface while rotating the wafer to be processed at a fifth rotational speed higher than the fourth rotational speed. Features.

本発明に係るスピン塗布装置は、被処理ウェハが載置され回転可能な保持部と、前記保持部を所定の回転数で回転させる駆動部と、前記被処理ウェハの主表面に所定の薬液を一定時間に定量供給する薬液吐出ノズルと、前記被処理ウェハの主表面に所定の洗浄液を供給する洗浄液吐出ノズルと、少なくとも前記薬液を前記被処理ウェハの主表面に広げる段階において前記駆動部を制御し前記薬液吐出ノズルの薬液吐出時と薬液吐出直後とで前記保持部の回転数を変化させる制御機構と、を含む。   The spin coating apparatus according to the present invention includes a holding unit on which a wafer to be processed is mounted and rotatable, a driving unit that rotates the holding unit at a predetermined rotation number, and a predetermined chemical solution on a main surface of the wafer to be processed. A chemical liquid discharge nozzle that supplies a fixed amount of liquid at a fixed time, a cleaning liquid discharge nozzle that supplies a predetermined cleaning liquid to the main surface of the wafer to be processed, and at least a stage that spreads the chemical liquid to the main surface of the wafer to be processed. And a control mechanism for changing the number of rotations of the holding unit between when the chemical liquid is discharged from the chemical liquid discharge nozzle and immediately after the chemical liquid is discharged.

上記本発明に係るスピン塗布装置によれば、少なくとも薬液を被処理ウェハの主表面に広げる段階で駆動部を制御する制御機構を設ける。制御機構は薬液吐出ノズルの薬液吐出時と薬液吐出直後とで保持部の回転数を変化させる。薬液吐出時と薬液吐出直後とで回転数を低下させれば、薬液吐出時は被処理ウェハの外周部に向かって薬液を広げる作用を強め、薬液吐出直後は遠心力が抑えられ、薬液が被処理ウェハの外周部に片寄らなくなる。これにより、薬液反応の均一化に寄与する。
なお、上記本発明に係るスピン塗布装置において、前記被処理ウェハの主表面は露光されたレジスト表面であり、前記薬液は現像液であることを特徴とする。
According to the spin coating apparatus according to the present invention, a control mechanism is provided that controls the drive unit at least at the stage of spreading the chemical solution on the main surface of the wafer to be processed. The control mechanism changes the number of rotations of the holding unit when the chemical liquid is discharged from the chemical liquid discharge nozzle and immediately after the chemical liquid is discharged. If the number of revolutions is reduced when the chemical solution is discharged and immediately after the chemical solution is discharged, the action of spreading the chemical solution toward the outer periphery of the wafer to be processed is enhanced when the chemical solution is discharged, and the centrifugal force is suppressed immediately after the chemical solution is discharged, and the chemical solution is covered. The outer periphery of the processing wafer is not offset. This contributes to uniform chemical reaction.
In the spin coating apparatus according to the present invention, the main surface of the wafer to be processed is an exposed resist surface, and the chemical solution is a developer.

本発明に係るスピン塗布装置は、表面のレジストが露光された被処理ウェハが載置され回転可能な保持部と、前記保持部を所定の回転数で回転させる駆動部と、前記被処理ウェハの主表面に現像液を定量供給する現像液吐出ノズルと、前記被処理ウェハの主表面を洗浄するための洗浄液吐出ノズルと、少なくとも前記現像液吐出ノズルにおける現像液盛り時間と現像液盛り時の回転数及び現像液盛り直後の回転数に関し、前記被処理ウェハの中心部と外周部における前記現像液の高低差がより小さく抑えられるように最適化された制御機構と、を含む。   A spin coating apparatus according to the present invention includes a holding unit on which a wafer to be processed on which a resist on a surface is exposed is placed and rotatable, a driving unit that rotates the holding unit at a predetermined number of rotations, A developer discharge nozzle for supplying a constant amount of developer to the main surface, a cleaning liquid discharge nozzle for cleaning the main surface of the wafer to be processed, and at least a developer build-up time and a rotation at the time of developer build-up at the developer discharge nozzle And a control mechanism that is optimized so that a difference in height of the developing solution between the central portion and the outer peripheral portion of the wafer to be processed can be suppressed to be smaller with respect to the number and the number of rotations immediately after the developing solution is deposited.

上記本発明に係るスピン塗布装置によれば、制御機構は現像液吐出ノズルにおける現像液盛り時間と現像液盛り時の回転数及び現像液盛り直後の回転数を最適化する。最適化とは、現像液の吐出時から始まる現像反応の影響をウェハ表面内で一様にするため、現像液の吐出時から被処理ウェハの中心部と外周部における現像液の高低差を小さく抑えるべく作用させることである。これにより、ウェハ面内におけるレジストパターン寸法の均一性をより向上させることができる。   According to the spin coating apparatus according to the present invention, the control mechanism optimizes the developer build-up time, the rotation speed at the time of developer build-up, and the rotation speed immediately after the developer build-up at the developer discharge nozzle. Optimization optimizes the development reaction starting from the time of developer discharge within the wafer surface, so that the difference in height of the developer at the center and outer periphery of the wafer to be processed has been reduced since the time of developer discharge. It is to act to suppress. Thereby, the uniformity of the resist pattern dimension in the wafer surface can be further improved.

発明を実施するための形態BEST MODE FOR CARRYING OUT THE INVENTION

図1(a),(b)は、それぞれ本発明の第1実施形態に係る半導体装置の製造方法の要部であり、表面のレジストが露光された被処理ウェハを現像するための部分工程を順に示す概観図である。スピンチャック11は、表面のレジストRSが露光された被処理ウェハWFを保持し、回転可能である。現像液吐出ノズル15は、レジストRSの表面へ現像液16を吐出する。   FIGS. 1A and 1B are main parts of the method for manufacturing a semiconductor device according to the first embodiment of the present invention, respectively, and show partial processes for developing a wafer to be processed on which a surface resist is exposed. It is an outline figure shown in order. The spin chuck 11 holds the processing target wafer WF on which the resist RS on the surface is exposed, and is rotatable. The developer discharge nozzle 15 discharges the developer 16 onto the surface of the resist RS.

現像液16は、レジストRS上に接触した直後から現像反応が始まることに注目すべきである。また、レジストRS上において現像液16が厚く塗布された領域は、薄く塗布された領域よりも現像が進行し易く、現像液16の厚みばらつきの影響は無視できない。
この実施形態では、現像液吐出ノズル15による所定量の現像液16について、所定の現像液盛り時間が設定される。そして、現像液盛り時間と現像液盛り時間経過後に及ぶ所定量の現像液16の被処理ウェハWF上への拡張を、なるべく厚みを片寄らせずに達成させる。
It should be noted that the developing reaction starts immediately after the developer 16 contacts the resist RS. Further, the region where the developer 16 is thickly applied on the resist RS is more easily developed than the region where the developer 16 is thinly applied, and the influence of the variation in the thickness of the developer 16 cannot be ignored.
In this embodiment, a predetermined developer accumulation time is set for a predetermined amount of developer 16 by the developer discharge nozzle 15. Then, expansion of the developing solution build-up time and a predetermined amount of the developing solution 16 over the developing solution build-up time onto the wafer WF to be processed is achieved without shifting the thickness as much as possible.

図1(a)に示すように、現像液盛り時間において現像液16が盛られている際、被処理ウェハWFは所定の回転数SP1で回転している。現像液16は遠心力で被処理ウェハWFの外周部に向かって広がろうとする。現像液16が被処理ウェハWFの外周部まで広がる直前に現像液盛り時間は終了する。この現像液盛り時間経過直後からは図1(b)に示すように、被処理ウェハWFの回転数を半分以下に減少させ(SP2)、現像液16がより緩やかに被処理ウェハWFの外周部に広がっていくようにする。   As shown in FIG. 1A, when the developing solution 16 is being accumulated during the developing solution accumulation time, the processing target wafer WF is rotated at a predetermined number of revolutions SP1. The developer 16 tends to spread toward the outer periphery of the wafer WF to be processed by centrifugal force. The developer build-up time ends immediately before the developer 16 spreads to the outer periphery of the wafer WF to be processed. Immediately after the developer build-up time elapses, as shown in FIG. 1B, the rotational speed of the wafer WF to be processed is reduced to half or less (SP2), and the developer 16 becomes more gently the outer periphery of the wafer WF to be processed. To spread.

上記実施形態の方法によれば、図1(a)の、現像液16が盛られている最中は新しい現像液16が被処理ウェハWFのレジストRS表面へ次々供給される。このため、より早く現像液16が流動するように被処理ウェハWFの回転数SP1が設定される。液盛り時間経過直後からは図1(b)に示すように遠心力を抑える回転数SP2に変わり、現像液16が被処理ウェハWFの外周部で大きく溜まらないようにする。つまり、破線16NGに示すように現像液16の高低差を大きくしないことが重要である。これにより、液盛り直後から始まる現像反応をなるべく均一化する。   According to the method of the above embodiment, while the developing solution 16 of FIG. 1A is being accumulated, new developing solution 16 is successively supplied to the resist RS surface of the wafer WF to be processed. For this reason, the rotational speed SP1 of the wafer WF to be processed is set so that the developer 16 flows faster. Immediately after the liquid build-up time elapses, the speed changes to the rotation speed SP2 for suppressing the centrifugal force as shown in FIG. 1B, so that the developer 16 does not accumulate largely on the outer periphery of the wafer WF to be processed. That is, it is important not to increase the height difference of the developer 16 as indicated by the broken line 16NG. As a result, the development reaction starting immediately after the liquid buildup is made as uniform as possible.

図2(a)〜(e)は、それぞれ本発明の第2実施形態に係る半導体装置の製造方法の要部であり、表面のレジストが露光された被処理ウェハを現像するための部分工程を順に示す概観図である。図3は、被処理ウェハのレジストを現像し、レジストパターンを現出するまでのウェハの回転数変化を示すシーケンス特性図である。前記第1実施形態と同様の箇所には同一の符号を付して説明する。   FIGS. 2A to 2E are main parts of a method of manufacturing a semiconductor device according to the second embodiment of the present invention, respectively, and show partial processes for developing a wafer to be processed on which a surface resist is exposed. It is an outline figure shown in order. FIG. 3 is a sequence characteristic diagram showing a change in the number of rotations of the wafer until the resist on the wafer to be processed is developed and a resist pattern appears. The same parts as those in the first embodiment will be described with the same reference numerals.

前記第1実施形態と同様に、スピンチャック11は、表面のレジストRSが露光された被処理ウェハWFを保持し、回転可能である。現像液吐出ノズル15は、レジストRSの表面へ現像液16を吐出する。現像液16は、レジストRS上に接触した直後から現像反応が始まる。そこで、現像液盛り時間と現像液盛り時間経過後に及ぶ被処理ウェハWF上への所定量の現像液16の拡張を、なるべく片寄らせず均一に達成させる。   Similar to the first embodiment, the spin chuck 11 holds and rotates the wafer WF to be processed on which the resist RS on the surface has been exposed. The developer discharge nozzle 15 discharges the developer 16 onto the surface of the resist RS. The developing reaction starts immediately after the developer 16 comes into contact with the resist RS. Therefore, the expansion of the predetermined amount of the developer 16 onto the wafer WF to be processed after the developer accumulation time and the developer accumulation time have elapsed is uniformly achieved without being shifted as much as possible.

すなわち、図2(a)に示すように、現像液盛り工程は現像液盛り時間で規定される。現像液盛り工程では、被処理ウェハWFについて第1の回転数SP1で回転させながらレジストRS表面に所定量の現像液16を吐出し現像液16を被処理ウェハWFの外周部に向かって広げる。現像液16が外周部に到達する直前に現像液盛り工程(現像液盛り時間)は終わる。
次に、図2(b)に示すように、現像液盛り時間経過直後から現像液拡張工程に入る。被処理ウェハWFを第1の回転数SP1より低い第2の回転数SP2で回転させ、レジストRS表面の所定量の現像液16をより緩やかに被処理ウェハWFの外周部まで広げる。
これにより、現像液16供給の初期から現像進行の均一化を図る。
That is, as shown in FIG. 2 (a), the developer stacking process is defined by the developer stacking time. In the developing solution stacking process, a predetermined amount of the developing solution 16 is discharged onto the surface of the resist RS while the processing target wafer WF is rotated at the first rotation speed SP1, and the developing solution 16 is spread toward the outer periphery of the processing target wafer WF. Immediately before the developer 16 reaches the outer peripheral portion, the developer accumulation step (developer accumulation time) ends.
Next, as shown in FIG. 2B, the developing solution expansion step is started immediately after the developing solution build-up time. The wafer WF to be processed is rotated at a second rotation speed SP2 lower than the first rotation speed SP1, and a predetermined amount of the developer 16 on the surface of the resist RS is more gently spread to the outer periphery of the wafer WF to be processed.
Thereby, the development progress is made uniform from the initial stage of supplying the developing solution 16.

次に、図2(c)に示すように、現像液のアジテーション(攪拌)工程に移行する。ここでのアジテーション工程は、上記第2の回転数と同等かより高い第3の回転数SP3でもって回転及び停止を繰り返し、現像液16をレジスト表面全域に攪拌する。これにより、現像進行の最終段階までより安定な、均一な現像進行を図る。   Next, as shown in FIG. 2C, the process proceeds to a developer agitation step. In this agitation step, the rotation and stop are repeated at the third rotation speed SP3 that is equal to or higher than the second rotation speed, and the developer 16 is stirred over the entire resist surface. Thereby, more stable and uniform development progress is achieved until the final stage of development progress.

次に、図2(d)に示すように、レジストパターンを現出する洗浄工程に移行する。洗浄工程は、被処理ウェハWFを第3の回転数SP3より高い第4の回転数SP4で回転させながら、洗浄液吐出ノズル17より現像反応後のレジスト表面に洗浄液、例えば純水を供給し、現像液16を含む反応生成物を除去し、レジストパターンPTを現出する。   Next, as shown in FIG. 2D, the process proceeds to a cleaning process for exposing a resist pattern. In the cleaning step, a cleaning liquid, for example, pure water is supplied from the cleaning liquid discharge nozzle 17 to the resist surface after the development reaction while rotating the wafer WF to be processed at a fourth rotational speed SP4 higher than the third rotational speed SP3. The reaction product containing the liquid 16 is removed, and a resist pattern PT appears.

その後、図2(e)に示すように、乾燥工程に移行する。乾燥工程は、例えば被処理ウェハWFを第4の回転数SP4より高い第5の回転数SP5で回転させながら、レジストパターンPT表面を乾燥させる。
以上、図2(a)〜(e)のような処理の流れは、図3におけるシーケンス特性図を参照すると、分かりやすい。
Then, as shown in FIG.2 (e), it transfers to a drying process. In the drying step, for example, the surface of the resist pattern PT is dried while rotating the wafer WF to be processed at a fifth rotation speed SP5 higher than the fourth rotation speed SP4.
2A to 2E is easy to understand with reference to the sequence characteristic diagram in FIG.

上記実施形態の方法においても、前記第1実施形態と同様の作用、効果が得られる。すなわち、被処理ウェハWFの外周部まで現像液16を広げる動作を、現像液盛り工程から現像液拡張工程に移行するような、2工程に分けた。現像液盛り工程中は、新しい現像液16が被処理ウェハWFのレジストRS表面へ次々と供給される。このため、現像液16を被処理ウェハWFの外周部に向かって早く広げるように被処理ウェハWFの回転数が第1の回転数SPに設定される。しかし、現像液16が被処理ウェハWFの外周部に到達する直前で現像液盛り工程は終わる。続く現像液拡張工程では、被処理ウェハWFの回転数が第2の回転数SP2に落とされる。これにより遠心力が抑えられ、現像液16が被処理ウェハWFの外周部に片寄ることはない。これにより、液盛り直後から始まる現像反応をなるべく均一化する。それ以降の現像液攪拌工程においても現像反応の均一化を図る動作をする。すなわち、第3の回転数SP3での回転及び停止の繰り返しが実施される。その後、洗浄工程、乾燥工程によりレジストパターンが現出される。すなわち、液盛り直後から始まる現像反応をなるべく均一化することによって、より寸法均一性の高まるレジストパターンが得られる。   In the method of the above embodiment, the same operation and effect as the first embodiment can be obtained. That is, the operation of spreading the developing solution 16 to the outer periphery of the wafer WF to be processed was divided into two steps in which the developing solution filling step was shifted to the developing solution expansion step. During the developing solution filling process, new developing solution 16 is successively supplied to the resist RS surface of the wafer WF to be processed. For this reason, the rotation speed of the wafer to be processed WF is set to the first rotation speed SP so as to spread the developer 16 toward the outer periphery of the wafer WF to be processed quickly. However, the developing solution stacking process ends immediately before the developing solution 16 reaches the outer peripheral portion of the processing target wafer WF. In the subsequent developer expansion step, the rotational speed of the wafer WF to be processed is reduced to the second rotational speed SP2. As a result, the centrifugal force is suppressed, and the developer 16 does not shift to the outer peripheral portion of the wafer WF to be processed. As a result, the development reaction starting immediately after the liquid buildup is made as uniform as possible. In the subsequent developer agitation step, the developing reaction is made uniform. That is, the rotation and stop at the third rotation speed SP3 are repeated. Thereafter, a resist pattern appears by a cleaning process and a drying process. That is, a resist pattern with higher dimensional uniformity can be obtained by making the development reaction that starts immediately after the liquid buildup as uniform as possible.

図4〜図10は、前記第2実施形態に基づき、現像液盛り時間と現像液盛り時の回転数及び現像液盛り直後の回転数に関し、最適化し得る値を模索した実験例である。現像液盛り時間、及びアジテーション(攪拌)工程以降の条件は共通となっている。最終的に現像液塗布厚の均一性の観点から導き出すようにした。それぞれ図4は、実験条件を示す図、図5(a),(b)は、最小パターン寸法の測定ポイントを示すウェハマップ、図6〜図10は、有用な各条件の最小パターン寸法(C.D)の測定結果特性図である。被処理ウェハとして6インチウェハを使用した。   FIGS. 4 to 10 are experimental examples in which a value that can be optimized is sought for the developing solution build-up time, the rotation number at the time of developing solution buildup, and the rotation number immediately after the developer buildup, based on the second embodiment. The developer build-up time and the conditions after the agitation (stirring) step are common. Finally, it was derived from the viewpoint of the uniformity of the developer coating thickness. FIG. 4 is a diagram showing experimental conditions, FIGS. 5A and 5B are wafer maps showing measurement points of minimum pattern dimensions, and FIGS. 6 to 10 are minimum pattern dimensions (C FIG. A 6-inch wafer was used as the wafer to be processed.

上記実験から、最適化の傾向は次のようである。被処理ウェハWFの回転について、現像液盛り後の第2の回転数(SP2)は、現像液盛り時の第1の回転数(SP2)の1/3以下に落とすようにする。これにより、現像液厚みのウェハ面内均一性について優れた結果が得られた。現像液厚みをウェハ面内でより均一にすることにより、現像反応もより均一化すると考えられる。この実験で得られた最適化条件の一例は、条件1の、現像液盛り時間1秒程度、現像液盛り時回転数30rpm程度、現像液盛り直後回転数10rpm程度である。   From the above experiment, the optimization tendency is as follows. Regarding the rotation of the processing target wafer WF, the second rotation speed (SP2) after the developer is deposited is reduced to 1/3 or less of the first rotation speed (SP2) when the developer is deposited. Thereby, the result excellent about the wafer in-plane uniformity of developer thickness was obtained. By making the developer thickness more uniform in the wafer surface, it is considered that the development reaction is also made more uniform. An example of the optimization conditions obtained in this experiment is that the developer build-up time is about 1 second, the developer build-up rotation speed is about 30 rpm, and the developer build-up rotation speed is about 10 rpm.

図11は、本発明の第3実施形態に係るスピン塗布装置の構成を示すブロック図である。図1に示した構成と同様の箇所には同一の符号を付して説明する。スピン塗布装置10は、被処理ウェハWFを保持するスピンチャック11を有する。スピンチャック11は、例えば、表面のレジストRSが露光された被処理ウェハWFを保持し、駆動部12により所定の回転数で回転可能である。現像液吐出ノズル15は、レジストRSの表面へ現像液16を吐出する。現像液吐出ノズル15は、液盛り時間が設定でき、液盛り時間に現像液16を一定量吐出する。洗浄液吐出ノズル17は、被処理ウェハWFの主表面に所定の洗浄液(例えば純水)を供給する。制御機構13は、少なくとも現像液16を被処理ウェハWFの主表面に広げる段階において駆動部12を制御する。制御機構13は、現像液吐出ノズル15の現像液吐出時と現像液吐出直後とでスピンチャック11の回転数を変化させる。より具体的には、制御機構13は、液盛り時間を検出し、液盛り時間経過直後にスピンチャック11の回転数を液盛り時に比べて半分以下に低下させる。   FIG. 11 is a block diagram showing a configuration of a spin coating apparatus according to the third embodiment of the present invention. The same parts as those in the configuration shown in FIG. The spin coating apparatus 10 includes a spin chuck 11 that holds a processing target wafer WF. The spin chuck 11 holds, for example, the processing target wafer WF on which the resist RS on the surface is exposed, and can be rotated at a predetermined number of rotations by the driving unit 12. The developer discharge nozzle 15 discharges the developer 16 onto the surface of the resist RS. The developer discharge nozzle 15 can set a liquid build-up time, and discharges a certain amount of developer 16 during the liquid build-up time. The cleaning liquid discharge nozzle 17 supplies a predetermined cleaning liquid (for example, pure water) to the main surface of the processing target wafer WF. The control mechanism 13 controls the drive unit 12 at least in a stage where the developer 16 is spread on the main surface of the wafer WF to be processed. The control mechanism 13 changes the rotation speed of the spin chuck 11 when the developer discharge nozzle 15 discharges the developer and immediately after the developer discharge. More specifically, the control mechanism 13 detects the liquid build-up time, and immediately after the liquid build-up time has elapsed, the rotational speed of the spin chuck 11 is reduced to half or less than that during liquid build-up.

より好ましくは、前記図4〜図10に示したような条件検索を経る。これにより、制御機構13は、現像液盛り時間と現像液盛り時の回転数及び現像液盛り直後の回転数に関し、最適化データを把握しておく。制御機構13は、このような最適化データを利用して、被処理ウェハWFの中心部と外周部における現像液16の高低差がより小さく抑えられるように駆動部12を制御する。   More preferably, the condition search as shown in FIGS. Thereby, the control mechanism 13 grasps the optimization data regarding the developer deposition time, the rotation speed at the time of developer deposition, and the rotation speed immediately after the developer deposition. Using such optimization data, the control mechanism 13 controls the drive unit 12 so that the difference in height of the developer 16 between the central portion and the outer peripheral portion of the wafer WF to be processed can be suppressed to a smaller level.

上記実施形態によれば、制御機構13は、現像液吐出ノズル15における現像液盛り時間と現像液盛り時の回転数及び現像液盛り直後の回転数を最適化する。最適化とは、現像液16の吐出時から始まる現像反応の影響をウェハ表面内で一様にするため、現像液16の吐出時から被処理ウェハWFの中心部と外周部における現像液16の高低差を小さく抑えるべく作用させることである。これにより、ウェハ面内におけるレジストパターン寸法の均一性をより向上させることができる。
なお、スピン塗布装置10は、現像液16以外の薬液を扱う場合も十分考えられる。
According to the above-described embodiment, the control mechanism 13 optimizes the developer build-up time in the developer discharge nozzle 15, the rotation speed at the time of developer build-up, and the rotation speed immediately after the developer build-up. The optimization means that the influence of the development reaction starting from the time when the developer 16 is discharged is made uniform in the wafer surface, so that the developer 16 in the central portion and the outer periphery of the wafer WF to be processed is discharged from the time when the developer 16 is discharged. The effect is to keep the height difference small. Thereby, the uniformity of the resist pattern dimension in the wafer surface can be further improved.
Note that the spin coating apparatus 10 is sufficiently conceivable when a chemical solution other than the developer 16 is handled.

以上説明したように本発明によれば、被処理ウェハの外周部まで現像液を広げる動作を、現像液盛り時間に相当する現像液盛り工程から、現像液盛り時間経過直後の現像液拡張工程に移行するという、2工程に分けた。現像液盛り工程は、現像液が被処理ウェハの外周部に到達する直前で終え、続く現像液拡張工程は、被処理ウェハの回転数を半分以下に落として実施される。これにより遠心力が抑えられ、現像液が被処理ウェハの外周部に片寄ることはない。これにより、液盛り直後から始まる現像反応をなるべく均一化する。それ以降の現像液攪拌工程においても現像反応の均一化を図る動作をし、洗浄工程により所望のレジストパターンが現出される。この結果、パターン寸法の均一性がいっそう向上するレジストパターンを現像する半導体装置の製造方法及びスピン塗布装置を提供することができる。   As described above, according to the present invention, the operation of spreading the developing solution to the outer periphery of the wafer to be processed is changed from the developing solution filling step corresponding to the developing solution build-up time to the developing solution extension step immediately after the developing solution filling time. The process was divided into two steps of migration. The developer stacking process is completed immediately before the developer reaches the outer peripheral portion of the wafer to be processed, and the subsequent developer expanding process is performed with the number of rotations of the wafer to be processed being reduced to half or less. As a result, the centrifugal force is suppressed, and the developer does not shift to the outer peripheral portion of the wafer to be processed. As a result, the development reaction starting immediately after the liquid buildup is made as uniform as possible. In the subsequent developer agitation step, the developing reaction is made uniform, and a desired resist pattern appears by the cleaning step. As a result, it is possible to provide a method of manufacturing a semiconductor device and a spin coating apparatus for developing a resist pattern that further improves the uniformity of pattern dimensions.

第1実施形態に係る半導体装置の製造方法の要部を順に示す各概観図。FIG. 3 is a general view sequentially illustrating main parts of the method for manufacturing the semiconductor device according to the first embodiment. 第2実施形態に係る半導体装置の製造方法の要部を順に示す各概観図。Each outline figure which shows the principal part of the manufacturing method of the semiconductor device which concerns on 2nd Embodiment in order. 現像に関するウェハの回転数変化を示すシーケンス特性図。The sequence characteristic view which shows the rotation speed change of the wafer regarding development. 本発明適用の最適化値を模索するための実験に関係する第1図。FIG. 1 is related to an experiment for searching for an optimization value of application of the present invention. 本発明適用の最適化値を模索するための実験に関係する第2図。FIG. 2 relates to an experiment for searching for an optimization value applied to the present invention. 本発明適用の最適化値を模索するための実験に関係する第3図。FIG. 3 is related to an experiment for searching for an optimization value applied to the present invention. 本発明適用の最適化値を模索するための実験に関係する第4図。FIG. 4 is related to an experiment for searching for an optimization value applied to the present invention. 本発明適用の最適化値を模索するための実験に関係する第5図。FIG. 5 is related to an experiment for searching for an optimization value applied to the present invention. 本発明適用の最適化値を模索するための実験に関係する第6図。FIG. 6 is related to an experiment for searching for an optimization value applied to the present invention. 本発明適用の最適化値を模索するための実験に関係する第7図。FIG. 7 relates to an experiment for searching for an optimization value applied to the present invention. 第3実施形態に係るスピン塗布装置の構成を示すブロック図。The block diagram which shows the structure of the spin-coating apparatus which concerns on 3rd Embodiment.

符号の説明Explanation of symbols

10…スピン塗布装置、11…スピンチャック、12…駆動部、13…制御機構、15…現像液吐出ノズル、16…現像液、17…洗浄液吐出ノズル、RS…レジスト、WF…被処理ウェハ。   DESCRIPTION OF SYMBOLS 10 ... Spin coating apparatus, 11 ... Spin chuck, 12 ... Drive part, 13 ... Control mechanism, 15 ... Developer discharge nozzle, 16 ... Developer, 17 ... Cleaning liquid discharge nozzle, RS ... Resist, WF ... Wafer to be processed.

Claims (9)

表面のレジストが露光された被処理ウェハを回転させながら前記レジストの表面へ現像液を塗布し、前記レジストを現像して所定のレジストパターンを現出させる半導体装置の製造方法において、
前記被処理ウェハにおける前記レジスト上へ前記現像液が盛られる所定の液盛り時間が設定され、前記液盛り時間内の前記被処理ウェハの回転数に比べ前記液盛り時間経過直後からの前記被処理ウェハの回転数を半分以下に減少させることを特徴とする半導体装置の製造方法。
In the method of manufacturing a semiconductor device, a developer is applied to the surface of the resist while rotating the wafer to be processed on which the resist on the surface is exposed, and the resist is developed to reveal a predetermined resist pattern.
A predetermined liquid accumulation time during which the developer is deposited on the resist in the wafer to be processed is set, and the object to be processed immediately after the liquid accumulation time has elapsed compared to the number of rotations of the wafer to be processed within the liquid accumulation time. A method of manufacturing a semiconductor device, wherein the number of rotations of a wafer is reduced to half or less.
前記被処理ウェハの回転数は、所定量の前記現像液が前記被処理ウェハの外周部まで広がる直前に低下し、前記現像液がより緩やかに前記被処理ウェハの外周部に広がっていくように最適化されることを特徴とする請求項1記載の半導体装置の製造方法。 The number of rotations of the wafer to be processed is decreased immediately before the predetermined amount of the developing solution spreads to the outer peripheral portion of the wafer to be processed, and the developing solution spreads more gently to the outer peripheral portion of the wafer to be processed. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the method is optimized. 表面のレジストが露光された被処理ウェハについて第1の回転数で回転させながらレジスト表面に所定量の現像液を吐出し前記現像液を前記被処理ウェハの外周部に向かって広げる現像液盛り工程と、
前記被処理ウェハを前記第1の回転数より低い第2の回転数で回転させ、前記レジスト表面の前記所定量の現像液をより緩やかに前記被処理ウェハの外周部まで広げる現像液拡張工程と、
前記被処理ウェハについて前記第2の回転数と同等かより高い第3の回転数でもって回転及び停止を繰り返し、前記現像液を前記レジスト表面全域に攪拌する現像液攪拌工程と、
前記被処理ウェハを前記第3の回転数より高い第4の回転数で回転させながら、現像反応後の前記レジスト表面に洗浄液を供給して前記現像液を含む反応生成物を除去し、レジストパターンを現出する洗浄工程と、
を含む半導体装置の製造方法。
A developing solution assembling step in which a predetermined amount of developing solution is discharged onto the resist surface while rotating the wafer to be processed on which the resist on the surface is exposed at a first rotational speed, and the developing solution is spread toward the outer peripheral portion of the processing target wafer. When,
A developer expansion step of rotating the wafer to be processed at a second rotation speed lower than the first rotation speed and spreading the predetermined amount of the developer on the resist surface more gently to the outer periphery of the wafer to be processed; ,
A developer stirring step of repeatedly rotating and stopping the wafer to be processed at a third rotation speed equal to or higher than the second rotation speed, and stirring the developer over the entire resist surface;
While rotating the wafer to be processed at a fourth rotational speed higher than the third rotational speed, a cleaning solution is supplied to the resist surface after the development reaction to remove a reaction product containing the developer, and a resist pattern Cleaning process to reveal
A method of manufacturing a semiconductor device including:
前記現像液盛り工程は、所定量の前記現像液が前記被処理ウェハの外周部まで広がる直前までの所定時間だけ設けられた後、前記現像液拡張工程に移行し、前記現像液拡張工程は、前記被処理ウェハの中心部と外周部における前記現像液の高低差がより小さく抑えられるように、前記所定時間、前記第1の回転数と前記第2の回転数を最適化することを特徴とする請求項3記載の半導体装置の製造方法。 The developer stacking step is provided only for a predetermined time until a predetermined amount of the developer spreads to the outer peripheral portion of the wafer to be processed, and then proceeds to the developer expanding step. The first rotation speed and the second rotation speed are optimized for the predetermined time so that a difference in height of the developing solution between a central portion and an outer peripheral portion of the wafer to be processed can be suppressed to be smaller. A method of manufacturing a semiconductor device according to claim 3. 前記第2の回転数は前記第1の回転数の1/3以下にされることを特徴とする請求項3または4記載の半導体装置の製造方法。 5. The method of manufacturing a semiconductor device according to claim 3, wherein the second rotational speed is set to 1/3 or less of the first rotational speed. 前記被処理ウェハを前記第4の回転数より高い第5の回転数で回転させながら前記レジストパターン表面を乾燥させる乾燥工程をさらに含む請求項3〜5いずれか一つに記載の半導体装置の製造方法。 The semiconductor device manufacturing method according to claim 3, further comprising a drying step of drying the resist pattern surface while rotating the wafer to be processed at a fifth rotation number higher than the fourth rotation number. Method. 被処理ウェハが載置され回転可能な保持部と、
前記保持部を所定の回転数で回転させる駆動部と、
前記被処理ウェハの主表面に所定の薬液を一定時間に定量供給する薬液吐出ノズルと、
前記被処理ウェハの主表面に所定の洗浄液を供給する洗浄液吐出ノズルと、
少なくとも前記薬液を前記被処理ウェハの主表面に広げる段階において前記駆動部を制御し前記薬液吐出ノズルの薬液吐出時と薬液吐出直後とで前記保持部の回転数を変化させる制御機構と、
を含むスピン塗布装置。
A holding unit on which a wafer to be processed is placed and rotatable;
A drive unit that rotates the holding unit at a predetermined rotational speed;
A chemical solution discharge nozzle for supplying a predetermined amount of a predetermined chemical solution to the main surface of the wafer to be processed at a constant time;
A cleaning liquid discharge nozzle for supplying a predetermined cleaning liquid to the main surface of the wafer to be processed;
A control mechanism for controlling the drive unit at the stage of spreading at least the chemical liquid on the main surface of the wafer to be processed and changing the number of rotations of the holding unit between when the chemical liquid discharge nozzle discharges the chemical liquid and immediately after the chemical liquid discharge;
A spin coater comprising:
前記被処理ウェハの主表面は露光されたレジスト表面であり、前記薬液は現像液であることを特徴とする請求項7記載のスピン塗布装置。 8. The spin coating apparatus according to claim 7, wherein the main surface of the wafer to be processed is an exposed resist surface, and the chemical solution is a developer. 表面のレジストが露光された被処理ウェハが載置され回転可能な保持部と、
前記保持部を所定の回転数で回転させる駆動部と、
前記被処理ウェハの主表面に現像液を定量供給する現像液吐出ノズルと、
前記被処理ウェハの主表面を洗浄するための洗浄液吐出ノズルと、
少なくとも前記現像液吐出ノズルにおける現像液盛り時間と現像液盛り時の回転数及び現像液盛り直後の回転数に関し、前記被処理ウェハの中心部と外周部における前記現像液の高低差がより小さく抑えられるように最適化された制御機構と、
を含むスピン塗布装置。
A holding unit on which a wafer to be processed on which a resist on the surface is exposed is placed and rotatable;
A drive unit that rotates the holding unit at a predetermined rotational speed;
A developer discharge nozzle for supplying a constant amount of developer to the main surface of the wafer to be processed;
A cleaning liquid discharge nozzle for cleaning the main surface of the wafer to be processed;
At least with respect to the developer deposition time at the developer discharge nozzle, the rotation speed at the time of developer deposition, and the rotation speed immediately after the developer deposition, the difference in height of the developer between the central portion and the outer peripheral portion of the wafer to be processed is suppressed to a smaller level. A control mechanism optimized to
A spin coater comprising:
JP2005014035A 2005-01-21 2005-01-21 Method for manufacturing semiconductor device and spin coating device Withdrawn JP2006203041A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005014035A JP2006203041A (en) 2005-01-21 2005-01-21 Method for manufacturing semiconductor device and spin coating device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005014035A JP2006203041A (en) 2005-01-21 2005-01-21 Method for manufacturing semiconductor device and spin coating device

Publications (1)

Publication Number Publication Date
JP2006203041A true JP2006203041A (en) 2006-08-03

Family

ID=36960744

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005014035A Withdrawn JP2006203041A (en) 2005-01-21 2005-01-21 Method for manufacturing semiconductor device and spin coating device

Country Status (1)

Country Link
JP (1) JP2006203041A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007194454A (en) * 2006-01-20 2007-08-02 Seiko Epson Corp Method of development of resist and method of manufacturing semiconductor device
JP2009231618A (en) * 2008-03-24 2009-10-08 Sokudo Co Ltd Development apparatus and development method
JP2010199323A (en) * 2009-02-25 2010-09-09 Tokyo Electron Ltd Developing device and developing method
CN102259083A (en) * 2011-01-19 2011-11-30 沈阳芯源微电子设备有限公司 Spin-coating method of thick film used in semiconductor packaging
TWI406108B (en) * 2008-03-24 2013-08-21 Sokudo Co Ltd Developing apparatus and developing method
JP2017073522A (en) * 2015-10-09 2017-04-13 東京エレクトロン株式会社 Substrate processing method, substrate processing apparatus and storage medium
JP2018174332A (en) * 2018-06-06 2018-11-08 東京エレクトロン株式会社 Substrate processing method, substrate processing apparatus and storage medium

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007194454A (en) * 2006-01-20 2007-08-02 Seiko Epson Corp Method of development of resist and method of manufacturing semiconductor device
JP2009231618A (en) * 2008-03-24 2009-10-08 Sokudo Co Ltd Development apparatus and development method
TWI406108B (en) * 2008-03-24 2013-08-21 Sokudo Co Ltd Developing apparatus and developing method
JP2010199323A (en) * 2009-02-25 2010-09-09 Tokyo Electron Ltd Developing device and developing method
CN102259083A (en) * 2011-01-19 2011-11-30 沈阳芯源微电子设备有限公司 Spin-coating method of thick film used in semiconductor packaging
JP2017073522A (en) * 2015-10-09 2017-04-13 東京エレクトロン株式会社 Substrate processing method, substrate processing apparatus and storage medium
JP2018174332A (en) * 2018-06-06 2018-11-08 東京エレクトロン株式会社 Substrate processing method, substrate processing apparatus and storage medium

Similar Documents

Publication Publication Date Title
JP2006203041A (en) Method for manufacturing semiconductor device and spin coating device
US11150558B2 (en) Developing method
US6265323B1 (en) Substrate processing method and apparatus
JP2007019161A (en) Pattern forming method and coated film forming apparatus
JP7292570B2 (en) System and method for adjusting resist film thickness
US7883840B2 (en) Developing method and method for fabricating semiconductor device using the developing method
JP2007318087A (en) Developing device, development processing method, development processing program, and computer-readable recording medium with program recorded thereon
JP2016111345A (en) Development processing method, computer storage medium and development processing device
JP2009207984A (en) Coating treatment method, program, computer storage medium, and coating treatment apparatus
JP6654534B2 (en) Substrate processing apparatus and substrate processing method
JP2009004597A (en) Substrate development method and developing apparatus
JP2009231618A (en) Development apparatus and development method
JP4919409B2 (en) Semiconductor device manufacturing method
JP2010278204A (en) Method for forming resist pattern
JP2731752B2 (en) Processing method of resist film
JP7136543B2 (en) Substrate processing method and substrate processing apparatus
JP2006073854A (en) Method for applying photo-resist solution, method for forming photo-resist pattern and method for manufacturing semiconductor device
JP2011023387A (en) Forming method of resist film
JP2005197455A (en) Developing method in process of manufacturing semiconductor device and developing device executing this
JP4490555B2 (en) Photoresist layer development method
JP2011077120A (en) Method of developing resist film
JP2010073895A (en) Method for manufacturing semiconductor device
JP2007194454A (en) Method of development of resist and method of manufacturing semiconductor device
JP4492931B2 (en) Method for forming photoresist pattern
JP2004228107A (en) Developing method

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20071029

A761 Written withdrawal of application

Free format text: JAPANESE INTERMEDIATE CODE: A761

Effective date: 20090610