JP2006114913A - 薄膜トランジスタ及びその製造方法 - Google Patents
薄膜トランジスタ及びその製造方法 Download PDFInfo
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- 239000010409 thin film Substances 0.000 title claims abstract description 90
- 238000004519 manufacturing process Methods 0.000 title claims description 41
- 239000010408 film Substances 0.000 claims abstract description 117
- 239000000758 substrate Substances 0.000 claims abstract description 93
- 229910052594 sapphire Inorganic materials 0.000 claims abstract description 51
- 239000010980 sapphire Substances 0.000 claims abstract description 51
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 103
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 54
- 238000000034 method Methods 0.000 claims description 51
- 239000002019 doping agent Substances 0.000 claims description 12
- 238000000348 solid-phase epitaxy Methods 0.000 claims description 9
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 5
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 5
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 5
- 230000001678 irradiating effect Effects 0.000 claims description 4
- 229910021419 crystalline silicon Inorganic materials 0.000 abstract 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 38
- 238000000407 epitaxy Methods 0.000 description 9
- 238000005530 etching Methods 0.000 description 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 8
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 8
- 229910052710 silicon Inorganic materials 0.000 description 8
- 239000010703 silicon Substances 0.000 description 8
- 238000005498 polishing Methods 0.000 description 4
- 238000002425 crystallisation Methods 0.000 description 3
- 230000008025 crystallization Effects 0.000 description 3
- 230000006870 function Effects 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000005549 size reduction Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000000038 ultrahigh vacuum chemical vapour deposition Methods 0.000 description 1
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Abstract
【解決手段】薄膜トランジスタは、透明なサファイア基板10と、サファイア基板10の所定領域を覆うSi02膜と、Si02膜上に形成されており、ソース領域20a1、ドレイン領域20a3及びチャンネル領域20a2を備える単結晶シリコン層20aと、
単結晶シリコン層20aのチャンネル領域20a2上に順次積層されたゲート絶縁膜26及びゲート電極28と、を備えている。
【選択図】図1
Description
また、本発明の薄膜トランジスタのチャンネル領域は、単結晶シリコン層からなっており、絶縁膜から引張応力を受ける。したがって、従来に比べてキャリアの移動度を向上させることができるため、高速動作が可能となる。
また、本発明の薄膜トランジスタの各領域は、均一な厚さに成長した単結晶シリコン層に形成されるため、基板上に薄膜トランジスタを均一に形成することができる。これにより、薄膜トランジスタの集積度を向上させることができ、小型化が実現される。
また、本発明の薄膜トランジスタの製造方法によれば、高速動作が可能であり、小型化が可能な薄膜トランジスタを製造することができる。
単結晶シリコン層20aは、20〜200nmの厚さであることが好ましく、30〜100nmの厚さであることがより好ましい。20〜200nmの厚さであれば、所望の性能を有する薄膜トランジスタを得ることができ、30〜100nmの厚さであれば、より高性能な薄膜トランジスタを得ることができる。
単結晶シリコンアイランド36aは、20〜200nmされることが好ましく、30〜100nmの厚さに形成されることがより好ましい。
また、本発明の各実施形態に係る薄膜トランジスタのチャンネル領域は、単結晶シリコン層からなっており、絶縁膜(例えば、SiO2膜またはSiN膜)から引張応力を受ける。したがって、従来に比べてキャリアの移動度を向上させることができるので、高速動作が可能となる。
また、本発明の各実施形態に係る薄膜トランジスタが形成されたサファイア基板は、シリコンバルク基板(silicon bulk substrate)よりも非常に高い熱伝導性を有している。したがって、本発明の各実施形態に係る薄膜トランジスタは、より安定的に動作することができる。
また、本発明の各実施形態に係る薄膜トランジスタは、均一な厚さに成長した単結晶シリコン層上に形成されるため、基板上に均一に形成可能である。これにより、薄膜トランジスタの集積度を従来よりも向上させることができ、薄膜トランジスタの小型化が実現される。
12 SiO2膜(絶縁膜)
20a 単結晶シリコン層
20a1 第1領域(ソース領域及びドレイン領域の一方)
20a2 第2領域(チャンネル領域)
20a3 第3領域(ソース領域及びドレイン領域の他方)
26 ゲート絶縁膜
28 ゲート電極
Claims (17)
- 透明基板と、
前記透明基板の所定領域を覆う絶縁膜と、
前記絶縁膜上に形成されており、ソース領域、ドレイン領域及びチャンネル領域を備える単結晶シリコン層と、
前記単結晶シリコン層の前記チャンネル領域上に順次積層されたゲート絶縁膜及びゲート電極と、
を備えることを特徴とする薄膜トランジスタ。 - 前記透明基板の前記所定領域は、所定厚さだけ除去されており、
除去された部分が、前記絶縁膜で満たされていることを特徴とする請求項1に記載の薄膜トランジスタ。 - 前記絶縁膜は、前記透明基板の前記所定領域上に形成されていることを特徴とする請求項1に記載の薄膜トランジスタ。
- 前記絶縁膜は、シリコン酸化膜及びシリコン窒化膜のいずれか一つであることを特徴とする請求項1から請求項3のいずれか一項に記載の薄膜トランジスタ。
- 前記透明基板は、サファイア基板であることを特徴とする請求項1から請求項4のいずれか一項に記載の薄膜トランジスタ。
- 透明基板上に、前記透明基板の所定領域を覆う絶縁膜を形成する第1工程と、
前記絶縁膜上に単結晶シリコン層を形成する第2工程と、
前記単結晶シリコン層の所定領域上に、ゲート絶縁膜及びゲート電極を順次形成する第3工程と、
前記ゲート電極の周りの前記単結晶シリコン層に、ドーパントを注入する第4工程と、
を含むことを特徴とする薄膜トランジスタの製造方法。 - 前記第1工程は、
前記透明基板の前記所定領域に溝を形成する工程と、
前記溝を前記絶縁膜で満たす工程と、
を含むことを特徴とする請求項6に記載の薄膜トランジスタの製造方法。 - 前記第1工程において、
前記絶縁膜は、前記透明基板の前記所定領域上に形成されることを特徴とする請求項6に記載の薄膜トランジスタの製造方法。 - 前記第2工程は、
前記絶縁膜の周りの前記透明基板上に単結晶シリコン層を形成する第2a工程と、
前記絶縁膜及び前記第2a工程で形成された前記単結晶シリコン層上に非晶質シリコン層を形成する第2b工程と、
前記絶縁膜上に形成された前記非晶質シリコン層を結晶化させることにより単結晶シリコン層を形成する第2c工程と、
前記絶縁膜の周りの前記単結晶シリコン層を除去する第2d工程と、
を含むことを特徴とする請求項7に記載の薄膜トランジスタの製造方法。 - 前記第2c工程は、
前記第2a工程で形成された前記単結晶シリコン層上に形成された前記非晶質シリコン層を結晶化させることにより単結晶シリコン層を形成する第2c1工程と、
前記第2c1工程で形成された前記単結晶シリコン層と、前記絶縁膜上に形成された前記非晶質シリコン層とにレーザーを照射する第2c2工程と、
を含むことを特徴とする請求項9に記載の薄膜トランジスタの製造方法。 - 前記第2c1工程において、
前記単結晶シリコン層上に形成された前記非晶質シリコン層を、固相エピタキシー法を利用して結晶化させることにより単結晶シリコン層を形成することを特徴とする請求項10に記載の薄膜トランジスタの製造方法。 - 前記第2工程は、
前記絶縁膜の周りの前記透明基板上に前記絶縁膜と同じ高さに単結晶シリコン層を形成する第2a工程と、
前記絶縁膜及び前記第2a工程で形成された前記単結晶シリコン層上に非晶質シリコン層を形成する第2b工程と、
前記絶縁膜上に形成された前記非晶質シリコン層を結晶化させることにより単結晶シリコン層を形成する第2c工程と、
前記絶縁膜の周りの前記単結晶シリコン層を除去する第2d工程と、
を含むことを特徴とする請求項8に記載の薄膜トランジスタの製造方法。 - 前記第2c工程は、
前記第2a工程で形成された前記単結晶シリコン層上に形成された非晶質シリコン層を結晶化させることにより単結晶シリコン層を形成する第2c1工程と、
前記第2c1工程で形成された前記単結晶シリコン層と、前記絶縁膜上に形成された前記非晶質シリコン層とに、レーザーを照射する第2c2工程と、
を含むことを特徴とする請求項12に記載の薄膜トランジスタの製造方法。 - 前記第2c1工程において、
前記単結晶シリコン層上に形成された前記非晶質シリコン層を、固相エピタキシー法を利用して結晶化させることにより単結晶シリコン層を形成することを特徴とする請求項13に記載の薄膜トランジスタの製造方法。 - 前記第2c工程において、前記非晶質シリコン層を結晶化させることにより前記絶縁膜上に形成される前記単結晶シリコン層は、20〜200nmの厚さに形成されることを特徴とする請求項9から請求項14のいずれか一項に記載の薄膜トランジスタの製造方法。
- 前記絶縁膜は、シリコン酸化膜及びシリコン窒化膜のいずれか一つから形成されることを特徴とする請求項6から請求項15のいずれか一項に記載の薄膜トランジスタの製造方法。
- 前記透明基板は、サファイア基板であることを特徴とする請求項6から請求項16のいずれか一項に記載の薄膜トランジスタの製造方法。
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JP4603845B2 (ja) * | 2004-10-12 | 2010-12-22 | Okiセミコンダクタ株式会社 | 半導体装置の製造方法 |
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US7790540B2 (en) | 2006-08-25 | 2010-09-07 | International Business Machines Corporation | Structure and method to use low k stress liner to reduce parasitic capacitance |
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