JP2005347355A - 回路装置およびその製造方法 - Google Patents
回路装置およびその製造方法 Download PDFInfo
- Publication number
- JP2005347355A JP2005347355A JP2004162654A JP2004162654A JP2005347355A JP 2005347355 A JP2005347355 A JP 2005347355A JP 2004162654 A JP2004162654 A JP 2004162654A JP 2004162654 A JP2004162654 A JP 2004162654A JP 2005347355 A JP2005347355 A JP 2005347355A
- Authority
- JP
- Japan
- Prior art keywords
- insulating layer
- conductive pattern
- filler
- circuit board
- circuit device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
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Abstract
【解決手段】 本発明の回路装置10は、第1の導電パターン18Aおよび第2の導電パターン18Bとを有する複数層の配線構造が、回路基板16の表面に形成されている。回路基板の表面全域には第1の絶縁層17Aが形成される。第1の導電パターン18Aと第2の導電パターン18Bとは、第2の絶縁層17Bにより絶縁される。第2の絶縁層17Bに含まれるフィラーは、第1の絶縁層17Aに含まれるフィラーよりも少量であり、その径が小さい。従って、第2の絶縁層17Bを貫通して、両導電パターンを接続するのが容易になる。
【選択図】図1
Description
11 リード
12 封止樹脂
14 回路素子
15 金属細線
16 回路基板
17A 第1の絶縁層
17B 第2の絶縁層
18A 第1の導電パターン
18B 第2の導電パターン
Claims (10)
- 回路基板と、前記回路基板の表面に形成された第1の絶縁層と、前記第1の絶縁層の表面に形成された第1の導電パターンと、前記第1の導電パターンを被覆する第2の絶縁層と、前記第2の絶縁層を介して前記第1の導電パターンの上に積層された第2の導電パターンとを具備し、
前記各絶縁層にはフィラーを充填し、
前記第1の前記絶縁層には、前記第2の前記絶縁層よりも多量の前記フィラーを混入させることを特徴とする回路装置。 - 回路基板と、前記回路基板の表面に形成された第1の絶縁層と、前記第1の絶縁層の表面に形成された第1の導電パターンと、前記第1の導電パターンを被覆する第2の絶縁層と、前記第2の絶縁層を介して前記第1の導電パターンの上に積層された第2の導電パターンとを具備し、
前記各絶縁層にはフィラーを混入し、
前記第1の絶縁層に含まれる前記フィラーの平均粒径は、前記第2の前記絶縁層に含まれる前記フィラーの平均粒径よりも大きいことを特徴とする回路装置。 - 前記第2の絶縁層の所望の箇所を貫通して前記第1の導電パターンと前記第2の導電パターンとを接続する接続部を設けることを特徴とする請求項1または請求項2記載の回路装置。
- 前記第1の導電パターンと前記第2の導電パターンとは、平面的に交差することを特徴とする請求項1または請求項2記載の回路装置。
- 前記回路基板は金属から成ることを特徴とする請求項1または請求項2記載の回路装置。
- 前記第2の導電パターンと電気的に接続される回路素子を具備することを特徴とする請求項1または請求項2記載の回路装置。
- 前記回路素子が固着される領域の下方に、前記第2の導電パターンと前記第1の導電パターンとを熱的に結合するサーマルビアを設けることを特徴とする請求項6記載の回路装置。
- 回路基板を用意する工程と、
前記回路基板の表面に、フィラーが混入された第1の絶縁層を形成する工程と、
前記第1の絶縁層の表面に第1の導電パターンを形成する工程と、
前記第1の絶縁層よりもフィラーの含有量が少ない第2の絶縁層を、前記第1の導電パターンを覆うように形成する工程と、
前記第2の絶縁層を貫通して前記第1の導電パターンと電気的に接続された第2の導電パターンを形成する工程とを具備することを特徴とする回路装置の製造方法。 - 回路基板を用意する工程と、
前記回路基板の表面に、フィラーが混入された第1の絶縁層を形成する工程と、
前記第1の絶縁層の表面に第1の導電パターンを形成する工程と、
前記第1の絶縁層よりも含有されるフィラーの粒径が小さい第2の絶縁層を、前記第1の導電パターンを覆うように形成する工程と、
前記第2の絶縁層を貫通して前記第1の導電パターンと電気的に接続された第2の導電パターンを形成する工程とを具備することを特徴とする回路装置の製造方法。 - レーザーを照射させることにより、前記第2の絶縁層を貫通することを特徴とする請求項8または請求項9記載の回路装置の製造方法。
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JP2004162654A JP4383257B2 (ja) | 2004-05-31 | 2004-05-31 | 回路装置およびその製造方法 |
TW94113212A TWI301680B (en) | 2004-05-31 | 2005-04-26 | Circuit device and manufacturing method thereof |
KR20050043633A KR100661946B1 (ko) | 2004-05-31 | 2005-05-24 | 회로 장치 및 그 제조 방법 |
US11/139,263 US7221049B2 (en) | 2004-05-31 | 2005-05-27 | Circuit device and manufacturing method thereof |
CNB2005100747148A CN100388469C (zh) | 2004-05-31 | 2005-05-31 | 电路装置及其制造方法 |
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JP2009239147A (ja) * | 2008-03-28 | 2009-10-15 | Toshiba Corp | 集積半導体装置及び集積3次元半導体装置 |
JP2020004765A (ja) * | 2018-06-25 | 2020-01-09 | 株式会社エヌソリューション | パワー半導体モジュール用パッケージの製造方法およびパワー半導体モジュール用パッケージ |
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JP4524454B2 (ja) * | 2004-11-19 | 2010-08-18 | ルネサスエレクトロニクス株式会社 | 電子装置およびその製造方法 |
KR100717801B1 (ko) * | 2005-12-19 | 2007-05-11 | 삼성에스디아이 주식회사 | 이차 전지 |
US7957158B2 (en) * | 2006-10-31 | 2011-06-07 | Sanyo Electric Co., Ltd. | Circuit device |
KR101011199B1 (ko) * | 2007-11-01 | 2011-01-26 | 파나소닉 주식회사 | 실장 구조체 |
JP2009117450A (ja) * | 2007-11-02 | 2009-05-28 | Rohm Co Ltd | モジュールおよびその製造方法 |
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US6233817B1 (en) * | 1999-01-17 | 2001-05-22 | Delphi Technologies, Inc. | Method of forming thick-film hybrid circuit on a metal circuit board |
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TW511422B (en) * | 2000-10-02 | 2002-11-21 | Sanyo Electric Co | Method for manufacturing circuit device |
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2004
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2005
- 2005-04-26 TW TW94113212A patent/TWI301680B/zh not_active IP Right Cessation
- 2005-05-24 KR KR20050043633A patent/KR100661946B1/ko not_active IP Right Cessation
- 2005-05-27 US US11/139,263 patent/US7221049B2/en active Active
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Cited By (3)
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JP2009239147A (ja) * | 2008-03-28 | 2009-10-15 | Toshiba Corp | 集積半導体装置及び集積3次元半導体装置 |
JP4538058B2 (ja) * | 2008-03-28 | 2010-09-08 | 株式会社東芝 | 集積半導体装置及び集積3次元半導体装置 |
JP2020004765A (ja) * | 2018-06-25 | 2020-01-09 | 株式会社エヌソリューション | パワー半導体モジュール用パッケージの製造方法およびパワー半導体モジュール用パッケージ |
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KR20060049443A (ko) | 2006-05-19 |
CN100388469C (zh) | 2008-05-14 |
CN1705105A (zh) | 2005-12-07 |
TW200541125A (en) | 2005-12-16 |
TWI301680B (en) | 2008-10-01 |
KR100661946B1 (ko) | 2006-12-28 |
US7221049B2 (en) | 2007-05-22 |
JP4383257B2 (ja) | 2009-12-16 |
US20050263880A1 (en) | 2005-12-01 |
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