JP2005251779A - Adhesive film and semiconductor device using the same - Google Patents
Adhesive film and semiconductor device using the same Download PDFInfo
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- JP2005251779A JP2005251779A JP2004055892A JP2004055892A JP2005251779A JP 2005251779 A JP2005251779 A JP 2005251779A JP 2004055892 A JP2004055892 A JP 2004055892A JP 2004055892 A JP2004055892 A JP 2004055892A JP 2005251779 A JP2005251779 A JP 2005251779A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Abstract
Description
本発明は、接着フィルムおよびそれを用いた半導体装置に関する。さらに詳しくは、素子積層ＩＣパッケージにおいてほぼ同サイズの素子を積層する場合にワイヤループの空間を確保するための接着フィルムに関する。 The present invention relates to an adhesive film and a semiconductor device using the adhesive film. More specifically, the present invention relates to an adhesive film for securing a wire loop space when elements of almost the same size are stacked in an element stacked IC package.
近年、ＩＣパッケージの高密度実装化の要請に伴い、チップを複数積層する手法が取り入れられている。このタイプのパッケージで、ほぼ同サイズの素子を積層する場合に、電気的接続に用いられる金ワイヤのループ空間上に位置するチップが金ワイヤと接触しないように、チップより小さいサイズのダミーのシリコン片をスペーサとして積層する手法がある。しかしこのシリコンスペーサは、薄削りし、ダイアタッチフィルムを貼り付けたのち、ダイシングしてマウントする必要があり、原料が高価でありかつ、作成に手間、コストがかかる。
本発明は、前記の問題を解決することを課題とし、シリコンスペーサより低コストでハンドリングの良いスペーサ（接着テープ）を提供することを目的とする。 An object of the present invention is to provide a spacer (adhesive tape) that is lower in cost and better in handling than a silicon spacer.
本発明者等は鋭意検討した結果、本発明を完成した。
すなわち、本発明は、次の（I）または（II）に記載の内容を包含する。
（I） 260℃での貯蔵弾性率を1ＭＰａ以上に改質したポリオレフィンフィルムの少なくとも片面に接着材層が形成されていることを特徴とする接着フィルム。
（II) 電子線照射により改質したことを特徴とする（I)に記載の接着フィルム。
（III）（I）に記載の接着フィルムの接着材層を介してチップが接着されていることを特徴とする半導体装置。
As a result of intensive studies, the present inventors have completed the present invention.
That is, this invention includes the content as described in following (I) or (II).
(I) An adhesive film characterized in that an adhesive layer is formed on at least one surface of a polyolefin film whose storage elastic modulus at 260 ° C. is modified to 1 MPa or more.
(II) The adhesive film as described in (I), which is modified by electron beam irradiation.
(III) A semiconductor device, wherein a chip is bonded via an adhesive layer of the adhesive film described in (I).
本発明の接着フィルムをスペーサとして用いることで、素子積層パッケージを低コストで生産できる。 By using the adhesive film of the present invention as a spacer, an element stack package can be produced at low cost.
スペーサとして用いる接着フィルムに要求される特性としては、半導体パッケージ材料の信頼性を確保する上で、組み立て工程を歩留まり良く流れること、長期信頼性の加速テストに耐えることなどが要求される。組み立て工程における耐吸湿リフローの面では、吸湿率が低いこと、リフロー温度で水蒸気圧以上の弾性率を有し膨れないこと、周辺材料と強い強度で接着できることなどが挙げられる。また、長期信頼性の加速テストにおける高温高湿下での電気的長期信頼性の面ではイオン性不純物量が少ないこと、などが挙げられる。パッケージ設計の面では、厚み精度に優れることが求められる。 The characteristics required of the adhesive film used as the spacer are required to flow through the assembly process with a high yield and withstand a long-term reliability acceleration test in order to ensure the reliability of the semiconductor package material. In terms of moisture absorption and reflow resistance in the assembly process, the moisture absorption rate is low, the elastic modulus is equal to or higher than the water vapor pressure at the reflow temperature, and it cannot be swollen. In addition, the amount of ionic impurities is low in terms of electrical long-term reliability under high temperature and high humidity in the accelerated test of long-term reliability. In terms of package design, excellent thickness accuracy is required.
このような材料的要求を満たす物質として、ポリオレフィンは吸湿率が低くて、フィルム形成も容易で低コストであり好ましい。しかしリフロー温度のような高温では溶融発泡する場合があり、好ましくないので、架橋密度を上げて、少なくとも260℃での貯蔵弾性率が１ＭＰａ以上、より好ましくは５MＰａ以上に改質したものを使用するのが好適である。架橋密度を上げる方法は、電子線照射が好ましい。電子線照射の条件としては、フィルム物性をほぼ均質にすることが好ましいので、電子線の平均飛程がフィルム厚より長くなるよう、また線量はフィルム物性が上記のような高温弾性率を示すように調整する。
電子線照射により表面に接着材に対して親和性の良い官能基が形成されるが、さらにコロナ処理などの表面処理を施すことで接着界面の接着性を改質しても良い。
As a substance that satisfies such material requirements, polyolefin is preferable because it has a low moisture absorption rate, is easy to form a film, and is low in cost. However, since melt foaming may occur at a high temperature such as the reflow temperature, it is not preferable. Therefore, a cross-linked density is increased and a storage elastic modulus at least at 260 ° C. is modified to 1 MPa or more, more preferably 5 MPa or more. Is preferred. The method for increasing the crosslinking density is preferably electron beam irradiation. As the electron beam irradiation conditions, it is preferable that the film physical properties are almost uniform, so that the average range of the electron beam is longer than the film thickness, and the dose is such that the film physical properties exhibit the above high temperature elastic modulus. Adjust to.
Although a functional group having a good affinity for the adhesive is formed on the surface by electron beam irradiation, the adhesiveness of the adhesive interface may be modified by further surface treatment such as corona treatment.
基材の材質としては、オレフィンの共重合体であれば特に限定されない。例えばポリエチレン、ポリプロピレンなどが挙げられる。イオン性や放射性の不純物が少ないフィラーが分散されていても構わない。
スペーサ厚み（接着テープの厚み）は主にワイヤループの設計により決まる。現状では１００〜２００μｍ程度であるが、ワイヤボンディング技術の向上に伴って、スペーサ厚みはより薄くなる可能性がある。
また、ハンドリングの面では、あらかじめ接着材層が基材の片面もしくは両面に形成されているので、実装時に接着材層を形成する工程が省けて好ましい。
The material of the substrate is not particularly limited as long as it is an olefin copolymer. Examples thereof include polyethylene and polypropylene. Fillers with few ionic and radioactive impurities may be dispersed.
The spacer thickness (adhesive tape thickness) is mainly determined by the design of the wire loop. Although it is about 100-200 micrometers at present, the spacer thickness may become thinner with the improvement of the wire bonding technology.
Also, in terms of handling, since the adhesive layer is formed in advance on one or both sides of the substrate, it is preferable to omit the step of forming the adhesive layer during mounting.
接着材層の形成は、ダイボンディングフィルムを形成するのと類似の方法が適用でき、接着材の溶液を精密コーターで基材上にコートし、乾燥炉で溶剤を除く方法や、別途剥離性フィルム上に接着材の溶液を精密コーターでコートし、乾燥炉で溶剤を除いて形成したフィルムを基材にラミネートする方法などで形成できる。
接着材層が粘着性を有する場合は、セパレータにより保護した形態で製品化してもよい。
接着材は、公知のダイボンディングフィルムに使用する接着材で構わない。すなわち、被着体であるシリコン裏面や素子表面のポリイミド、窒化シリコン、基材表面などとの界面接着強度が強く、硬化後のリフロー温度での弾性率が１ＭＰａ以上、より好ましくは５ＭＰａ以上となる接着材が好ましい。接着材としては、例えば公知の特開2002-161250、特許3014578に開示されている熱可塑性樹脂（例えばポリイミド）と熱硬化性樹脂（例えばエポキシ樹脂）を組み合わせた樹脂組成物、特開平11-246829に開示されている熱可塑性樹脂（例えばアクリル系樹脂）と熱硬化性樹脂（例えばエポキシ樹脂）を組み合わせた樹脂組成物などが適用できる。熱可塑性樹脂や、熱硬化性樹脂は特に限定されず、プロセス中最高温度であるリフローの２６０℃で熱分解しない耐熱性や、より低温接着できる特性（より低いＴｇ）などを備えることが好ましい。また、耐熱性を持たせるために、フィラーとして、導電性の金属粉や、非導電性の無機物質粉末を添加することもでき、これらの粒子との接着強度を増すためにカップリング剤を添加してもよい。
接着材層厚みはチップ間に使用する場合、表面凹凸が少ないので２〜５０μｍ、より好ましくは５〜３０μｍ程度が好ましい。
The adhesive layer can be formed by a method similar to that for forming a die bonding film. The adhesive solution is coated on the substrate with a precision coater and the solvent is removed in a drying furnace, or a separate peelable film. The film can be formed by, for example, laminating a film formed by coating an adhesive solution on the top with a precision coater and removing the solvent in a drying furnace.
When the adhesive layer has tackiness, it may be commercialized in a form protected by a separator.
The adhesive may be an adhesive used for a known die bonding film. That is, the adhesion strength of the adherend to the back surface of the silicon, the polyimide on the element surface, silicon nitride, the substrate surface, etc. is strong, and the elastic modulus at the reflow temperature after curing is 1 MPa or more, more preferably 5 MPa or more. An adhesive is preferred. Examples of the adhesive include a resin composition in which a thermoplastic resin (for example, polyimide) and a thermosetting resin (for example, epoxy resin) disclosed in Japanese Patent Laid-Open No. 2002-161250 and Japanese Patent No. 3014578 are combined, and Japanese Patent Laid-Open No. 11-246829. The resin composition etc. which combined the thermoplastic resin (for example, acrylic resin) currently disclosed by 1 and a thermosetting resin (for example, epoxy resin) are applicable. The thermoplastic resin and the thermosetting resin are not particularly limited, and preferably have heat resistance that does not thermally decompose at 260 ° C., which is the highest temperature during the process, and a property that allows low-temperature adhesion (lower Tg). In addition, in order to give heat resistance, conductive metal powder and non-conductive inorganic substance powder can be added as a filler, and a coupling agent is added to increase the adhesive strength with these particles. May be.
When used between chips, the adhesive layer thickness is preferably 2 to 50 [mu] m, more preferably about 5 to 30 [mu] m because there are few surface irregularities.
本発明の接着フィルムをスペーサとして実装するには、例えば指定サイズに切断した個片をダイボンダーで位置決めして接着する方法、指定幅にスリットしたテープ状のスペーサを指定長さにカットしてダイボンダーで位置決めして接着する方法などが挙げられる。接着条件としては、下の素子への応力を考慮して、好ましくは0.1ＭＰａ以下の圧力、接着温度は、好ましくは樹脂が溶融して接着できる温度以上で、より好ましくは100℃以上、接着時間は、効率を考慮して5ｓ以下、より好ましくは1ｓ以下である。
本発明の接着フィルムは、シリコンスペーサのように硬くないので、反らせて貼り付けることができ、接着界面に気泡を巻き込まない工夫ができる面でも優れている。
本発明における半導体素子は、シリコン、ガリウム砒素などの半導体基板上に配線、キャパシタ、ダイオード、トランジスタ、ＩＯパッドなどを形成したものである。
In order to mount the adhesive film of the present invention as a spacer, for example, a method of positioning and bonding a piece cut to a specified size with a die bonder, a tape-like spacer slit to a specified width and cutting to a specified length with a die bonder Examples of the method include positioning and bonding. As the bonding condition, considering the stress to the lower element, the pressure is preferably 0.1 MPa or less, the bonding temperature is preferably the temperature at which the resin can be melted and bonded, more preferably 100 ° C. or more, the bonding time Is 5 s or less, more preferably 1 s or less, considering efficiency.
Since the adhesive film of the present invention is not hard like a silicon spacer, the adhesive film can be warped and pasted, and is excellent in terms of being able to devise not to involve bubbles in the adhesive interface.
The semiconductor element in the present invention is obtained by forming wirings, capacitors, diodes, transistors, IO pads, etc. on a semiconductor substrate such as silicon or gallium arsenide.
本発明に係る半導体装置は、チップ間に本接着フィルムをスペーサとして用いるので、チップが２個以上搭載されたＩＣパッケージである。チップと半導体装置の外部電極の接続はワイヤボンドや直接接続（フリップチップ接続）などを用いてよく、パッケージから外部への配線構造は、従来のリードフレームでも、配線基板でもよい。 The semiconductor device according to the present invention is an IC package in which two or more chips are mounted because the adhesive film is used as a spacer between the chips. The chip and the external electrode of the semiconductor device may be connected by wire bonding or direct connection (flip chip connection). The wiring structure from the package to the outside may be a conventional lead frame or a wiring board.
実施例１
100μｍ厚のポリエチレンフィルム（260℃の貯蔵弾性率は溶融してしまい測定不能）に電子線照射装置で、250ｋVで加速した電子を照射量200ｋＪ/ｋｇで照射した。
電子線で処理したのちのフィルムの貯蔵弾性率を、引っ張りの粘弾性測定装置（レオメトリックス社製ＲＳＡ−II）で測定したところ、260℃での貯蔵弾性率は4ＭＰａであった。
さらに、フィルム両面をコロナ処理した。
電子照射した片面に、接着材ワニスＡを乾燥厚み15μｍになるようにコートし、110〜120℃で３分乾燥した。
接着材ワニスＡの製法は下記のとおりであった。
ODPA（式１）とシリコーンジアミン（式２、中和当量（アミノ価）460）、ＡＰＢ５（式３）を102：56：44のモル比でＮＭＰ（1−メチル−２−ピロリドン）とメシチレン（1,3,5−トリメチルベンゼン）（重量比70/30）の混合溶液中に固形分が４０％になるように仕込み、160〜180℃で10時間共沸脱水縮合してポリイミドワニスＢを得た。
（化１）
A 100 μm thick polyethylene film (the storage elastic modulus at 260 ° C. was melted and could not be measured) was irradiated with electrons accelerated at 250 kV by an electron beam irradiation device at an irradiation dose of 200 kJ / kg.
When the storage elastic modulus of the film after being treated with the electron beam was measured with a tensile viscoelasticity measuring device (RSA-II manufactured by Rheometrics), the storage elastic modulus at 260 ° C. was 4 MPa.
Further, both sides of the film were subjected to corona treatment.
The adhesive varnish A was coated on one side irradiated with electrons so as to have a dry thickness of 15 μm, and dried at 110 to 120 ° C. for 3 minutes.
The manufacturing method of adhesive varnish A was as follows.
ODPA (formula 1) and silicone diamine (formula 2, neutralization equivalent (amino value) 460), APB5 (formula 3) in a molar ratio of 102: 56: 44 NMP (1-methyl-2-pyrrolidone) and mesitylene ( 1,3,5-trimethylbenzene) (weight ratio 70/30) was charged to a solid content of 40%, and azeotropic dehydration condensation was performed at 160 to 180 ° C. for 10 hours to obtain polyimide varnish B. It was.
(Chemical formula 1)
（化２）
（化３）
三井化学製テクモアVG3101L（登録商標）２０重量部をメシチレンに固形分70％になるように溶解したエポキシ樹脂溶液を先に合成したポリイミドワニスB１００重量部（固形分換算）に添加した。硬化剤として四国化成製キュアゾール２ＭＡＯＫ−ＰＷ０.８重量部をＮＭＰで50倍に希釈してポリイミドワニスBに添加した。さらにフィラーとして龍森製１−ＦＸ（溶融シリカ）５５重量部を配合し、粘度2000ｃｐとなるようにメシチレンで希釈してプラネタリーミキサーで混合した。さらに、ビーズミルで分散し、粒子径10μｍの粒子を92％透過するフィルターでろ過したのち、プラネタリーミキサーで真空攪拌し脱泡し、接着材ワニスＡを得た。 An epoxy resin solution in which 20 parts by weight of Mitsui Chemicals' Techmore VG3101L (registered trademark) was dissolved in mesitylene to a solid content of 70% was added to 100 parts by weight of polyimide varnish B synthesized previously (in terms of solid content). As a curing agent, 0.8 part by weight of Shikoku Chemicals Curazole 2MAOK-PW was diluted 50 times with NMP and added to Polyimide Varnish B. Furthermore, 55 parts by weight of 1-FX (fused silica) manufactured by Tatsumori was blended as a filler, diluted with mesitylene so as to have a viscosity of 2000 cp, and mixed with a planetary mixer. Further, the mixture was dispersed with a bead mill, filtered through a filter that passed through 92% of particles having a particle diameter of 10 μm, and then degassed by vacuum stirring with a planetary mixer to obtain an adhesive varnish A.
比較例１
100μｍ厚のポリエチレンフィルムの両面をコロナ処理した。
このフィルムの貯蔵弾性率を、引っ張りの粘弾性測定装置で測定したところ、260℃での貯蔵弾性率は正確に測定できず、少なくとも１×１０４Ｐａ以下と推定された。その片面に、接着材ワニスＡを乾燥厚み15μｍになるようにコートし、110〜120℃、３分の条件で剥離性のテフロン（登録商標）板上で乾燥した。
Comparative Example 1
Both sides of a 100 μm thick polyethylene film were corona treated.
When the storage elastic modulus of this film was measured with a tensile viscoelasticity measuring device, the storage elastic modulus at 260 ° C. could not be measured accurately, and was estimated to be at least 1 × 10 4 Pa or less. The adhesive varnish A was coated on one side so as to have a dry thickness of 15 μm, and dried on a peelable Teflon (registered trademark) plate at 110 to 120 ° C. for 3 minutes.
(実施例２および比較例２)
実施例１と比較例１で製造した接着フィルムをスペーサとして模擬半導体装置に組み込み、フロープロセスでの信頼性を比較した。模擬半導体装置の構造は、リードフレーム材（42アロイ）/接着材ワニスＡからなる厚み２５μｍのフィルム状接着材（8ｍｍ□）/8ｍｍ□、200μｍ厚シリコンチップ/接着フィルム（スペーサ）（5ｍｍ□）/接着材ワニスＡからなる厚み25μｍのフィルム状接着材（8ｍｍ□）/8ｍｍ□、200μｍ厚シリコンチップの積層体をそれぞれ0.1ＭＰａ、150℃、1ｓの条件で熱圧着したのち、封止材で封止した（図１）。
(Example 2 and Comparative Example 2)
The adhesive films manufactured in Example 1 and Comparative Example 1 were incorporated into a simulated semiconductor device as a spacer, and the reliability in the flow process was compared. The structure of the simulated semiconductor device consists of a lead frame material (42 alloy) / adhesive material varnish A with a thickness of 25 μm film adhesive (8 mm □) / 8 mm □, 200 μm thick silicon chip / adhesive film (spacer) (5 mm □) / Adhesive material Varnish A, 25μm thick film adhesive (8mm □) / 8mm □, 200μm thick silicon chip laminates were thermocompression bonded under the conditions of 0.1MPa, 150 ℃ and 1s respectively, Sealed (FIG. 1).
この模擬半導体装置を125℃で24ｈ乾燥し、60℃/60％ＲＨで40ｈ吸湿させ、260℃MAX10ｓホールドのリフロー炉に通した。 This simulated semiconductor device was dried at 125 ° C. for 24 hours, absorbed at 60 ° C./60% RH for 40 hours, and passed through a 260 ° C. MAX10s hold reflow furnace.
模擬半導体装置を超音波顕微鏡で検査したところ、実施例１で製造した接着フィルムを使用した模擬半導体装置では異常はなかったが、比較例１で製造した接着フィルムを使用した模擬半導体装置ではスペーサ部分で剥離が起きていることがわかった。 When the simulated semiconductor device was inspected with an ultrasonic microscope, there was no abnormality in the simulated semiconductor device using the adhesive film manufactured in Example 1, but in the simulated semiconductor device using the adhesive film manufactured in Comparative Example 1, the spacer portion It was found that peeling occurred.
Claims (3)
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| JP2004055892A JP2005251779A (en) | 2004-03-01 | 2004-03-01 | Adhesive film and semiconductor device using the same |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007234713A (en) * | 2006-02-28 | 2007-09-13 | Matsushita Electric Ind Co Ltd | Component bonding method, and component laminating method |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007234713A (en) * | 2006-02-28 | 2007-09-13 | Matsushita Electric Ind Co Ltd | Component bonding method, and component laminating method |
| US8614118B2 (en) | 2006-02-28 | 2013-12-24 | Panasonic Corporation | Component bonding method, component laminating method and bonded component structure |
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