JP2005033133A - Semiconductor device sealing metal die and semiconductor device sealing method using the same - Google Patents

Semiconductor device sealing metal die and semiconductor device sealing method using the same Download PDF

Info

Publication number
JP2005033133A
JP2005033133A JP2003273553A JP2003273553A JP2005033133A JP 2005033133 A JP2005033133 A JP 2005033133A JP 2003273553 A JP2003273553 A JP 2003273553A JP 2003273553 A JP2003273553 A JP 2003273553A JP 2005033133 A JP2005033133 A JP 2005033133A
Authority
JP
Japan
Prior art keywords
semiconductor device
cavity
resin
mold
sealing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2003273553A
Other languages
Japanese (ja)
Other versions
JP3609821B1 (en
Inventor
Masashi Nishiguchi
昌志 西口
Hiroyuki Kitamura
裕之 北村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
I Pex Inc
Original Assignee
Dai Ichi Seiko Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dai Ichi Seiko Co Ltd filed Critical Dai Ichi Seiko Co Ltd
Priority to JP2003273553A priority Critical patent/JP3609821B1/en
Application granted granted Critical
Publication of JP3609821B1 publication Critical patent/JP3609821B1/en
Publication of JP2005033133A publication Critical patent/JP2005033133A/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device sealing metal die and semiconductor device sealing method in which an internal structure and a control system are simplified and a high-function semiconductor device can be sealed with resin. <P>SOLUTION: A pin-point gate 38 is provided on the line that is positioned on the lower side of an inner lead 55 and connects approximately the centers of the opposed sides of a semiconductor device 50, on a bottom surface of a cavity 61 confronted to a lower surface of an island 52. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、半導体装置封止用金型および半導体装置封止方法に関する。   The present invention relates to a semiconductor device sealing mold and a semiconductor device sealing method.

従来、半導体装置封止用金型としては、半導体装置およびその製造方法並びにそれに使用される成形装置に関する金型がある（例えば、特許文献１参照。）。   2. Description of the Related Art Conventionally, as a mold for sealing a semiconductor device, there is a mold relating to a semiconductor device, a manufacturing method thereof, and a molding apparatus used therefor (see, for example, Patent Document 1).

すなわち、主面に電子回路が作り込まれている半導体ペレットと、半導体ペレットの外方に配設されている複数本のリードと、半導体ペレットの各電極パッドと各リードの内側端部との間にそれぞれ橋絡されているワイヤ群と、半導体ペレット、各リードの一部およびワイヤ群を樹脂封止している樹脂封止パッケージを備えている半導体装置において、前記樹脂封止パッケージは加圧成形法により成形されているとともに、そのゲート痕が半導体ペレットの主面上の樹脂封止パッケージの一部に位置しており、また、樹脂封止パッケージのゲート痕と反対側の主面には加圧成形時に前記半導体ペレットを支える押えピンの痕が形成されていることを特徴とする半導体装置の金型である。
特に、前記金型では、図１および図９に示すように、ゲート３８から注入した樹脂が半導体ペレット２２の表面に直接、当たって拡散する。
特開平５−１０２２１７号公報 That is, between the semiconductor pellet in which the electronic circuit is formed on the main surface, a plurality of leads disposed outside the semiconductor pellet, and each electrode pad of the semiconductor pellet and the inner end of each lead In a semiconductor device comprising a wire group that is bridged to each other, a semiconductor pellet, a part of each lead, and a resin-sealed package that resin-seales the wire group, the resin-sealed package is pressure-molded The gate trace is located on a part of the resin-encapsulated package on the main surface of the semiconductor pellet, and the main surface opposite to the gate trace of the resin-encapsulated package is added to the main surface of the resin-encapsulated package. A mold for a semiconductor device is characterized in that a mark of a presser pin that supports the semiconductor pellet is formed during pressure molding.
In particular, in the mold, as shown in FIGS. 1 and 9, the resin injected from the gate 38 directly hits the surface of the semiconductor pellet 22 and diffuses.
Japanese Patent Laid-Open No. 5-102217

しかしながら、前述の金型では、半導体ペレット２２を実装した組立体（ワーク）２４を支えるために押さえピン４５を設けるとともに、これを制御する必要があるので、内部構造および制御システムが複雑になる。
特に、インナーリードおよびワイヤの本数が増大すればするほど、ワイヤ２３，２３間のピッチが短くなる。このため、注入，拡散した樹脂がワイヤ２３に直接当たり、前記ワイヤ２３を押し倒して短絡させる危険性が増大し、歩留まりが悪くなる。この結果、前述の金型では、多数本のワイヤで電気接続する必要がある高機能半導体ペレットを樹脂封止することは困難であるという問題点があった。 However, in the above-described mold, it is necessary to provide the pressing pin 45 to support the assembly (work) 24 on which the semiconductor pellet 22 is mounted and to control this, so that the internal structure and the control system become complicated.
In particular, as the number of inner leads and wires increases, the pitch between the wires 23 is shortened. For this reason, the injected and diffused resin directly hits the wire 23, and there is an increased risk that the wire 23 is pushed down and short-circuited, resulting in poor yield. As a result, the above-described mold has a problem that it is difficult to resin-seal high-performance semiconductor pellets that need to be electrically connected with a large number of wires.

本発明は、前記問題点に鑑み、内部構造および制御システムが簡単で、高機能半導体装置を樹脂封止できる半導体装置封止用金型および半導体装置封止方法を提供することを目的とする。   In view of the above problems, an object of the present invention is to provide a semiconductor device sealing mold and a semiconductor device sealing method that have a simple internal structure and control system and that can seal a high-performance semiconductor device with resin.

課題を解決するための手段および発明の効果Means for Solving the Problems and Effects of the Invention

本発明にかかる半導体装置封止用金型は、前記目的を達成すべく、リードフレームのアイランドの上面に実装した半導体装置と、前記アイランドの周囲に並設した前記リードフレームの多数本のインナーリードの自由端部とをボンデイングワイヤで電気接続し、前記リードフレームを上下から１対のキャビティブロックでクランプして形成したキャビティ内に樹脂をゲートから充填して樹脂封止する半導体装置封止用金型であって、前記アイランドの下面に対向するキャビティの底面のうち、前記インナーリードの下方側に位置し、かつ、前記半導体装置の対向する辺の略中央を結ぶ線上に、前記ゲートを少なくとも１つ設けた構成としてある。   In order to achieve the above object, a mold for sealing a semiconductor device according to the present invention includes a semiconductor device mounted on an upper surface of an island of a lead frame and a plurality of inner leads of the lead frame arranged in parallel around the island. A semiconductor device sealing gold which is electrically connected to a free end of the wire by a bonding wire, and a resin is sealed by filling a resin into a cavity formed by clamping the lead frame from above and below by a pair of cavity blocks. And at least one gate on a line that is located below the inner lead and connects substantially the center of the opposite sides of the semiconductor device, out of the bottom surface of the cavity facing the lower surface of the island. One configuration is provided.

本発明によれば、ゲートから注入された樹脂は、まず最初に前記アイランドの周囲に並設した多数本のインナーリードの下面に当接し、ついで、前記インナーリード間の隙間から溢れ出るとともに、前記インナーリードの隙間に沿ってボンデイングワイヤを仕分けながらアイランドに向けて進む。このため、前記ボンデイングワイヤ同士を短絡させることなく、樹脂封止できる。この結果、従来例のような複雑な構造や制御システムを必要としないだけでなく、ボンデイングワイヤを短いピッチで架け渡す必要がある高機能半導体装置の樹脂封止にも適用できる。
特に、前記アイランドの両側に前記ゲートを設けることにより、樹脂圧によるアイランドの位置ずれや、これに伴う前記ボンデイングワイヤの破断を防止できる。また、複数のゲートを設けることにより、樹脂の単位時間内における充填量が倍増し、充填に要する作業時間を短縮できる。さらに、樹脂充填速度を下げることができるため、インナーリードにかかる負荷を低減でき、インナーリードの変形を防止できる。 According to the present invention, the resin injected from the gate first comes into contact with the lower surfaces of a plurality of inner leads arranged in parallel around the island, and then overflows from the gap between the inner leads. Proceed toward the island while sorting the bonding wires along the gap between the inner leads. For this reason, resin sealing can be performed without short-circuiting the bonding wires. As a result, not only a complicated structure or control system as in the conventional example is required, but also it can be applied to resin sealing of a high-performance semiconductor device that requires a bonding wire to be bridged at a short pitch.
In particular, by providing the gates on both sides of the island, it is possible to prevent the island from being displaced due to the resin pressure, and the bonding wire breakage associated therewith. Also, by providing a plurality of gates, the filling amount of resin within a unit time can be doubled, and the working time required for filling can be shortened. Furthermore, since the resin filling speed can be reduced, the load on the inner lead can be reduced, and deformation of the inner lead can be prevented.

本発明の実施形態としては、前記ゲートを、キャビティの内側面近傍に配置しておいてもよい。
本実施形態によれば、キャビティに注入された樹脂は最初、インナーリードの基部に当接するので、インナーリードが変形しにくくなり、より精度の高い樹脂封止が可能となる。 As an embodiment of the present invention, the gate may be disposed in the vicinity of the inner surface of the cavity.
According to the present embodiment, since the resin injected into the cavity first comes into contact with the base portion of the inner lead, the inner lead is not easily deformed, and more accurate resin sealing is possible.

また、前記エアベントは、キャビティの隅部、あるいは、キャビティの対向する上下面の中央に少なくとも１つ設けておいてもよい。
本実施形態によれば、注入された樹脂がキャビティ内の空気を前記エアベントを介して外部に押し出すので、樹脂の未充填やボイドの発生を防止でき、樹脂封止が迅速、かつ、美麗な仕上がりとなる。 Further, at least one air vent may be provided at the corner of the cavity or at the center of the upper and lower surfaces facing the cavity.
According to the present embodiment, since the injected resin pushes the air in the cavity to the outside through the air vent, it is possible to prevent unfilling of the resin and generation of voids, and the resin sealing is quick and beautiful. It becomes.

本発明にかかる半導体装置封止方法は、前記目的を達成すべく、リードフレームのアイランドの上面に実装した半導体装置と、前記アイランドの周囲に並設した前記リードフレームの多数本のインナーリードの自由端部とをボンデイングワイヤで電気接続し、前記リードフレームを上下から１対のキャビティブロックでクランプしてキャビティを形成した後、前記アイランドの下面に対向する前記キャビティの底面のうち、前記インナーリードの下方側に位置し、かつ、前記半導体装置の対向する辺の略中央を結ぶ線上に設けた少なくとも１つのゲートから、前記キャビティ内に樹脂を充填して樹脂封止する工程からなるものである。   In order to achieve the above object, a semiconductor device sealing method according to the present invention is free of a semiconductor device mounted on an upper surface of an island of a lead frame and a plurality of inner leads of the lead frame arranged in parallel around the island. An end portion is electrically connected with a bonding wire, and the lead frame is clamped from above and below by a pair of cavity blocks to form a cavity, and then, among the bottom surfaces of the cavities facing the lower surface of the island, the inner leads The method comprises a step of filling the cavity with resin and sealing with resin from at least one gate located on the lower side and provided on a line connecting substantially the centers of the opposing sides of the semiconductor device.

本発明によれば、ゲートから注入された樹脂は、まず最初に前記アイランドの周囲に並設した多数本のインナーリードの下面に当接し、ついで、前記インナーリード間の隙間から溢れ出るとともに、前記インナーリードの隙間に沿ってボンデイングワイヤを仕分けながらアイランドに向けて進む。このため、前記ボンデイングワイヤ同士を短絡させることなく、樹脂封止できる。この結果、従来例のような複雑な構造や制御システムを必要としないだけでなく、ボンデイングワイヤを短いピッチで架け渡す必要がある高機能半導体装置の樹脂封止にも適用できる。
特に、前記アイランドの両側に前記ゲートを設けることにより、樹脂圧によるアイランドの位置ずれや、これに伴う前記ボンデイングワイヤの破断を防止できる。また、複数のゲートを設けることにより、樹脂の単位時間内における充填量が倍増し、充填に要する作業時間を短縮できる。さらに、樹脂充填速度を下げることができるため、インナーリードにかかる負荷を低減でき、インナーリードの変形を防止できる。 According to the present invention, the resin injected from the gate first comes into contact with the lower surfaces of a plurality of inner leads arranged in parallel around the island, and then overflows from the gap between the inner leads. Proceed toward the island while sorting the bonding wires along the gap between the inner leads. For this reason, resin sealing can be performed without short-circuiting the bonding wires. As a result, not only a complicated structure or control system as in the conventional example is required, but also it can be applied to resin sealing of a high-performance semiconductor device that requires a bonding wire to be bridged at a short pitch.
In particular, by providing the gates on both sides of the island, it is possible to prevent the island from being displaced due to the resin pressure, and the bonding wire breakage associated therewith. Moreover, by providing a plurality of gates, the filling amount of the resin within a unit time can be doubled, and the working time required for filling can be shortened. Furthermore, since the resin filling speed can be reduced, the load on the inner lead can be reduced, and deformation of the inner lead can be prevented.

本発明の実施形態としては、前記ゲートを、キャビティの内側面近傍に配置しておいてもよい。
本実施形態によれば、キャビティに注入された樹脂は最初、インナーリードの基部に当接するので、インナーリードが変形しにくくなり、より精度の高い樹脂封止が可能となる。 As an embodiment of the present invention, the gate may be disposed in the vicinity of the inner surface of the cavity.
According to the present embodiment, since the resin injected into the cavity first comes into contact with the base portion of the inner lead, the inner lead is not easily deformed, and more accurate resin sealing is possible.

また、前記エアベントは、キャビティの隅部、あるいは、キャビティの対向する上下面の中央に少なくとも１つ設けておいてもよい。
本実施形態によれば、注入された樹脂がキャビティ内の空気を前記エアベントを介して外部に押し出すので、樹脂の未充填やボイドの発生を防止でき、樹脂封止が迅速、かつ、美麗な仕上がりになるという効果がある。 Further, at least one air vent may be provided at the corner of the cavity or at the center of the upper and lower surfaces facing the cavity.
According to the present embodiment, since the injected resin pushes the air in the cavity to the outside through the air vent, it is possible to prevent unfilling of the resin and generation of voids, and the resin sealing is quick and beautiful. There is an effect of becoming.

本発明にかかる実施形態を図１ないし図１０の添付図面に従って説明する。
本実施形態にかかる金型を組み込んだ樹脂成形装置は、図１に示すように、公知であるプレス装置の４本の支柱１０で相互に連結された下プラテン１１および上プラテン１２の間に、下金型２０、中金型３０および上金型４０を順次、接合一体化できるように配置してある。前記下プラテン１１は支柱１０を介して上下動可能である。一方、上下動しないように固定された前記上プラテン１２は、その上面に駆動機構１３を配置してある。 An embodiment according to the present invention will be described with reference to the accompanying drawings of FIGS.
As shown in FIG. 1, the resin molding apparatus incorporating the mold according to the present embodiment is between a lower platen 11 and an upper platen 12 that are connected to each other by four struts 10 of a known press device. The lower mold 20, the middle mold 30, and the upper mold 40 are arranged so that they can be joined and integrated sequentially. The lower platen 11 can be moved up and down via a column 10. On the other hand, the upper platen 12 fixed so as not to move up and down has a drive mechanism 13 disposed on the upper surface thereof.

前記下金型２０は、スペースブロック１４を介して下プラテン１１に載置，固定されており、その中央に固形樹脂１５を挿入できるポット２１を形成してある（図２Ａ）。前記ポット２１内にはプランジャー２２がスライド可能に挿入されている。そして、前記プランジャー２２を図示しない駆動機構で上下動させることにより、前記プランジャー２２の上端に取り付けたプランジャーチップ２３が前記固形樹脂１５を加熱，溶融させながら押し出す。さらに、前記下金型２０の上面のうち、前記ポット２１の両側に前記ポット２１に連続するランナ２４（図２Ｂ）を設けてあるとともに、前記ランナ２４内にはランナロックピン２５がスライド可能に挿入されている（図２Ａ）。なお、図２Ａ，２Ｂは説明の便宜上、階段状断面図となっている。   The lower mold 20 is placed and fixed on the lower platen 11 via the space block 14, and a pot 21 into which the solid resin 15 can be inserted is formed at the center (FIG. 2A). A plunger 22 is slidably inserted into the pot 21. And the plunger chip | tip 23 attached to the upper end of the said plunger 22 is extruded while heating and melting the said solid resin 15 by moving the said plunger 22 up and down with the drive mechanism which is not shown in figure. Further, a runner 24 (FIG. 2B) continuous to the pot 21 is provided on both sides of the pot 21 on the upper surface of the lower mold 20, and a runner lock pin 25 is slidable in the runner 24. Has been inserted (FIG. 2A). 2A and 2B are step-like sectional views for convenience of explanation.

前記中金型３０は、図２Ａに示すように、前記駆動機構１３に接続された４本のサポートピン３１を介して上下動可能に吊り下げられている。そして、前記中金型３０の下面のうち、前記ポット２１の軸心上に位置する領域にカルブロック３２を埋設してある。前記カルブロック３２は、その下面に設けたスペースであるカル３３が前記ポット２１と前記ランナ２４とに連通可能である。   As shown in FIG. 2A, the middle mold 30 is suspended through four support pins 31 connected to the drive mechanism 13 so as to be movable up and down. A cull block 32 is embedded in a region located on the axial center of the pot 21 in the lower surface of the middle mold 30. In the cull block 32, a cull 33, which is a space provided on the lower surface thereof, can communicate with the pot 21 and the runner 24.

一方、前記中金型３０の上面には、キャビティ６１（図６Ｂ）を形成する長尺な中型キャビティブロック３４を埋設してある。前記中型キャビティブロック３４は、その上面に一段低く形成した基準面３４ａの中央に平面方形の中型キャビティ３５を所定のピッチで複数個、設けてある（図２Ｂ）。さらに、前記中型キャビティ３５は、その底面中央にエアベント３６を設けてあるとともに、その底面隅部に突き出しピン３７を配置してある。さらに、前記中型キャビティ３５の底面のうち、隣り合う前記突き出しピン３７，３７の中間にピンポイントゲート３８が形成されている。前記ピンポイントゲート３８は円錐台形のスプルー３９を介して前記ランナ２４に連通可能であるとともに、前記ランナロックピン２５と同一軸心上に配置されている。   On the other hand, a long middle mold cavity block 34 forming a cavity 61 (FIG. 6B) is embedded in the upper surface of the middle mold 30. The middle mold cavity block 34 is provided with a plurality of flat rectangular middle mold cavities 35 at a predetermined pitch in the center of a reference surface 34a formed one step lower on the upper surface (FIG. 2B). Furthermore, the middle cavity 35 is provided with an air vent 36 at the center of the bottom surface, and a protruding pin 37 is disposed at the corner of the bottom surface. Further, a pinpoint gate 38 is formed between the adjacent projecting pins 37, 37 on the bottom surface of the middle mold cavity 35. The pinpoint gate 38 can communicate with the runner 24 through a frustoconical sprue 39 and is disposed on the same axis as the runner lock pin 25.

前記上金型４０は、前記上プラテン１２の下面にスペースブロック１５を介して固定されている。そして、前記上金型４０の下面に上型キャビティブロック４１が埋設され、さらに、前記上型キャビティブロック４１の下面中央に所定のピッチで複数個の上型キャビティ４２が形成されている。前記上型キャビティ４２の天井面の中央にエアベント４３が設けられているとともに、その周囲に突き出しピン４４がスライド可能に挿入されている。   The upper mold 40 is fixed to the lower surface of the upper platen 12 via a space block 15. An upper mold cavity block 41 is embedded in the lower surface of the upper mold 40, and a plurality of upper mold cavities 42 are formed at a predetermined pitch in the center of the lower surface of the upper mold cavity block 41. An air vent 43 is provided at the center of the ceiling surface of the upper mold cavity 42, and a protruding pin 44 is slidably inserted around the air vent 43.

一方、樹脂封止される半導体装置であるＩＣチップ５０は、図３Ａ，３Ｂに示すように、リードフレーム５１のアイランド５２に実装されている。前記リードフレーム５１は、前記アイランド５２を４本の吊りピン５３で支持するとともに、前記アイランド５２の周囲に配置した多数本のアウターリード５４とインナーリード５５とをダムバー５６で接続するように打ち抜いてある。前記インナーリード５５の自由端部はボンディングワイヤー５７（例えば、図７Ａ）を介して前記ＩＣチップ５０にそれぞれ接続されている。そして、前記ダムバー５６を樹脂封止後に切断することにより、対応するアウターリード５４およびインナーリード５５を相互に接続しつつ、対応するアウターリード５４およびインナーリード５５毎に切り離される。   On the other hand, the IC chip 50, which is a resin-sealed semiconductor device, is mounted on the island 52 of the lead frame 51 as shown in FIGS. 3A and 3B. The lead frame 51 supports the island 52 with four suspension pins 53 and is punched so that a large number of outer leads 54 and inner leads 55 arranged around the island 52 are connected by a dam bar 56. is there. The free ends of the inner leads 55 are connected to the IC chip 50 via bonding wires 57 (for example, FIG. 7A). Then, by cutting the dam bar 56 after sealing with resin, the corresponding outer lead 54 and inner lead 55 are disconnected from each other while being connected to each other.

次に、前述の構成からなる半導体装置封止用金型の動作について説明する。
まず、図４Ａに示すように、図示しない搬入装置によって開いた中金型３０の基準面３４ａに、ＩＣチップ５０を実装した前記リードフレーム５１を載置，位置決めする。一方、前記下金型２０のポット２１内に固形樹脂１５を図示しない搬入装置で挿入する。そして、前記駆動機構１３によって前記中金型３０を上方にスライドさせるとともに、前記下プラテン１１を上方にスライドさせることにより、下金型２０、中金型３０および上金型４０を閉じる。これにより、前記リードフレーム５１を中型キャビティブロック３４および上型キャビティブロック４１がクランプすることにより、ポット２１、カル３３、ランナ２４、スプルー３９およびピンポイントゲート３８と、中型，上型キャビティ３５，４２からなるキャビティ６１とが連通する。 Next, the operation of the semiconductor device sealing mold having the above-described configuration will be described.
First, as shown in FIG. 4A, the lead frame 51 on which the IC chip 50 is mounted is placed and positioned on the reference surface 34a of the middle mold 30 opened by a loading device (not shown). On the other hand, the solid resin 15 is inserted into the pot 21 of the lower mold 20 by a carry-in device (not shown). Then, while the middle mold 30 is slid upward by the drive mechanism 13 and the lower platen 11 is slid upward, the lower mold 20, the middle mold 30 and the upper mold 40 are closed. As a result, the lead frame 51 is clamped by the middle cavity block 34 and the upper cavity block 41, so that the pot 21, the cull 33, the runner 24, the sprue 39 and the pinpoint gate 38, and the middle and upper mold cavities 35, 42 are obtained. The cavity 61 which consists of communicates.

ついで、プランジャー２２を上昇させることにより、プランジャーチップ２３で固形樹脂１５を加圧し、前記固形樹脂１５を溶融させて押し出す。ポット２１から押し出された樹脂６０はカル３３、ランナ２４、スプルー３９およびピンポイントゲート３８を介してキャビティ６１（図４Ｂ、図６Ｂ）に充填され、アイランド５２上に実装した前記ＩＣチップ５０とボンデイングワイヤ５７とを一体に樹脂封止する（図４Ｂ）。   Next, the plunger 22 is raised to pressurize the solid resin 15 with the plunger tip 23, and the solid resin 15 is melted and extruded. Resin 60 extruded from pot 21 is filled into cavity 61 (FIGS. 4B and 6B) via cal 33, runner 24, sprue 39 and pinpoint gate 38, and bonded to IC chip 50 mounted on island 52. The wire 57 is integrally resin-sealed (FIG. 4B).

前述の充填作業における樹脂６０の充填作業は、図６ないし図１０に示すように進行する。
すなわち、図６に示す状態のピンポイントゲート３８からキャビティ６１に樹脂６０を充填すると、流入した樹脂６０は中型キャビティ３５の底面から溜まり始め（図７Ｂ）、インナーリード５５，５５間の隙間から溢れ出るとともに、インナーリード５５，５５の隙間に沿って進み、ボンデインクワイヤ５７を仕分けながらキャビティ６１の中央に進む（図８）。このため、ボンデインクワイヤ５７のピッチが狭くとも、相互に短絡することはない。 The filling operation of the resin 60 in the above filling operation proceeds as shown in FIGS.
That is, when the resin 60 is filled into the cavity 61 from the pinpoint gate 38 in the state shown in FIG. 6, the resin 60 that has flowed begins to accumulate from the bottom surface of the middle mold cavity 35 (FIG. 7B) and overflows from the gap between the inner leads 55 and 55. At the same time, it proceeds along the gap between the inner leads 55, 55 and proceeds to the center of the cavity 61 while sorting the bond ink wires 57 (FIG. 8). For this reason, even if the pitch of the bond ink wires 57 is narrow, they are not short-circuited with each other.

本実施形態によれば、流入する樹脂６０はインナーリード５５の基部に当接した後、移動するので、流入する樹脂６０の樹脂圧がアイランド５２やボンデインクワイヤ５７に直接接触しない。このため、アイランド５２の位置ずれや、これに基づくボンデインクワイヤ５７の破断を防止できる。また、ピンポイントゲート３８の位置は、ダムバー５６で連結されているインナーリード５５の基部近傍に樹脂６０が当たるように配置してあるので、前記インナーリード５５の変形を防止できる。   According to the present embodiment, since the inflowing resin 60 moves after contacting the base portion of the inner lead 55, the resin pressure of the inflowing resin 60 does not directly contact the island 52 or the bond ink wire 57. For this reason, the position shift of the island 52 and the breakage of the bond ink wire 57 based thereon can be prevented. Further, since the pinpoint gate 38 is disposed so that the resin 60 hits the vicinity of the base portion of the inner lead 55 connected by the dam bar 56, the deformation of the inner lead 55 can be prevented.

さらに、樹脂６０が流入し続けることにより、樹脂６０がキャビティ６１の隅部に進み（図９）、キャビティ６１内に樹脂６０が充満してＩＣチップ５０、アイランド５２、吊りピン５３、インナーリード５５およびボンデイングワイヤ５７が一体に樹脂封止される（図１０）。   Further, as the resin 60 continues to flow, the resin 60 advances to the corner of the cavity 61 (FIG. 9), and the cavity 61 is filled with the resin 60, so that the IC chip 50, the island 52, the suspension pin 53, and the inner lead 55 are filled. And the bonding wire 57 is integrally resin-sealed (FIG. 10).

本実施形態によれば、キャビティ６１の天井面，底面の中央および前記キャビティ６１の隅部にエアベント３６，４３および６２をそれぞれ設けてある。このため、樹脂の未充填、ボイドの発生を防止することにより、美麗で良好な樹脂封止が可能となる。   According to this embodiment, the air vents 36, 43 and 62 are provided at the ceiling surface, the center of the bottom surface of the cavity 61, and the corners of the cavity 61, respectively. For this reason, by preventing unfilled resin and generation of voids, it is possible to achieve beautiful and good resin sealing.

ついで、樹脂６０が固化した後、図５Ａに示すように、上金型４０および中金型３０を閉じたままで下金型２０を引き下げて金型を開く。すると、スプルー３９、ランナ２４およびカル３３に残存していた樹脂６３はランナロックピン２５に保持されているため、中金型３０から離型し、ゲートカットされる。さらに、下プラテン１１を下げて下金型２０を下降させると、スプルー３９、ランナ２４およびカル３３に残存していた樹脂６３がランナロックピン２５およびプランジャーチップ２３によって突き出される（図５Ａ）。   Next, after the resin 60 is solidified, as shown in FIG. 5A, the lower mold 20 is pulled down while the upper mold 40 and the middle mold 30 are closed, and the mold is opened. Then, since the resin 63 remaining in the sprue 39, the runner 24 and the cull 33 is held by the runner lock pin 25, the resin 63 is released from the middle mold 30 and gate-cut. Further, when the lower platen 11 is lowered and the lower mold 20 is lowered, the resin 63 remaining in the sprue 39, the runner 24, and the cull 33 is protruded by the runner lock pin 25 and the plunger tip 23 (FIG. 5A). .

さらに、前記駆動機構１３を駆動して中金型３０を下げると、上金型４０に設けた突き出しピン４４が成形済み樹脂成形品６４を突き出して離型するとともに、中金型３０に設けられた突き出しピン３７が前記樹脂成形品６４を中型キャビティ３５から突き出して離型する。そして、図示しない搬出装置によって前記樹脂成形品６４と、前記スプルー３９、ランナ２４およびカル３３に残存していた樹脂６３とを上金型４０、中金型３０および下金型２０から搬出する。以後同様の作業を繰り返すことにより、連続樹脂封止が可能となる。   Further, when the drive mechanism 13 is driven to lower the middle mold 30, the projecting pin 44 provided on the upper mold 40 projects the molded resin molded product 64 and releases it, and is provided on the middle mold 30. The protruding pin 37 protrudes the resin molded product 64 from the middle mold cavity 35 and releases it. Then, the resin molded product 64 and the resin 63 remaining in the sprue 39, the runner 24, and the cull 33 are carried out from the upper mold 40, the middle mold 30, and the lower mold 20 by a carry-out device (not shown). Thereafter, the same operation is repeated to enable continuous resin sealing.

本発明は、リードフレームに搭載した半導体装置を樹脂封止する金型および封止方法に適用できる。   The present invention can be applied to a mold and a sealing method for resin-sealing a semiconductor device mounted on a lead frame.

本発明にかかる半導体装置封止用金型の一実施形態を示す全体正面図である。1 is an overall front view showing one embodiment of a mold for sealing a semiconductor device according to the present invention. 図２Ａは図１で示した金型の断面図、特に、図２Ｂで示したＡ−Ａ線部分拡大断面図、図２Ｂは図１で示した金型の平面図である。2A is a cross-sectional view of the mold shown in FIG. 1, in particular, an enlarged cross-sectional view taken along line AA shown in FIG. 2B, and FIG. 2B is a plan view of the mold shown in FIG. 図３Ａおよび図３Ｂは本実施形態にかかるワイヤーボンディングする前のリードフレームを示す平面図および正面図、図３Ｃおよび図３Ｄは図３Ａ，３Ｂの部分拡大図である。3A and 3B are a plan view and a front view showing the lead frame before wire bonding according to the present embodiment, and FIGS. 3C and 3D are partially enlarged views of FIGS. 3A and 3B. 図４Ａは本実施形態にかかる３枚の金型を開いた状態の断面図、図４Ｂは３枚の金型を閉じ、キャビティに樹脂を充填した状態の断面図である。FIG. 4A is a cross-sectional view in a state where three molds according to the present embodiment are opened, and FIG. 4B is a cross-sectional view in a state where the three molds are closed and a cavity is filled with resin. 図５Ａは本実施形態にかかる３枚の金型のうち、下金型だけを開いた状態を示す断面図、図５Ｂは３枚の金型を全て開いた状態を示す断面図である。FIG. 5A is a cross-sectional view showing a state in which only the lower mold is opened among the three molds according to the present embodiment, and FIG. 5B is a cross-sectional view showing a state in which all the three molds are opened. 図６Ａは樹脂封止前を示すキャビティの平面図、図６Ｂは図６Ａの正面断面図、図６Ｃは図６Ａの底面図である。6A is a plan view of the cavity before resin sealing, FIG. 6B is a front sectional view of FIG. 6A, and FIG. 6C is a bottom view of FIG. 6A. 図７Ａは樹脂封止途中を示すキャビティの平面図、図７Ｂは図７Ａの正面断面図、図７Ｃは図７Ａの底面図である。7A is a plan view of the cavity showing the resin sealing process, FIG. 7B is a front sectional view of FIG. 7A, and FIG. 7C is a bottom view of FIG. 7A. 図８Ａは図７に続く樹脂封止途中を示すキャビティの平面図、図８Ｂは図８Ａの正面断面図、図８Ｃは図８Ａの底面図である。8A is a plan view of a cavity showing the resin sealing process following FIG. 7, FIG. 8B is a front sectional view of FIG. 8A, and FIG. 8C is a bottom view of FIG. 8A. 図９Ａは図８に続く樹脂封止途中を示すキャビティの平面図、図９Ｂは図９Ａの正断面図、図９Ｃは図９Ａの底面図である。9A is a plan view of a cavity showing the middle of resin sealing following FIG. 8, FIG. 9B is a front sectional view of FIG. 9A, and FIG. 9C is a bottom view of FIG. 9A. 図１０Ａは樹脂封止完了を示すキャビティの平面図、図１０Ｂは図１０Ａの正面断面図、図１０Ｃは図１０Ａの底面図である。10A is a plan view of a cavity showing completion of resin sealing, FIG. 10B is a front sectional view of FIG. 10A, and FIG. 10C is a bottom view of FIG. 10A.

符号の説明Explanation of symbols

２０…下金型、２１…ポット、２２…プランジャ、２３…プランジャチップ、２４…ランナ、２５…ランナロックピン、３０…中金型、３２…カルブロック、３３…カル、３４…中型キャビティブロック、３５…キャビティ、３６…エアベント、３７…突き出しピン、３９…スプルー、４０…上金型、４１…上型キャビティブロック、４２…上型キャビティ、４３…エアベント、４４…突き出しピン、５０…ＩＣチップ、５１…リードフレーム、５２…アイランド、５３…吊りピン、５４…アウターリード、５５…インナーリード、５６…ダムバー、６０…樹脂、６１…キャビティ、６２…エアベント、６４…樹脂成形品。   20 ... Lower mold, 21 ... Pot, 22 ... Plunger, 23 ... Plunger tip, 24 ... Runner, 25 ... Runner lock pin, 30 ... Medium mold, 32 ... Cull block, 33 ... Cull, 34 ... Medium mold cavity block, 35 ... Cavity, 36 ... Air vent, 37 ... Extrusion pin, 39 ... Sprue, 40 ... Upper mold, 41 ... Upper mold cavity block, 42 ... Upper mold cavity, 43 ... Air vent, 44 ... Extrusion pin, 50 ... IC chip, DESCRIPTION OF SYMBOLS 51 ... Lead frame, 52 ... Island, 53 ... Hanging pin, 54 ... Outer lead, 55 ... Inner lead, 56 ... Dam bar, 60 ... Resin, 61 ... Cavity, 62 ... Air vent, 64 ... Resin molded product

Claims (8)

リードフレームのアイランドの上面に実装した半導体装置と、前記アイランドの周囲に並設した前記リードフレームの多数本のインナーリードの自由端部とをボンデイングワイヤで電気接続し、前記リードフレームを上下から１対のキャビティブロックでクランプして形成したキャビティ内に樹脂をゲートから充填して樹脂封止する半導体装置封止用金型であって、
前記アイランドの下面に対向するキャビティの底面のうち、前記インナーリードの下方側に位置し、かつ、前記半導体装置の対向する辺の略中央を結ぶ線上に、前記ゲートを少なくとも１つ設けたことを特徴とする半導体装置封止用金型。 The semiconductor device mounted on the top surface of the island of the lead frame and the free ends of the multiple inner leads of the lead frame arranged in parallel around the island are electrically connected by a bonding wire, and the lead frame is 1 from above and below. A mold for semiconductor device sealing in which a resin is sealed by filling a resin into a cavity formed by clamping with a pair of cavity blocks,
Of the bottom surface of the cavity facing the lower surface of the island, at least one of the gates is provided on a line that is positioned below the inner lead and that connects approximately the center of the opposite sides of the semiconductor device. A die for sealing a semiconductor device. ゲートを、キャビティの内側面近傍に配置したことを特徴とする請求項１に記載の半導体装置封止用金型。   2. The mold for sealing a semiconductor device according to claim 1, wherein the gate is disposed in the vicinity of the inner side surface of the cavity. エアベントを、キャビティの隅部に設けたことを特徴とする請求項１または２に記載の半導体装置封止用金型。   3. The mold for sealing a semiconductor device according to claim 1, wherein an air vent is provided at a corner of the cavity. エアベントを、キャビティの対向する上下面の中央に少なくとも１つ設けたことを特徴とする請求項１ないし３のいずれか１項に記載の半導体装置封止用金型。   4. The mold for sealing a semiconductor device according to claim 1, wherein at least one air vent is provided at the center of the upper and lower surfaces facing each other of the cavity. リードフレームのアイランドの上面に実装した半導体装置と、前記アイランドの周囲に並設した前記リードフレームの多数本のインナーリードの自由端部とをボンデイングワイヤで電気接続し、前記リードフレームを上下から１対のキャビティブロックでクランプしてキャビティを形成した後、前記アイランドの下面に対向する前記キャビティの底面のうち、前記インナーリードの下方側に位置し、かつ、前記半導体装置の対向する辺の略中央を結ぶ線上に設けた少なくとも１つのゲートから、前記キャビティ内に樹脂を充填して樹脂封止することを特徴とする半導体装置封止方法。   The semiconductor device mounted on the top surface of the island of the lead frame and the free ends of the multiple inner leads of the lead frame arranged in parallel around the island are electrically connected by a bonding wire, and the lead frame is 1 from above and below. After forming a cavity by clamping with a pair of cavity blocks, it is located on the lower side of the inner lead of the bottom surface of the cavity facing the lower surface of the island and is substantially at the center of the opposite sides of the semiconductor device A method of sealing a semiconductor device, comprising filling the cavity with resin from at least one gate provided on a line connecting the two. ゲートを、キャビティの内側面近傍に配置したことを特徴とする請求項５に記載の半導体装置封止方法。   6. The semiconductor device sealing method according to claim 5, wherein the gate is disposed in the vicinity of the inner side surface of the cavity. エアベントを、キャビティの隅部に設けたことを特徴とする請求項５または６に記載の半導体装置封止方法。   7. The semiconductor device sealing method according to claim 5, wherein an air vent is provided at a corner of the cavity. エアベントを、キャビティの対向する上下面の中央に少なくとも１つ設けたことを特徴とする請求項５ないし７のいずれか１項に記載の半導体装置封止方法。
8. The method of sealing a semiconductor device according to claim 5, wherein at least one air vent is provided at the center of the upper and lower surfaces facing the cavity.
JP2003273553A 2003-07-11 2003-07-11 Semiconductor device sealing mold and semiconductor device sealing method using the same Expired - Fee Related JP3609821B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2003273553A JP3609821B1 (en) 2003-07-11 2003-07-11 Semiconductor device sealing mold and semiconductor device sealing method using the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003273553A JP3609821B1 (en) 2003-07-11 2003-07-11 Semiconductor device sealing mold and semiconductor device sealing method using the same

Publications (2)

Publication Number Publication Date
JP3609821B1 JP3609821B1 (en) 2005-01-12
JP2005033133A true JP2005033133A (en) 2005-02-03

Family

ID=34100765

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003273553A Expired - Fee Related JP3609821B1 (en) 2003-07-11 2003-07-11 Semiconductor device sealing mold and semiconductor device sealing method using the same

Country Status (1)

Country Link
JP (1) JP3609821B1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008016506A (en) * 2006-07-03 2008-01-24 Mitsubishi Electric Corp Process for manufacturing power module
JP2022511611A (en) * 2018-10-09 2022-02-01 アリス・コンポジッツ・インコーポレイテッド Method for compound flow molding

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008016506A (en) * 2006-07-03 2008-01-24 Mitsubishi Electric Corp Process for manufacturing power module
JP2022511611A (en) * 2018-10-09 2022-02-01 アリス・コンポジッツ・インコーポレイテッド Method for compound flow molding
JP7157243B2 (en) 2018-10-09 2022-10-19 アリス・コンポジッツ・インコーポレイテッド Method for composite flow forming
US11623370B2 (en) 2018-10-09 2023-04-11 Arris Composites Inc. Method for composite flow molding

Also Published As

Publication number Publication date
JP3609821B1 (en) 2005-01-12

Similar Documents

Publication Publication Date Title
JP2010010702A (en) Method of manufacturing semiconductor device
JP4454608B2 (en) Manufacturing method of semiconductor integrated circuit device
JP5065747B2 (en) Semiconductor package manufacturing method and manufacturing apparatus
KR100591718B1 (en) Resin-sealed semiconductor device
JP3609821B1 (en) Semiconductor device sealing mold and semiconductor device sealing method using the same
JP3493113B2 (en) Semiconductor device manufacturing method and lead frame
JPH06232195A (en) Manufacture of semiconductor device and lead frame
JP2000003923A (en) Resin sealing of semiconductor device and resin-sealing device for that
JPH0342495B2 (en)
JP2000100845A (en) Semiconductor device, its manufacture and manufacture device
JP3076949B2 (en) Lead frame
JP2973901B2 (en) Mold for semiconductor resin sealing
JP2555931B2 (en) Method for manufacturing semiconductor device
JP4226023B2 (en) Resin sealing mold and resin sealing method
KR960006429B1 (en) Package molding method of semiconductor device
JPH10116847A (en) Method of manufacturing semiconductor device and trasfer molding machine
JPH05293846A (en) Molding apparatus
JPH08330343A (en) Electronic component resin-sealing device and resin sealing method using the device
JP2925375B2 (en) Molding method for mold part in electronic component
KR100531423B1 (en) lead frame for fabrication semiconductor and mold die therefor, and device for fabricating semiconductor using the same
JP3189927B2 (en) Lead frame and method of manufacturing semiconductor device using the same
JP3185354B2 (en) Method for manufacturing semiconductor device and resin sealing device for semiconductor device
KR19990012316A (en) Molding mold apparatus of semiconductor package
JP3112227B2 (en) Method for manufacturing semiconductor device
JPH09181105A (en) Metal mold for sealing semiconductor resin

Legal Events

Date Code Title Description
TRDD Decision of grant or rejection written
A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20041014

R150 Certificate of patent or registration of utility model

Ref document number: 3609821

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20101022

Year of fee payment: 6

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20101022

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20101022

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20111022

Year of fee payment: 7

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20111022

Year of fee payment: 7

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20121022

Year of fee payment: 8

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20121022

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20121022

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20131022

Year of fee payment: 9

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees