JPH06232195A - Manufacture of semiconductor device and lead frame - Google Patents
Manufacture of semiconductor device and lead frameInfo
- Publication number
- JPH06232195A JPH06232195A JP3461493A JP3461493A JPH06232195A JP H06232195 A JPH06232195 A JP H06232195A JP 3461493 A JP3461493 A JP 3461493A JP 3461493 A JP3461493 A JP 3461493A JP H06232195 A JPH06232195 A JP H06232195A
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- gate
- sealing resin
- molding
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 27
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 8
- 229920005989 resin Polymers 0.000 claims abstract description 46
- 239000011347 resin Substances 0.000 claims abstract description 46
- 238000007789 sealing Methods 0.000 claims abstract description 34
- 238000000465 moulding Methods 0.000 claims abstract description 25
- 238000000034 method Methods 0.000 claims abstract description 11
- 238000002347 injection Methods 0.000 claims description 3
- 239000007924 injection Substances 0.000 claims description 3
- 239000002184 metal Substances 0.000 description 3
- 230000007547 defect Effects 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000001721 transfer moulding Methods 0.000 description 1
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
- B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
- B29C45/00—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
- B29C45/14—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles
- B29C45/14639—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components
- B29C45/14655—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components connected to or mounted on a carrier, e.g. lead frame
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
- B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
- B29C45/00—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
- B29C45/0046—Details relating to the filling pattern or flow paths or flow characteristics of moulding material in the mould cavity
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
- B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
- B29C45/00—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
- B29C45/14—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles
- B29C45/14836—Preventing damage of inserts during injection, e.g. collapse of hollow inserts, breakage
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
- B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
- B29C45/00—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
- B29C45/17—Component parts, details or accessories; Auxiliary operations
- B29C45/26—Moulds
- B29C45/27—Sprue channels ; Runner channels or runner nozzles
- B29C45/2701—Details not specific to hot or cold runner channels
- B29C45/2708—Gates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Mechanical Engineering (AREA)
- Injection Moulding Of Plastics Or The Like (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、半導体装置の製造方法
およびそれに使用するリードフレームに係り、特に、半
導体装置のパッケージ本体をモールドする技術に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device and a lead frame used for the same, and more particularly to a technique of molding a package body of the semiconductor device.
【０００２】[0002]
【従来の技術】周知のように、半導体素子の封止法とし
て代表的なトランスファーモールド法は、予めリードフ
レームに半導体素子をワイヤーボンディングにより組み
込んでおき、これをモールド金型に入れて、粉末状また
はタブレット状のエポキシ樹脂等の封止用樹脂を温度と
圧力をかけて溶融させ、粘度の低い状態にして金型内に
注入し、熱硬化させている。2. Description of the Related Art As is well known, the transfer molding method, which is a typical method for sealing semiconductor elements, incorporates a semiconductor element into a lead frame by wire bonding in advance, puts it in a molding die, and powders it. Alternatively, a sealing resin such as a tablet-like epoxy resin is melted by applying temperature and pressure to make it have a low viscosity, and it is injected into a mold and thermally cured.
【０００３】以下、図３，図４を参照して具体的に説明
する。図３は、図４に示したリードフレームに組み込ま
れた半導体素子をモールドする状態を示した部分断面
図、図４は、ＱＦＰ（Quad Flat Package)と呼ばれる表
面実装型半導体装置の組み立てに使用されるリードフレ
ームの部分平面図である。A detailed description will be given below with reference to FIGS. 3 and 4. FIG. 3 is a partial cross-sectional view showing a state in which a semiconductor element incorporated in the lead frame shown in FIG. 4 is molded, and FIG. 4 is used for assembling a surface mount semiconductor device called QFP (Quad Flat Package). FIG. 3 is a partial plan view of a lead frame according to the present invention.
【０００４】図３、図４に示すように、リードフレーム
１の中央部にあるダイパッド２に、半導体素子３がダイ
ボンディングされ、この半導体素子３の電極と、ダイパ
ッド２の周囲に配設されたリード端子４とが金属細線５
によって接続される。半導体素子３が組み込まれたリー
ドフレーム１は、図３に示すように、上下モールド金型
６Ａ，６Ｂの間にセッティングされる。モールド金型６
Ａ，６Ｂには、図４に鎖線で示したパッケージ本体７を
形成するためのキャビティ８Ａ，８Ｂが形成されてい
る。また、下型６Ｂには、加熱溶融された封止用樹脂を
キャビティ８Ａ，８Ｂに導くための図示しない樋状凹部
（ランナ）が形成されている。ランナを通って流動する
封止用樹脂は、ゲート９と呼ばれる分岐流路を介して、
キャビティ８Ｂ内に供給される。下型６Ｂのキャビティ
８Ｂ内に供給された封止用樹脂は、キャビティ内のリー
ド端子４間の隙間を通って、上型６Ａのキャビティ８Ａ
内に流れ込む。このようにして上下のキャビティ８Ａ，
８Ｂが封止用樹脂で充填されることにより、パッケージ
本体７が形成される。As shown in FIGS. 3 and 4, the semiconductor element 3 is die-bonded to the die pad 2 at the center of the lead frame 1, and the electrodes of the semiconductor element 3 and the periphery of the die pad 2 are arranged. The lead terminal 4 and the thin metal wire 5
Connected by. The lead frame 1 in which the semiconductor element 3 is incorporated is set between the upper and lower molds 6A and 6B as shown in FIG. Mold die 6
Cavities 8A and 8B for forming the package body 7 shown by the chain line in FIG. 4 are formed in A and 6B. Further, the lower mold 6B is provided with a trough-shaped recess (runner) (not shown) for guiding the heat-melted sealing resin to the cavities 8A, 8B. The sealing resin that flows through the runner passes through a branch flow path called a gate 9,
It is supplied into the cavity 8B. The sealing resin supplied into the cavity 8B of the lower die 6B passes through the gap between the lead terminals 4 in the cavity and passes through the cavity 8A of the upper die 6A.
Pour into. In this way, the upper and lower cavities 8A,
The package body 7 is formed by filling 8B with the sealing resin.
【０００５】モールド後、ランナおよびゲート９内で硬
化した不要樹脂は、パッケージ７との連結部で破断され
て、リードフレーム１から取り除かれる。前記不要樹脂
の除去を容易にするために、ランナおよびゲート９は、
モールド金型の下型または上型の一方（図３の例では下
型６Ｂ）に設けられ、リードフレーム１を不要樹脂で挟
み込まない構造になっている。After the molding, the unnecessary resin which has hardened in the runner and the gate 9 is broken at the connecting portion with the package 7 and removed from the lead frame 1. In order to facilitate the removal of the unnecessary resin, the runner and the gate 9 are
It is provided on one of the lower mold and the upper mold of the molding die (lower mold 6B in the example of FIG. 3) and has a structure in which the lead frame 1 is not sandwiched by unnecessary resin.
【０００６】[0006]
【発明が解決しようとする課題】しかしながら、このよ
うな構成を有する従来例の場合には、次のような問題が
ある。最近の半導体素子の高集積化に伴い、封止用パッ
ケージのリード端子の多ピン化、およびファインピッチ
化が進められ、パッケージ本体７内に配置されるリード
端子（インナーリード）４の間隔も極めて狭くなってい
る。その結果、上下モールド金型６Ａまたは６Ｂの一方
側からキャビティ内に供給された封止用樹脂が、インナ
ーリードの隙間を通って、反対側のキャビティに流動し
難くなり、未充填が発生し易い。However, the conventional example having such a structure has the following problems. With the recent high integration of semiconductor elements, the lead terminals of the encapsulation package have been increased in the number of pins and finer pitched, and the spacing between the lead terminals (inner leads) 4 arranged in the package body 7 has become extremely large. It is getting narrower. As a result, the sealing resin supplied into the cavity from one side of the upper and lower molding dies 6A or 6B hardly flows through the gap of the inner lead into the cavity on the opposite side, and unfilling easily occurs. .
【０００７】また、上述したように、キャビティ内で封
止用樹脂の流通性が悪いために、例えば下型６Ｂからキ
ャビティ内に注入された封止用樹脂によって、ダイパッ
ド２が上方に持ち上げられ、金属細線５が半導体素子３
の端縁に接触して電気的短絡不良等を引き起こすことも
ある。Further, as described above, since the sealing resin has poor flowability in the cavity, the die pad 2 is lifted upward by the sealing resin injected into the cavity from the lower mold 6B, for example. The thin metal wire 5 is the semiconductor element 3
It may come into contact with the edge of the and cause an electrical short circuit defect or the like.
【０００８】なお、キャビティ内の封止用樹脂の流通性
を改善するために、例えば特公昭５９−９６９号公報に
は、次のようなリードフレームが提案されている。この
リードフレームは、その外枠の内縁側に切り込みを設
け、このリードフレームが上下モールド型で挟持された
際に、前記切り込み部分を封止用注入口（ゲート）とし
て利用するものである。しかし、このようなリードフレ
ーム構造を、ＱＦＰ用のリードフレームのような、ダイ
パッドをその四隅から支持する支持リードがパッケージ
本体の各角部に導出され、かつ、前記角部の一つにゲー
トが設けられたパッケージに適用すると、ゲート側に導
出された支持リードのために、注入された封止用樹脂の
流れが遮られて乱されるので、樹脂内に気泡を巻き込む
など、成型不良が生じ易くなる。In order to improve the flowability of the sealing resin in the cavity, for example, Japanese Patent Publication No. 59-969 proposes the following lead frame. This lead frame is provided with a notch on the inner edge side of its outer frame, and when the lead frame is sandwiched by the upper and lower molds, the notch is used as a sealing injection port (gate). However, in such a lead frame structure, supporting leads for supporting the die pad from the four corners thereof, such as a lead frame for QFP, are led out to each corner of the package body, and a gate is provided at one of the corners. When applied to the provided package, the flow of the injected sealing resin is blocked and disturbed by the support lead led out to the gate side, so molding defects such as entraining bubbles in the resin occur. It will be easier.
【０００９】本発明は、このような事情に鑑みてなされ
たものであって、モールド時の未充填やダイパッドの浮
き沈みを防止することができる半導体装置の製造方法お
よびこれに使用するリードフレームを提供することを目
的としている。The present invention has been made in view of the above circumstances, and provides a method of manufacturing a semiconductor device capable of preventing unfilling and ups and downs of a die pad during molding, and a lead frame used therefor. The purpose is to do.
【００１０】[0010]
【課題を解決するための手段】本発明は、このような目
的を達成するために、次のような構成をとる。すなわ
ち、請求項１に記載の発明は、半導体装置のパッケージ
本体をモールドする方法であって、上下モールド金型の
一方の金型に形成された樋状凹部（ランナ）を介して、
パッケージ本体成型用の上下キャビティの内の一方のキ
ャビティに連通した第１ゲートに封止用樹脂を流入させ
るとともに、前記第１ゲートに流入した封止用樹脂の一
部を、リードフレーム内のゲート位置にあたる部分に形
成された開口部を介して、上下モールド金型の他方の金
型に形成した第２ゲートに導き、前記第１および第２ゲ
ートを介して、封止用樹脂を前記上下キャビティに同時
注入するものである。The present invention has the following constitution in order to achieve such an object. That is, the invention according to claim 1 is a method for molding a package body of a semiconductor device, wherein a trough-shaped recess (runner) formed in one of the upper and lower molds is used,
The sealing resin is caused to flow into a first gate that communicates with one of the upper and lower cavities for molding the package body, and a part of the sealing resin that has flowed into the first gate is used as a gate in the lead frame. It is guided to the second gate formed in the other mold of the upper and lower molds through the opening formed in the portion corresponding to the position, and the sealing resin is injected with the sealing resin through the first and second gates. Are to be injected at the same time.
【００１１】請求項２に記載の発明は、半導体素子がダ
イボンディングされるダイパッドが、その四隅に連結さ
れた４つの支持リードで吊り下げ支持されているリード
フレームであって、前記リードフレームは、半導体装置
のパッケージ本体の角部にあたる部分で、モールド金型
の樹脂注入用のゲートが設けられる位置に、前記樹脂を
流通させるための開口部を備え、かつ、前記４つ支持リ
ードのうち、前記開口部側へ導出される支持リードは、
その導出端が前記開口部を避けるように屈曲形成された
ものである。According to a second aspect of the present invention, there is provided a lead frame in which a die pad to which a semiconductor element is die-bonded is suspended and supported by four support leads connected to four corners of the die pad. An opening for allowing the resin to flow is provided at a position corresponding to a corner of the package body of the semiconductor device where a gate for resin injection of the molding die is provided, and among the four support leads, The support lead led out to the opening side is
The lead-out end is bent and formed so as to avoid the opening.
【００１２】[0012]
【作用】本発明の作用は次のとおりである。請求項１に
記載の方法によれば、上下モールド金型の一方の金型に
形成された第１ゲートに流入した封止用樹脂の一部は、
請求項２に記載のリードフレームに形成された開口部を
介して、他方の金型に形成された第２ゲートに流入し、
前記第１および第２ゲートを介して、封止用樹脂が上下
キャビティに同時注入されるので、封止用樹脂の未充填
やダイパッドの浮き沈みが防止される。The operation of the present invention is as follows. According to the method of claim 1, a part of the sealing resin that has flowed into the first gate formed in one of the upper and lower molds is
Flowing into a second gate formed in the other mold through the opening formed in the lead frame according to claim 2;
Since the sealing resin is simultaneously injected into the upper and lower cavities via the first and second gates, the unfilling of the sealing resin and the ups and downs of the die pad are prevented.
【００１３】また、請求項２に記載のリードフレームに
よれば、前記開口部側へ導出されるダイパッドの支持リ
ードの導出端が、前記開口部を避けるように屈曲形成さ
れているので、前記各ゲートから注入される樹脂の流れ
が、支持リードによって遮られることもない。Further, according to the lead frame of the present invention, the lead-out end of the support lead of the die pad that is led out to the opening side is formed to be bent so as to avoid the opening. The flow of resin injected from the gate is not blocked by the support lead.
【００１４】[0014]
【実施例】以下、図面を参照して本発明の一実施例を説
明する。図１は、図２に示したリードフレームに組み込
まれた半導体素子をモールドする状態を示した部分断面
図、図２は、実施例に係る方法に使用されるＱＦＰ用の
リードフレームの部分平面図である。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a partial cross-sectional view showing a state of molding a semiconductor device incorporated in the lead frame shown in FIG. 2, and FIG. 2 is a partial plan view of a QFP lead frame used in a method according to an embodiment. Is.
【００１５】図２に示すように、このリードフレーム１
０は、半導体素子３がダイボンディングされるダイパッ
ド２と、金属細線５によって半導体素子３の電極と電気
的に接続される多数のリード端子４とを備えている。各
リード端子４の中間部位はタイバー１１によって相互に
連結され、また、各リード端子４の導出端は連結部材１
２によって連結されている。連結部材１２は、屈曲形成
された支片１３を介して外枠１４に連結支持されてい
る。外枠１４には、モールド工程などにおいて、リード
フレーム１０を位置決めするための基準となるガイド孔
１５が形成されている。以上の構成は、図４に示した従
来のリードフレーム１の構成と同様である。As shown in FIG. 2, this lead frame 1
Reference numeral 0 includes a die pad 2 to which the semiconductor element 3 is die-bonded, and a large number of lead terminals 4 electrically connected to the electrodes of the semiconductor element 3 by thin metal wires 5. Intermediate portions of the lead terminals 4 are connected to each other by a tie bar 11, and lead ends of the lead terminals 4 are connected to the connecting member 1.
Connected by two. The connecting member 12 is connected to and supported by the outer frame 14 via a bent support piece 13. A guide hole 15 is formed in the outer frame 14 as a reference for positioning the lead frame 10 in a molding process or the like. The above structure is similar to that of the conventional lead frame 1 shown in FIG.
【００１６】本実施例に係るリードフレーム１０の特徴
は、図１に示したモールド金型に形成される第１および
第２ゲート２２，２３の位置にあたる部分に、パッケー
ジ本体７側へ向かって先細り状の開口部１６を形成した
点にある。なお、上記ゲート２２，２３は、パッケージ
本体７の角部に相当する位置にある。また、リードフレ
ーム１０の他の特徴は、ダイパッド２の四隅に連結され
てダイパッド２を吊り下げ支持する４本の支持リード１
７ａ〜１７ｄのうち、開口部１６側へ導出される支持リ
ード１７ａの導出端１８が、開口部１６を避けるように
屈曲されて、タイバー１１に連結して終端していること
にある。The feature of the lead frame 10 according to the present embodiment is that it is tapered toward the package body 7 side at the portions corresponding to the positions of the first and second gates 22 and 23 formed in the molding die shown in FIG. The point is that the circular opening 16 is formed. The gates 22 and 23 are located at the corners of the package body 7. Another feature of the lead frame 10 is four support leads 1 that are connected to the four corners of the die pad 2 to suspend and support the die pad 2.
The lead-out end 18 of the support lead 17a led out to the opening 16 side out of 7a to 17d is bent so as to avoid the opening 16 and is connected to the tie bar 11 to terminate.
【００１７】以下、図２に示したリードフレーム１０を
用いたモールド法を、図１を参照して説明する。本実施
例に係る上下モールド金型２０Ａ，２０Ｂは、半導体装
置のパッケージ本体７を形成するための上下キャビティ
２１Ａ，２１Ｂを備えている。また、下型２８Ｂには、
加熱溶融された封止用樹脂が加圧されることにより流通
する図示しない樋状凹部（ランナ）と、前記ランナから
分岐されてキャビティ２１Ｂに連通する第１ゲート２２
が形成されている。一方、上型２０Ａには、位置決め装
填されたリードフレーム１０の開口部１１を挟んで、前
記第１ゲート２２の末端部分に対向するように、第２ゲ
ート２３が形成されている。この第２ゲート２３は、キ
ャビティ２１Ａに連通している。A molding method using the lead frame 10 shown in FIG. 2 will be described below with reference to FIG. The upper and lower molds 20A and 20B according to this embodiment include upper and lower cavities 21A and 21B for forming the package body 7 of the semiconductor device. In addition, the lower mold 28B,
A trough-shaped recess (runner) (not shown) that circulates when the heated and melted sealing resin is pressed, and a first gate 22 that branches from the runner and communicates with the cavity 21B.
Are formed. On the other hand, in the upper mold 20A, a second gate 23 is formed so as to face the end portion of the first gate 22 with the opening 11 of the lead frame 10 having the positioning and loading interposed therebetween. The second gate 23 communicates with the cavity 21A.
【００１８】上述したようなモールド金型２０Ａ，２０
Ｂにおいて、溶融状態の封止用樹脂は、下型２０Ｂのラ
ンナを通って第１ゲート２２に流入する。第１ゲート２
２に流入した封止用樹脂の一部は、図１に矢印で示すよ
うに、リードフレーム１０の開口部１６を通って上型２
０Ａの第２ゲート２３に流入する。そして、第１および
第２ゲート２２，２３を介して、封止用樹脂が上下キャ
ビティ２１Ａ，２１Ｂに同時注入されることにより、パ
ッケージ本体７が形成される。Molding molds 20A, 20 as described above
In B, the molten sealing resin flows into the first gate 22 through the runner of the lower mold 20B. First gate 2
Part of the sealing resin that has flown into the upper mold 2 passes through the opening 16 of the lead frame 10 as shown by the arrow in FIG.
It flows into the second gate 23 of 0A. Then, the package body 7 is formed by simultaneously injecting the sealing resin into the upper and lower cavities 21A and 21B via the first and second gates 22 and 23.
【００１９】以上のように上下キャビティ２１Ａ，２１
Ｂに封止用樹脂が同時注入されるので、リード端子４が
高密度に配置されたリードフレーム１０であって、キャ
ビティ２１Ａ，２１Ｂ内に封止用樹脂が確実に充填され
る。また、封止用樹脂が上下から同時に注入されるの
で、ダイパッド２が注入された封止用樹脂によって持ち
上げられることもない。さらに、上述したランナおよび
第１，第２ゲート２２，２３内で硬化した不要樹脂は、
リードフレーム１０を挟み込まないので、モールド後の
不要樹脂の破断・除去を容易に行うこともできる。As described above, the upper and lower cavities 21A, 21
Since the sealing resin is simultaneously injected into B, in the lead frame 10 in which the lead terminals 4 are densely arranged, the sealing resin is surely filled in the cavities 21A and 21B. Moreover, since the sealing resin is simultaneously injected from above and below, the die pad 2 is not lifted by the injected sealing resin. Furthermore, the unnecessary resin cured in the runner and the first and second gates 22 and 23 is
Since the lead frame 10 is not sandwiched, the unnecessary resin after molding can be easily broken or removed.
【００２０】また、開口部１６側へ導出さている支持リ
ード１７ｄの導出端１８は、開口部１６を避けるように
屈曲しているので、ゲート２２，２３から上下キャビテ
ィ２１Ａ，２１Ｂに注入される樹脂の流れが、支持リー
ド１７ｄによって遮られたり、乱されることもない。Further, since the lead-out end 18 of the support lead 17d led out to the opening 16 side is bent so as to avoid the opening 16, the resin injected from the gates 22 and 23 into the upper and lower cavities 21A and 21B. Is not interrupted or disturbed by the support lead 17d.
【００２１】なお、上述の実施例では、ＱＦＰを例に採
って説明したが、本発明はこれに限らず、リード端子が
高密度に配置される各種の半導体装置のパッケージ本体
をモールドする際にも適用することが可能である。In the above-mentioned embodiments, the QFP is taken as an example for explanation, but the present invention is not limited to this, and when molding the package bodies of various semiconductor devices in which the lead terminals are arranged at a high density, Can also be applied.
【００２２】また、実施例では、ランナおよびこれから
分岐された第１ゲート２２を下型２０Ｂに、第２ゲート
２３を上型２０Ａに設けたが、これらを各々上下逆に設
けるようにしてもよい。Further, in the embodiment, the runner and the first gate 22 branched from the runner are provided in the lower die 20B and the second gate 23 is provided in the upper die 20A, but they may be provided upside down. .
【００２３】[0023]
【発明の効果】以上の説明から明らかなように、請求項
１に記載の発明によれば、封止用樹脂が上下キャビティ
に同時注入されるので、リード端子が高密度に配置され
たリードフレームであっても、キャビティ内に封止用樹
脂を確実に充填することができ、また、モールド時のダ
イパッドの浮き沈みを有効に防止することができる。As is apparent from the above description, according to the invention described in claim 1, since the sealing resin is simultaneously injected into the upper and lower cavities, the lead frame in which the lead terminals are arranged at a high density is formed. Even in this case, it is possible to reliably fill the cavity with the sealing resin, and it is possible to effectively prevent the die pad from rising and falling during molding.
【００２４】請求項２に記載のリードフレームによれ
ば、ダイパッドを支持する支持リードのうち、開口部側
へ導出された支持リードの導出端を、前記開口部を避け
るように屈曲形成しているので、前記開口部にあたるゲ
ート部分に樹脂の流れを遮るような障害物がなくなる。
したがって、パッケージ本体の角部に相当するゲートか
ら注入された樹脂は、支持リードによって乱されること
がないで、気泡等を生じることなくモールドすることが
できる。According to the lead frame of the second aspect, of the support leads for supporting the die pad, the lead-out end of the support lead led out to the opening side is bent and formed so as to avoid the opening. Therefore, there is no obstacle that blocks the flow of resin in the gate portion corresponding to the opening.
Therefore, the resin injected from the gates corresponding to the corners of the package body is not disturbed by the support leads and can be molded without generating bubbles or the like.
【図１】実施例に係る製造方法を示すモールド時の部分
断面図である。FIG. 1 is a partial cross-sectional view at the time of molding showing a manufacturing method according to an embodiment.
【図２】実施例で使用されるリードフレームの部分平面
図である。FIG. 2 is a partial plan view of a lead frame used in an example.
【図３】従来例に係る製造方法を示すモールド時の部分
断面図である。FIG. 3 is a partial cross-sectional view at the time of molding showing a manufacturing method according to a conventional example.
【図４】従来例で使用されるリードフレームの部分平面
図である。FIG. 4 is a partial plan view of a lead frame used in a conventional example.
１０…リードフレーム １６…開口部 １７ａ〜１７ｄ…支持リード ２０Ａ…モールド金型（上型） ２０Ｂ…モールド金型（下型） ２１Ａ…上型キャビティ ２１Ｂ…下型キャビティ ２２…第１ゲート ２３…第２ゲート DESCRIPTION OF SYMBOLS 10 ... Lead frame 16 ... Opening 17a-17d ... Support lead 20A ... Mold die (upper die) 20B ... Mold die (lower die) 21A ... Upper die cavity 21B ... Lower die cavity 22 ... First gate 23 ... 2 gates
Claims (2)
する方法であって、上下モールド金型の一方の金型に形
成された樋状凹部（ランナ）を介して、パッケージ本体
成型用の上下キャビティの内の一方のキャビティに連通
した第１ゲートに封止用樹脂を流入させるとともに、前
記第１ゲートに流入した封止用樹脂の一部を、リードフ
レーム内のゲート位置にあたる部分に形成された開口部
を介して、上下モールド金型の他方の金型に形成した第
２ゲートに導き、前記第１および第２ゲートを介して、
封止用樹脂を前記上下キャビティに同時注入することを
特徴とする半導体装置の製造方法。1. A method of molding a package body of a semiconductor device, comprising the steps of: a trough-shaped recess (runner) formed in one of upper and lower molds to form an upper and lower cavity for molding the package body. An opening formed in a portion corresponding to a gate position in the lead frame while allowing the sealing resin to flow into the first gate communicating with one of the cavities. Through a second gate formed in the other mold of the upper and lower molds, and through the first and second gates,
A method for manufacturing a semiconductor device, comprising simultaneously injecting a sealing resin into the upper and lower cavities.
イパッドが、その四隅に連結された４つの支持リードで
吊り下げ支持されているリードフレームであって、前記
リードフレームは、半導体装置のパッケージ本体の角部
にあたる部分で、モールド金型の樹脂注入用のゲートが
設けられる位置に、前記樹脂を流通させるための開口部
を備え、かつ、前記４つ支持リードのうち、前記開口部
側へ導出される支持リードは、その導出端が前記開口部
を避けるように屈曲形成されていることを特徴とするリ
ードフレーム。2. A lead frame in which a die pad to which a semiconductor element is die-bonded is suspended and supported by four supporting leads connected to four corners of the die pad, the lead frame being a corner of a package body of a semiconductor device. In the portion corresponding to the portion, an opening for allowing the resin to flow is provided at a position where a resin injection gate of the molding die is provided, and is led out to the opening of the four support leads. The lead frame is characterized in that the lead-out end is bent so as to avoid the opening.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3461493A JPH06232195A (en) | 1993-01-28 | 1993-01-28 | Manufacture of semiconductor device and lead frame |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3461493A JPH06232195A (en) | 1993-01-28 | 1993-01-28 | Manufacture of semiconductor device and lead frame |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06232195A true JPH06232195A (en) | 1994-08-19 |
Family
ID=12419258
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3461493A Pending JPH06232195A (en) | 1993-01-28 | 1993-01-28 | Manufacture of semiconductor device and lead frame |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06232195A (en) |
Cited By (8)
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|---|---|---|---|---|
| KR20020043398A (en) * | 2000-12-04 | 2002-06-10 | 마이클 디. 오브라이언 | Printed circuit board for manufacturing semiconductor package |
| SG89348A1 (en) * | 2000-08-29 | 2002-06-18 | Micron Technology Inc | U-shaped tape for boc fbga package to improve moldability |
| CN100376022C (en) * | 2003-03-12 | 2008-03-19 | 三星电子株式会社 | Method for packing semiconductor device on printing circuit board and the printing circuit board |
| JP2009158978A (en) * | 2009-04-10 | 2009-07-16 | Renesas Technology Corp | Manufacturing method of semiconductor device |
| US7833833B2 (en) | 2003-11-27 | 2010-11-16 | Renesas Electronics Corporation | Method of manufacturing a semiconductor device |
| JP2014204059A (en) * | 2013-04-09 | 2014-10-27 | 三洋電機株式会社 | Solid electrolytic capacitor and manufacturing method therefor |
| CN104183507A (en) * | 2013-05-27 | 2014-12-03 | 瑞萨电子株式会社 | Method of manufacturing semiconductor device |
| WO2017169173A1 (en) * | 2016-03-30 | 2017-10-05 | 株式会社ケーヒン | Mold and circuit device |
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| JPH0360049A (en) * | 1989-07-27 | 1991-03-15 | Fujitsu Ltd | Manufacture of integrated circuit device |
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Cited By (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| SG89348A1 (en) * | 2000-08-29 | 2002-06-18 | Micron Technology Inc | U-shaped tape for boc fbga package to improve moldability |
| US6486536B1 (en) | 2000-08-29 | 2002-11-26 | Micron Technology, Inc. | U-shape tape for BOC FBGA package to improve moldability |
| US6617201B2 (en) | 2000-08-29 | 2003-09-09 | Micron Technology, Inc. | U-shape tape for BOC FBGA package to improve moldability |
| KR20020043398A (en) * | 2000-12-04 | 2002-06-10 | 마이클 디. 오브라이언 | Printed circuit board for manufacturing semiconductor package |
| CN100376022C (en) * | 2003-03-12 | 2008-03-19 | 三星电子株式会社 | Method for packing semiconductor device on printing circuit board and the printing circuit board |
| US10998288B2 (en) | 2003-11-27 | 2021-05-04 | Renesas Electronics Corporation | Method of manufacturing a semiconductor device |
| US9425165B2 (en) | 2003-11-27 | 2016-08-23 | Renesas Electronics Corporation | Method of manufacturing semiconductor device |
| US7833833B2 (en) | 2003-11-27 | 2010-11-16 | Renesas Electronics Corporation | Method of manufacturing a semiconductor device |
| US8053875B2 (en) | 2003-11-27 | 2011-11-08 | Renesas Electronics Corporation | Method of manufacturing a semiconductor device |
| US8513785B2 (en) | 2003-11-27 | 2013-08-20 | Renesas Electronics Corporation | Method of manufacturing a semiconductor device |
| US8592961B2 (en) | 2003-11-27 | 2013-11-26 | Renesas Electronics Corporation | Method of manufacturing a semiconductor device |
| US10249595B2 (en) | 2003-11-27 | 2019-04-02 | Renesas Electronics Corporation | Method of manufacturing a semiconductor device |
| US9806035B2 (en) | 2003-11-27 | 2017-10-31 | Renesas Electronics Corporation | Semiconductor device |
| US9024419B2 (en) | 2003-11-27 | 2015-05-05 | Renesas Electronics Corporation | Method of manufacturing semiconductor device |
| JP2009158978A (en) * | 2009-04-10 | 2009-07-16 | Renesas Technology Corp | Manufacturing method of semiconductor device |
| JP4566266B2 (en) * | 2009-04-10 | 2010-10-20 | ルネサスエレクトロニクス株式会社 | Manufacturing method of semiconductor device |
| JP2014204059A (en) * | 2013-04-09 | 2014-10-27 | 三洋電機株式会社 | Solid electrolytic capacitor and manufacturing method therefor |
| CN104183507A (en) * | 2013-05-27 | 2014-12-03 | 瑞萨电子株式会社 | Method of manufacturing semiconductor device |
| WO2017169173A1 (en) * | 2016-03-30 | 2017-10-05 | 株式会社ケーヒン | Mold and circuit device |
| JP2017177540A (en) * | 2016-03-30 | 2017-10-05 | 株式会社ケーヒン | Method for manufacturing circuit device, and circuit device |
| CN108778669A (en) * | 2016-03-30 | 2018-11-09 | 株式会社京滨 | Mold and circuit device |
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