JP2004214294A - Power semiconductor module - Google Patents

Power semiconductor module Download PDF

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Publication number
JP2004214294A
JP2004214294A JP2002379805A JP2002379805A JP2004214294A JP 2004214294 A JP2004214294 A JP 2004214294A JP 2002379805 A JP2002379805 A JP 2002379805A JP 2002379805 A JP2002379805 A JP 2002379805A JP 2004214294 A JP2004214294 A JP 2004214294A
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Prior art keywords
electrode terminal
base plate
power semiconductor
metal base
main surface
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JP4253183B2 (en
Inventor
Hideki Shitama
英樹 舌間
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched

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Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor module which can prevent occurrence of poor insulation because the distance along the insulation surface between an electrode terminal and a metal base plate even when bubbles are generated or mixed in the area near the electrode terminal when the gel state insulator is implanted. <P>SOLUTION: In the semiconductor module 1, a semiconductor chip 2 and the bottom-opening end 6a of a resin case 6 surrounding an insulation substrate 3 are fixed to the circumference edge of the main surface in the front side of a metal base plate 5. To the upper surface of the bottom-opening end 6a of the resin case 6, an electrode terminal 7 is inserted. In the area between the internal end 7a of the electrode terminal 7 and the main surface of the front side of the metal base plate 5, a couple of projected portions 10, which are partially projected toward the internal side of the module, are provided in order to prevent spread or transfer of bubbles in the lower side at the internal surface 6b of the bottom-opening end 6a. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

【０００１】
【発明の属する技術分野】
本発明は、インバータやサーボなどのモータ制御に用いられる半導体モジュール（パワーモジュール）の絶縁構造に関するものである。
【０００２】
【従来の技術】
一般に、電力用半導体モジュールにおいては、パワートランジスタ等の複数の電力用半導体素子を備えた電力用半導体装置が、金属ベース板と樹脂ケースとからなるケーシング内に収容され、ゲル状絶縁物で封止されている（特許文献１〜４参照）。ここで、樹脂ケースは、通常、底部が開口する略筒状体とされ、この開口部が金属ベース板で閉止された構造とされている。
【０００３】
そして、かかる電力用半導体モジュールにおいては、電力用半導体装置は、樹脂ケースに取り付けられた電極端子に接続され、この電極端子を介して外部機器と電気的に接続されるようになっている。ここで、電極端子は、例えば、樹脂ケースの底部の上面に取り付けられる。この場合、電極端子は、樹脂ケースの底部の厚さ分だけ、金属ベース板より高い位置に配置され、電力用半導体装置とともにゲル状絶縁物によって封止されることになる。
【０００４】
【特許文献１】
特開平１１−８７５６７号公報（[0016]〜［0018］、図２）
【特許文献２】
特開平９−２３２５１０号公報（第３頁、図１）
【特許文献３】
実開平６−６２５５０号公報（[0008]〜［0009］、図４）
【特許文献４】
特開平１１−２６６９１号公報（[0012]〜［0013］、図１）
【０００５】
【発明が解決しようとする課題】
ところで、この種の電力用半導体モジュールの製造プロセスにおいては、電力用半導体装置、電極端子等をケーシング内に配置し、該ケーシング内にゲル状絶縁物を注ぐようにしているが、その際ゲル状絶縁物内に気泡が発生ないし混入することがある。そして、この気泡が電極端子近傍に滞留した状態でゲル状絶縁物が固化すると、電極端子と金属ベース板との間に、空隙、すなわち封止樹脂が存在しない部分が発生し、電極端子と金属ベース板との間の絶縁沿面距離が短くなり、絶縁不良を起こすおそれがある。なお、ここで、「絶縁沿面距離」は、樹脂ケースの底部の開口部付近において電極端子と金属ベース板とが樹脂ケースの底部を挟むように配置されている場合において、電極端子と金属ベース板との間のゲル状絶縁物が存在する部分の距離（厚さ）を意味する（図１（ｂ）中のｄ２参照）。
【０００６】
本発明は、上記従来の問題を解決するためになされたものであって、電力用半導体装置、電極端子等をケーシング内に収容してゲル状絶縁物を注入する際に、電極端子近傍に気泡が発生ないし混入した場合でも、電極端子と金属ベース板との間の絶縁沿面距離が短くなって絶縁不良が起こるのを防止することができる半導体モジュールを提供することを解決すべき課題とする。
【０００７】
【課題を解決するための手段】
上記課題を解決するためになされた本発明にかかる電力用半導体モジュールは、（ｉ）電力用半導体チップ（電力用半導体素子）と、（ii）表側主面に、電力用半導体チップの裏面が半田付けされる回路パターンを備えた絶縁基板と、（iii）表側主面に、絶縁基板の裏側主面が半田付けされる金属ベース板と、（iv）電力用半導体チップ及び絶縁基板を囲繞するとともに、その底部開口端が金属ベース板の表側主面の周縁部に固着されたケースと、（ｖ）ケースにインサートされ、その一端が底部開口端の内側面に露出する板状の電極端子と、（vi）電力用半導体チップ、絶縁基板及び電極端子を覆う（封止する）ゲル状樹脂とを備えていて、（vii）底部開口端の内側面の、電極端子の前記一端が位置する部位と底部開口端が金属ベース板と当接する部位との間に、モジュール内側に向かって部分的に突出する絶縁性の突起部が配設されていることを特徴とするものである。
【０００８】
【発明の実施の形態】
以下、添付の図面を参照しつつ、本発明の実施の形態を具体的に説明する。
実施の形態．１
図１（ａ）に示すように、電力用半導体モジュール１（以下、略して「半導体モジュール１」という。）には、複数の電力用半導体チップ２（以下、略して「半導体チップ２」という。）と絶縁基板３とを備えた電力用半導体装置が設けられている。ここで、絶縁基板３の表側主面（上側主面）には、各半導体チップ２の裏面が半田付けされる回路パターン（図示せず）が形成されている。
【０００９】
そして、絶縁基板３の裏側主面（下側主面）は、半田４を用いて金属ベース板５（放熱板）の表側主面（上側主面）に接合されている（半田付けされている）。金属ベース板５の材料としては、例えば銅などが用いられる。さらに、金属ベース板５の表側主面の周縁部には、半導体チップ２及び絶縁基板３を囲繞する樹脂ケース６の底部開口端６ａが固着されている。樹脂ケース６の材料としては、例えばエポキシ樹脂などが用いられる。この底部開口端６ａは、樹脂ケース６の側壁の底部からモジュール内側に向かって突出している。
【００１０】
この樹脂ケース６の底部開口端６ａの上面には、折れ曲がった板状の電極端子７がインサートされている。すなわち、電極端子７は、底部開口端６ａの上面の切り欠かれた部分にはめ込まれている。電極端子７の材料としては、例えば銅などが用いられる。この電極端子７は、導電性材料からなるワイヤ８を介して、電力用半導体素子（絶縁基板３の配線パターン）と電気的に接続されている。ここで、電極端子７の内側端部７ａ（端面）は、底部開口端６ａの縦壁状（金属ベース板５の表側主面と垂直）の内側面６ｂと、横方向（左右方向）にみて同一面上に位置している（露出している）。
【００１１】
そして、底部開口端６ａの内側面６ｂには、電極端子７の内側端部７ａと、金属ベース板５の表側主面との間に、モジュール内側に向かって部分的に突出する２つの絶縁性の突起部１０が配設されている。ここで、突起部１０は、樹脂ケース６と一体形成されている。しかしながら、突起部１０を絶縁材料で別部材として形成し、底部開口端６ａの内側面６ｂに取り付けてもよい（インサートしてもよい）。この２つの突起部１０の一方は、底部開口端６ａの内側面６ｂの上端部近傍に位置し、他方は内側面６ｂの中間位置（高さ）よりやや低い部位に位置している。なお、下側の突起部１０は省略してもよい。
【００１２】
この半導体モジュール１においては、金属ベース板５と樹脂ケース６とからなる箱状ないし容器状のケーシング内にゲル状樹脂９が充填され、電力用半導体装置（半導体チップ２、絶縁基板３）、電極端子７及びワイヤ８は、このゲル状樹脂９によって覆われている（封止されている）。
【００１３】
ところで、この半導体モジュール１を製造する際には、半導体チップ２及び絶縁基板３を伴った電力用半導体装置、電極端子７、ワイヤ８等を、金属ベース板５と樹脂ケース６とからなるケーシング内に配置し、該ケーシング内にゲル状樹脂９を注ぐようにしているが、その際、電極端子７の内側端部７ａ近傍に気泡１１が発生しあるいは混入して滞留することがある。しかし、この気泡１１の下方への広がりないし移動は、上側の突起部１０によって阻止される。
【００１４】
したがって、電極端子７の内側端部７ａ近傍に気泡１１が滞留した状態でゲル状樹脂９が固化した場合でも、底部開口端６ａの内側面６ｂの大部分はゲル状樹脂９によって覆われ、電極端子７の内側端部７ａと、金属ベース板５の表側主面との間の絶縁沿面距離ｄ１は短くならず、底部開口端６ａの内側面６ｂの高さとほぼ同一となる。このため、電極端子７の絶縁不良が生じない。
【００１５】
なお、図１（ｂ）に示すように、底部開口端６ａの内側面６ｂに突起部を設けない場合は、電極端子７の内側端部７ａ近傍に発生ないし混入した気泡１１は、底部開口端６ａの内側面６ｂに沿って下向きに広がり、あるいは移動するので、電極端子７の内側端部７ａと金属ベース板５の表側主面との間の絶縁沿面距離ｄ２は短くなり、電極端子７の絶縁不良が生じるおそれがある。
【００１６】
実施の形態２．
以下、図２を参照しつつ、本発明の実施の形態２を説明する。ただし、実施の形態２にかかる半導体モジュールは、実施の形態１にかかる半導体モジュールと多くの共通点を有するので、説明の重複を避けるため、以下では主として実施の形態１と異なる点を説明する。なお、図２に示す半導体モジュールの構成要素中、図１（ａ）に示す半導体モジュールの構成要素と共通なものには、図１（ａ）と同一の参照番号を付している。
【００１７】
図２に示すように、実施の形態２にかかる半導体モジュール１では、実施の形態１にかかる半導体モジュール１とは異なり、底部開口端６ａの内側面６ｂには突起部が配設されていない。そして、横方向（左右方向）において電極端子７の内側端部７ａと対応する位置の近傍において、金属ベース板５の表側主面に、下方にへこむ溝部１２（凹部）が形成されている。つまり、電極端子７の内側端部７ａの下方では、金属ベース板５の上面（溝部１２の上面）が、底部開口端６ａの下端面より下側に位置している。その他の点については、実施の形態１と同様である。
【００１８】
実施の形態２にかかる半導体モジュール１においては、上下方向において、電極端子７の内側端部７ａと金属ベース板５の上面（溝部１２の上面）との間の距離が、実施の形態１にかかる半導体モジュールないしは従来の半導体モジュールに比べて、溝部１２の深さ分だけ長くなる。このため、電極端子７の内側端部７ａ近傍に発生ないし混入した気泡１１が、突起部を備えていない底部開口端６ａの内側面６ｂに沿って下向きに広がり、あるいは移動しても、電極端子７の内側端部７ａと金属ベース板５の上面（溝部１２の上面）との間の絶縁沿面距離ｄ３は十分に確保される。このため、電極端子７の絶縁不良が生じない。
【００１９】
また、実施の形態１にかかる半導体モジュール１では、ゲル状樹脂９を注入する際に、樹脂ケース６の底部開口端６ａの内側面６ｂに設けられた突起部１０のすきま、ないし上側の突起部１０の下側に気泡が発生ないし混入して滞留する可能性がある。しかし、実施の形態２では、底部開口端６ａの内側面６ｂに突起部が設けられないので、このような気泡の滞留を防止することができる。さらに、実施の形態２にかかる半導体モジュールでは、底部開口端６ａの内側面６ｂに突起部を形成する必要がないので、実施の形態１に比べて、樹脂ケース６の成形が容易である（成形性が良い）。
【００２０】
【発明の効果】
本発明によれば、電極端子の一端近傍に気泡が滞留した状態でゲル状絶縁物が固化した場合でも、底部開口端の内側面の大部分はゲル状絶縁部によって覆われ、電極端子の一端と金属ベース板の表側主面との間の絶縁沿面距離は短くならず、底部開口端の内側面の高さとほぼ同一となる。このため、電極端子の絶縁不良が生じない。
【図面の簡単な説明】
【図１】（ａ）は本発明の実施の形態１にかかる半導体モジュールの立面断面図であり、（ｂ）は突起部を備えていない半導体モジュールの要部の立面断面図である。
【図２】本発明の実施の形態２にかかる半導体モジュールの立面断面図である。
【符号の説明】
１ 半導体モジュール、 ２ 半導体チップ、 ３ 絶縁基板、 ４ 半田、５ 金属ベース板、 ６ 樹脂ケース、 ６ａ 底部開口端、 ６ｂ 内側面、 ７ 電極端子、 ７ａ 内側端部、 ８ ワイヤ、 ９ ゲル状樹脂、 １０ 突起部、 １１ 気泡、 １２ 溝部。[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an insulation structure of a semiconductor module (power module) used for controlling a motor such as an inverter or a servo.
[0002]
[Prior art]
Generally, in a power semiconductor module, a power semiconductor device including a plurality of power semiconductor elements such as a power transistor is housed in a casing including a metal base plate and a resin case and sealed with a gel-like insulator. (See Patent Documents 1 to 4). Here, the resin case is generally a substantially cylindrical body having an open bottom, and has a structure in which this opening is closed by a metal base plate.
[0003]
In such a power semiconductor module, the power semiconductor device is connected to an electrode terminal attached to the resin case, and is electrically connected to an external device via the electrode terminal. Here, the electrode terminal is attached to, for example, the upper surface of the bottom of the resin case. In this case, the electrode terminal is arranged at a position higher than the metal base plate by the thickness of the bottom of the resin case, and is sealed together with the power semiconductor device by the gel insulator.
[0004]
[Patent Document 1]
JP-A-11-87567 ([0016] to [0018], FIG. 2)
[Patent Document 2]
JP-A-9-232510 (page 3, FIG. 1)
[Patent Document 3]
JP-A-6-62550 ([0008] to [0009], FIG. 4)
[Patent Document 4]
JP-A-11-26691 ([0012] to [0013], FIG. 1)
[0005]
[Problems to be solved by the invention]
By the way, in the manufacturing process of this type of power semiconductor module, a power semiconductor device, an electrode terminal and the like are arranged in a casing, and a gel insulator is poured into the casing. Bubbles may be generated or mixed in the insulator. When the gel insulator solidifies in a state where the air bubbles stay near the electrode terminal, a gap, that is, a portion where the sealing resin does not exist is generated between the electrode terminal and the metal base plate, and the electrode terminal and the metal The insulation creepage distance between the base plate and the base plate becomes short, and insulation failure may occur. Here, the “insulating creepage distance” refers to the case where the electrode terminal and the metal base plate are arranged near the opening at the bottom of the resin case so as to sandwich the bottom of the resin case. It means the distance (thickness) of the portion gelatinous insulator is present between the (reference d 2 in Figure 1 (b)).
[0006]
The present invention has been made in order to solve the above-described conventional problems, and when a power semiconductor device, an electrode terminal, and the like are housed in a casing and a gel-like insulator is injected, bubbles are generated near the electrode terminal. It is an object of the present invention to provide a semiconductor module capable of preventing the insulation creepage distance between an electrode terminal and a metal base plate from becoming short and preventing insulation failure from occurring even in the case where or occurs.
[0007]
[Means for Solving the Problems]
The power semiconductor module according to the present invention, which has been made to solve the above problems, includes (i) a power semiconductor chip (power semiconductor element), and (ii) a back surface of the power semiconductor chip on the front side main surface. An insulating substrate provided with a circuit pattern to be attached, (iii) a metal base plate to which the back main surface of the insulating substrate is soldered to the front main surface, and (iv) a power semiconductor chip and the insulating substrate. A case in which the bottom opening end is fixed to the periphery of the front main surface of the metal base plate; and (v) a plate-like electrode terminal inserted into the case and one end of which is exposed on the inner side surface of the bottom opening end. (Vi) a gel resin covering (sealing) the power semiconductor chip, the insulating substrate, and the electrode terminal; and (vii) a portion of the inner surface of the bottom opening end where the one end of the electrode terminal is located. The bottom open end is in contact with the metal base plate. Between the sites, in which the protrusion of the insulating partially protrude inward module is characterized in that it is arranged.
[0008]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be specifically described with reference to the accompanying drawings.
Embodiment. 1
As shown in FIG. 1A, a plurality of power semiconductor chips 2 (hereinafter abbreviated as “semiconductor chips 2”) are provided in a power semiconductor module 1 (hereinafter abbreviated as “semiconductor module 1”). ) And an insulating substrate 3 are provided. Here, a circuit pattern (not shown) to which the back surface of each semiconductor chip 2 is soldered is formed on the front side main surface (upper side main surface) of the insulating substrate 3.
[0009]
The back main surface (lower main surface) of the insulating substrate 3 is joined to the front main surface (upper main surface) of the metal base plate 5 (heat radiating plate) using solder 4 (soldered). ). As a material of the metal base plate 5, for example, copper or the like is used. Further, a bottom opening end 6 a of a resin case 6 surrounding the semiconductor chip 2 and the insulating substrate 3 is fixed to a peripheral portion of the front main surface of the metal base plate 5. As a material of the resin case 6, for example, an epoxy resin is used. The bottom opening end 6a protrudes from the bottom of the side wall of the resin case 6 toward the inside of the module.
[0010]
A bent plate-shaped electrode terminal 7 is inserted into the upper surface of the bottom opening end 6 a of the resin case 6. That is, the electrode terminal 7 is fitted into the cutout portion of the upper surface of the bottom opening end 6a. As a material of the electrode terminal 7, for example, copper or the like is used. The electrode terminal 7 is electrically connected to a power semiconductor element (the wiring pattern of the insulating substrate 3) via a wire 8 made of a conductive material. Here, the inner end portion 7a (end surface) of the electrode terminal 7 is viewed in the lateral direction (lateral direction) with the inner surface 6b of the bottom opening end 6a in a vertical wall shape (perpendicular to the front main surface of the metal base plate 5). Located on the same plane (exposed).
[0011]
On the inner side surface 6b of the bottom opening end 6a, two insulating portions partially projecting toward the inside of the module are provided between the inner end portion 7a of the electrode terminal 7 and the front main surface of the metal base plate 5. Are provided. Here, the protrusion 10 is formed integrally with the resin case 6. However, the protrusion 10 may be formed as a separate member from an insulating material and attached to the inner surface 6b of the bottom open end 6a (may be inserted). One of the two projections 10 is located near the upper end of the inner surface 6b of the bottom opening end 6a, and the other is located at a position slightly lower than the intermediate position (height) of the inner surface 6b. Note that the lower protrusion 10 may be omitted.
[0012]
In this semiconductor module 1, a box-shaped or container-shaped casing composed of a metal base plate 5 and a resin case 6 is filled with a gel resin 9, and a power semiconductor device (semiconductor chip 2, insulating substrate 3), electrodes The terminal 7 and the wire 8 are covered (sealed) by the gel resin 9.
[0013]
When the semiconductor module 1 is manufactured, the power semiconductor device including the semiconductor chip 2 and the insulating substrate 3, the electrode terminals 7, the wires 8, and the like are placed in a casing including the metal base plate 5 and the resin case 6. And the gel-like resin 9 is poured into the casing. In this case, bubbles 11 may be generated or mixed in the vicinity of the inner end 7a of the electrode terminal 7, and may stay there. However, the downward spread or movement of the bubble 11 is prevented by the upper protrusion 10.
[0014]
Therefore, even when the gel resin 9 is solidified in a state where the air bubbles 11 stay near the inner end 7 a of the electrode terminal 7, most of the inner side surface 6 b of the bottom opening end 6 a is covered with the gel resin 9, an inner end portion 7a of the terminal 7, the insulation creepage distance d 1 between the front main surface of the metal base plate 5 is not short, the substantially the same as the height of the inner surface 6b of the bottom open end 6a. Therefore, insulation failure of the electrode terminal 7 does not occur.
[0015]
As shown in FIG. 1B, when no protrusion is provided on the inner side surface 6b of the bottom opening end 6a, bubbles 11 generated or mixed in the vicinity of the inner end 7a of the electrode terminal 7 are removed from the bottom opening end 6a. spreads downward along the inner surface 6b of 6a, or so moves, the insulation creepage distance d 2 between the inner end portion 7a and the front main surface of the metal base plate 5 of the electrode terminals 7 is shortened, the electrode terminals 7 May cause insulation failure.
[0016]
Embodiment 2 FIG.
Hereinafter, a second embodiment of the present invention will be described with reference to FIG. However, since the semiconductor module according to the second embodiment has many points in common with the semiconductor module according to the first embodiment, in order to avoid duplication of description, the following mainly describes differences from the first embodiment. Note that among the components of the semiconductor module shown in FIG. 2, those that are common to the components of the semiconductor module shown in FIG. 1A are denoted by the same reference numerals as in FIG. 1A.
[0017]
As shown in FIG. 2, in the semiconductor module 1 according to the second embodiment, unlike the semiconductor module 1 according to the first embodiment, no protrusion is provided on the inner side surface 6b of the bottom opening end 6a. A groove 12 (recess) is formed in the front main surface of the metal base plate 5 in the vicinity of a position corresponding to the inner end 7a of the electrode terminal 7 in the lateral direction (left-right direction). That is, below the inner end 7a of the electrode terminal 7, the upper surface of the metal base plate 5 (the upper surface of the groove 12) is located below the lower end surface of the bottom opening end 6a. Other points are the same as in the first embodiment.
[0018]
In the semiconductor module 1 according to the second embodiment, the distance between the inner end 7a of the electrode terminal 7 and the upper surface of the metal base plate 5 (the upper surface of the groove 12) in the up-down direction according to the first embodiment. It is longer than the semiconductor module or the conventional semiconductor module by the depth of the groove 12. Therefore, even if the bubbles 11 generated or mixed in the vicinity of the inner end 7a of the electrode terminal 7 spread downward or move along the inner side surface 6b of the bottom opening end 6a having no projection, the electrode terminal is not affected. insulation creepage distance d 3 between the 7 of the inner end portion 7a and the upper surface of the metal base plate 5 (the groove 12 the upper surface of) can be sufficiently ensured. Therefore, insulation failure of the electrode terminal 7 does not occur.
[0019]
Further, in the semiconductor module 1 according to the first embodiment, when the gel resin 9 is injected, the clearance of the protrusion 10 provided on the inner side surface 6b of the bottom opening end 6a of the resin case 6 or the upper protrusion is formed. There is a possibility that air bubbles may be generated or mixed in the lower side of 10 and stay there. However, in the second embodiment, since no projection is provided on the inner side surface 6b of the bottom opening end 6a, such stagnation of bubbles can be prevented. Further, in the semiconductor module according to the second embodiment, since it is not necessary to form a protrusion on the inner side surface 6b of the bottom opening end 6a, the resin case 6 can be easily formed as compared with the first embodiment (forming). Good nature).
[0020]
【The invention's effect】
According to the present invention, even when the gel-like insulator is solidified in a state where air bubbles stay near one end of the electrode terminal, most of the inner side surface of the bottom opening end is covered with the gel-like insulating portion, and one end of the electrode terminal is provided. The insulation creepage distance between the metal plate and the front side main surface of the metal base plate is not reduced, and is substantially the same as the height of the inner surface of the bottom opening end. For this reason, insulation failure of the electrode terminals does not occur.
[Brief description of the drawings]
FIG. 1A is an elevational sectional view of a semiconductor module according to a first embodiment of the present invention, and FIG. 1B is an elevational sectional view of a main part of a semiconductor module having no projection.
FIG. 2 is an elevational sectional view of a semiconductor module according to a second embodiment of the present invention;
[Explanation of symbols]
Reference Signs List 1 semiconductor module, 2 semiconductor chip, 3 insulating substrate, 4 solder, 5 metal base plate, 6 resin case, 6a bottom opening end, 6b inner side surface, 7 electrode terminal, 7a inner end, 8 wire, 9 gel resin, 10 protrusions, 11 bubbles, 12 grooves.

Claims (2)

電力用半導体チップと、
表側主面に、前記電力用半導体チップの裏面が半田付けされる回路パターンを備えた絶縁基板と、
表側主面に、前記絶縁基板の裏側主面が半田付けされる金属ベース板と、
前記電力用半導体チップ及び前記絶縁基板を囲繞するとともに、その底部開口端が前記金属ベース板の表側主面の周縁部に固着されたケースと、
前記ケースにインサートされ、その一端が前記底部開口端の内側面に露出する板状の電極端子と、
前記電力用半導体チップ、前記絶縁基板及び前記電極端子を覆うゲル状樹脂とを備えていて、
前記底部開口端の内側面の、前記電極端子の前記一端が位置する部位と前記底部開口端が前記金属ベース板と当接する部位との間に、モジュール内側に向かって部分的に突出する絶縁性の突起部が配設されていることを特徴とする電力用半導体モジュール。A power semiconductor chip;
On the front side main surface, an insulating substrate having a circuit pattern to which the back surface of the power semiconductor chip is soldered,
On the front side main surface, a metal base plate to which the back side main surface of the insulating substrate is soldered,
A case that surrounds the power semiconductor chip and the insulating substrate, and has a bottom opening end fixed to a peripheral portion of a front main surface of the metal base plate;
A plate-shaped electrode terminal inserted into the case, one end of which is exposed on the inner surface of the bottom opening end;
The power semiconductor chip, comprising a gel-like resin covering the insulating substrate and the electrode terminal,
Insulation that partially protrudes toward the inside of the module between a portion of the inner surface of the bottom opening end where the one end of the electrode terminal is located and a portion where the bottom opening end contacts the metal base plate. A power semiconductor module, wherein the protrusions are disposed. 電力用半導体チップと、
表側主面に、前記電力用半導体チップの裏面が半田付けされる回路パターンを備えた絶縁基板と、
表側主面に、前記絶縁基板の裏側主面が半田付けされる金属ベース板と、
前記電力用半導体チップ及び前記絶縁基板を囲繞するとともに、その底部開口端が前記金属ベース板の表側主面の周縁部に固着されたケースと、
前記ケースにインサートされ、その一端が前記底部開口端の内側面に露出する板状の電極端子と、
前記電力用半導体チップ、前記絶縁基板及び前記電極端子を覆うゲル状樹脂とを備えていて、
前記電極端子の前記一端の位置と対応する位置において、前記金属ベース板の表側主面に凹部が形成されていることを特徴とする電力用半導体モジュール。A power semiconductor chip;
On the front side main surface, an insulating substrate having a circuit pattern to which the back surface of the power semiconductor chip is soldered,
On the front side main surface, a metal base plate to which the back side main surface of the insulating substrate is soldered,
A case that surrounds the power semiconductor chip and the insulating substrate, and has a bottom opening end fixed to a peripheral portion of a front main surface of the metal base plate;
A plate-shaped electrode terminal inserted into the case, one end of which is exposed on the inner surface of the bottom opening end;
The power semiconductor chip, comprising a gel-like resin covering the insulating substrate and the electrode terminal,
A power semiconductor module, wherein a concave portion is formed on a front main surface of the metal base plate at a position corresponding to the position of the one end of the electrode terminal.
JP2002379805A 2002-12-27 2002-12-27 Power semiconductor module Expired - Fee Related JP4253183B2 (en)

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WO2014057765A1 (en) * 2012-10-12 2014-04-17 住友電気工業株式会社 Semiconductor device and method for manufacturing same
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Publication number Priority date Publication date Assignee Title
US7728413B2 (en) 2005-09-07 2010-06-01 Denso Corporation Resin mold type semiconductor device
US8558361B2 (en) 2010-04-12 2013-10-15 Mitsubishi Electric Corporation Power semiconductor module
WO2014057765A1 (en) * 2012-10-12 2014-04-17 住友電気工業株式会社 Semiconductor device and method for manufacturing same
JP2014082233A (en) * 2012-10-12 2014-05-08 Sumitomo Electric Ind Ltd Semiconductor device and method of manufacturing the same
WO2019008828A1 (en) * 2017-07-03 2019-01-10 三菱電機株式会社 Semiconductor device
JP6461441B1 (en) * 2017-07-03 2019-01-30 三菱電機株式会社 Semiconductor device
CN111162049A (en) * 2018-11-07 2020-05-15 三菱电机株式会社 Semiconductor device with a plurality of semiconductor chips
JP2020077725A (en) * 2018-11-07 2020-05-21 三菱電機株式会社 Semiconductor device
JP7005469B2 (en) 2018-11-07 2022-02-04 三菱電機株式会社 Semiconductor device
US11694938B2 (en) 2018-11-07 2023-07-04 Mitsubishi Electric Corporation Semiconductor device
CN111162049B (en) * 2018-11-07 2023-09-26 三菱电机株式会社 Semiconductor device with a semiconductor device having a plurality of semiconductor chips
JPWO2021144980A1 (en) * 2020-01-17 2021-07-22

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