JP2003304060A - Method of manufacturing double-sided circuit board - Google Patents
Method of manufacturing double-sided circuit boardInfo
- Publication number
- JP2003304060A JP2003304060A JP2002110099A JP2002110099A JP2003304060A JP 2003304060 A JP2003304060 A JP 2003304060A JP 2002110099 A JP2002110099 A JP 2002110099A JP 2002110099 A JP2002110099 A JP 2002110099A JP 2003304060 A JP2003304060 A JP 2003304060A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- holes
- base material
- insulating base
- double
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【発明の詳細な説明】
【０００１】
【発明の属する技術分野】本発明は両面回路基板の製造
法に関し、特には、回路基板内に抵抗体及び誘電体を有
することにより実装部品点数を減少させることが可能で
ある両面回路基板の製造法に関する。
【０００２】
【従来の技術とその問題点】近年、電子機器の小型化と
高機能化は益々促進されてきており、そのために回路基
板に対しては高密度実装に対応するため、実装基板に対
しては薄膜化、平坦化、抵抗体や誘電体等の実装部品に
対しては精度を確保した上での小型化の要求が高まって
きている。
【０００３】これに対して、従来は回路基板を製造した
後、抵抗体や誘電体等の実装部品を実装し、回路基板の
厚さに実装部品の厚さが加わるため実装後の基板の厚さ
を薄くすることは困難であった。実装部品の小型化も進
んではいるものの例えば可撓性基板の絶縁ベース材の厚
さである25〜50μmに比べると抵抗体の厚さが数百μmあ
ることからも、部品実装後の基板の厚さを抑えることが
困難であることが伺える。
【０００４】また、回路基板の実装密度が高まり、実装
部品点数が増加すると、実装コストも増大し、実装時の
歩留まりを下げる要因にもなっている。
【０００５】
【課題を解決するための手段】本発明は、上記従来例の
問題を好適に解決するための方法を提供するものであっ
て、絶縁べース材の両面に導体層を有する材料を用意
し、前記一方の導体層をマスク層として前記絶縁ベース
材の所定の位置にレーザー加工、プラズマエッチング手
法、ウエットエッチング手法を用いて複数の孔を形成
し、この孔に抵抗率および誘電率の異なるペースト又は
インキを充填することを特徴とする両面回路基板の製造
法が採用される。
【０００６】
【発明の実施の形態】以下、図示の実施例を参照しなが
ら本発明をさらに説明する。図１は、本発明の一実施例
による両面可撓性回路基板の製造工程図である。先ず、
同図（１）のように両面銅張り板等の絶縁べース材２の
両面に導体層１，３を有する材料を用意し、その一方の
導体層１をエッチングにより加工し、絶縁ベース材２を
レーザー加工、プラズマエッチング手法、ウエットエッ
チング手法で孔加工するために必要な孔４を形成してマ
スク層に形成する。
【０００７】次に、同図（２）に示すように導体層１を
マスク層として用いて絶縁ベース材２にレーザー加工、
プラズマエッチング手法、ウエットエッチング手法で薄
膜加工を行い、導電ペースト又は導電インキを充填する
ための孔５を形成する。
【０００８】その後、同図（３）に示すようにペース
ト、インキの印刷に用いるマスクを用い、誘電率あるい
抵抗率が高いペースト又はインキ６を形成された孔５の
一つに充填した後、これに熱処理を加える。
【０００９】次に、同図（４）に示すように同様にペー
スト、インキの印刷に用いるマスクを用い、誘電率ある
い抵抗率が高いペースト又はインキ７を形成された孔５
の他の一つに充填し、同様にこれに熱処理を加える。
【００１０】その後、同様に同図（５）に示すようにペ
ースト、インキの印刷に用いるマスクを用い、抵抗率が
低い導電ペースト又は導電インキ８を形成された残る孔
５に充填し、これに同様に熱処理を加える。
【００１１】さらに、同図（６）に示すように導体層
１，３に配線加工を行なって必要な配線パターン９，１
０，１１を形成し、両面可撓性回路基板を得る。
【００１２】
【発明の効果】本発明による両面回路基板の製造法によ
れば、導体層および孔加工が施された絶縁ベース材に抵
抗体、誘電体、導電体のペースト、インキを充填した構
造を有しているから従来の実装基板の製造方法では困難
であった実装後の基板の薄膜化、平坦化が好適に達成で
きる。
【００１３】そして、回路基板内部に抵抗体、誘電体を
有しているから、実装部品点数を減少させることが可能
となり実装コストの低減が好適に達成できる。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a double-sided circuit board, and more particularly, to reducing the number of mounted components by providing a resistor and a dielectric in the circuit board. And a method for manufacturing a double-sided circuit board. 2. Description of the Related Art In recent years, miniaturization and high functionality of electronic devices have been increasingly promoted. On the other hand, there has been an increasing demand for mounting components such as thin films, flattening, resistors, dielectrics, and the like while ensuring accuracy and miniaturization. On the other hand, conventionally, after a circuit board is manufactured, mounting parts such as a resistor and a dielectric are mounted, and the thickness of the mounting part is added to the thickness of the circuit board. It was difficult to reduce the thickness. Although the miniaturization of mounted components is also progressing, for example, since the thickness of the resistor is several hundred μm compared to the thickness of the insulating base material of the flexible substrate of 25 to 50 μm, It can be said that it is difficult to suppress the thickness. Further, as the mounting density of the circuit board increases and the number of mounted components increases, the mounting cost also increases, which is a factor that lowers the yield during mounting. [0005] The present invention provides a method for suitably solving the above-mentioned problems of the prior art, and comprises a material having conductive layers on both surfaces of an insulating base material. A plurality of holes are formed at predetermined positions of the insulating base material using the one conductor layer as a mask layer by using a laser processing, a plasma etching method, and a wet etching method, and the resistivity and the dielectric constant are formed in the holes. And a method of manufacturing a double-sided circuit board characterized by filling with different pastes or inks. The present invention will be further described below with reference to the illustrated embodiments. FIG. 1 is a manufacturing process diagram of a double-sided flexible circuit board according to an embodiment of the present invention. First,
As shown in FIG. 1A, a material having conductor layers 1 and 3 on both sides of an insulating base material 2 such as a double-sided copper-clad board is prepared, and one of the conductor layers 1 is processed by etching to form an insulating base material. 2 is formed in a mask layer by forming a hole 4 necessary for forming a hole by laser processing, plasma etching, or wet etching. Next, as shown in FIG. 2B, the insulating base material 2 is laser-processed using the conductor layer 1 as a mask layer.
A thin film is processed by a plasma etching method or a wet etching method, and a hole 5 for filling a conductive paste or conductive ink is formed. After that, as shown in FIG. 3 (3), a paste or ink 6 having a high dielectric constant or a high resistivity is filled into one of the holes 5 in which the paste or ink 6 is formed using a mask used for printing the paste or ink. This is subjected to a heat treatment. Next, as shown in FIG. 4D, similarly, using a mask used for printing the paste or ink, the holes 5 having the paste or ink 7 having a high dielectric constant or high resistivity are formed.
And heat-treated similarly. Thereafter, as shown in FIG. 5 (5), a conductive paste or conductive ink 8 having a low resistivity is filled into the remaining holes 5 formed by using a mask used for printing the paste and ink. Similarly, heat treatment is applied. Further, as shown in FIG. 6 (6), wiring processing is performed on the conductor layers 1 and 3 so that necessary wiring patterns 9 and 1 are formed.
0 and 11 are formed to obtain a double-sided flexible circuit board. According to the method for manufacturing a double-sided circuit board according to the present invention, a structure in which a conductive layer and a hole-formed insulating base material are filled with a resistor, a dielectric, a conductive paste and an ink. Therefore, thinning and flattening of the board after mounting, which has been difficult with the conventional mounting board manufacturing method, can be suitably achieved. Since the resistor and the dielectric are provided inside the circuit board, the number of mounted components can be reduced, and the mounting cost can be suitably reduced.
【図面の簡単な説明】
【図１】本発明の一実施例による両面回路基板の製造工
程図。
【符号の説明】
１ 導体層
２ 絶縁ベース材
３ 導体層
４ 孔
５ 孔
６ 誘電率あるい抵抗率が高いペースト、インキ
７ 誘電率あるい抵抗率が高いペースト、インキ
８ 抵抗率が低い導電ペースト、導電インキ
９ 配線パターン
１０ 配線パターン
１１ 配線パターンBRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a manufacturing process diagram of a double-sided circuit board according to one embodiment of the present invention. [Description of Signs] 1 Conductive layer 2 Insulating base material 3 Conductive layer 4 Hole 5 Hole 6 Paste with high permittivity or resistivity, ink 7 Paste with high permittivity or resistivity, Ink 8 Conductive paste with low resistivity , Conductive ink 9 wiring pattern 10 wiring pattern 11 wiring pattern
Claims (1)
を用意し、前記一方の導体層をマスク層として前記絶縁
ベース材の所定の位置にレーザー加工、プラズマエッチ
ング手法、ウエットエッチング手法を用いて複数の孔を
形成し、この孔に抵抗率および誘電率の異なるペースト
又はインキを充填することを特徴とする両面回路基板の
製造法。Claims: 1. A material having conductor layers on both sides of an insulating base material is prepared, and laser processing is performed on a predetermined position of the insulating base material using the one conductor layer as a mask layer. A method for manufacturing a double-sided circuit board, comprising: forming a plurality of holes by using an etching technique and a wet etching technique; and filling the holes with paste or ink having different resistivity and dielectric constant.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002110099A JP2003304060A (en) | 2002-04-12 | 2002-04-12 | Method of manufacturing double-sided circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002110099A JP2003304060A (en) | 2002-04-12 | 2002-04-12 | Method of manufacturing double-sided circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2003304060A true JP2003304060A (en) | 2003-10-24 |
Family
ID=29393346
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002110099A Pending JP2003304060A (en) | 2002-04-12 | 2002-04-12 | Method of manufacturing double-sided circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2003304060A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007266323A (en) * | 2006-03-28 | 2007-10-11 | Matsushita Electric Works Ltd | Substrate incorporating electronic component, manufacturing method thereof, and manufacturing method of electronic component |
| JP2007305825A (en) * | 2006-05-12 | 2007-11-22 | Nippon Mektron Ltd | Method for manufacturing circuit board |
| JP2015056604A (en) * | 2013-09-13 | 2015-03-23 | 株式会社デンソー | Conductive material filling method, and conductive material filling device |
-
2002
- 2002-04-12 JP JP2002110099A patent/JP2003304060A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007266323A (en) * | 2006-03-28 | 2007-10-11 | Matsushita Electric Works Ltd | Substrate incorporating electronic component, manufacturing method thereof, and manufacturing method of electronic component |
| JP2007305825A (en) * | 2006-05-12 | 2007-11-22 | Nippon Mektron Ltd | Method for manufacturing circuit board |
| JP2015056604A (en) * | 2013-09-13 | 2015-03-23 | 株式会社デンソー | Conductive material filling method, and conductive material filling device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7570491B2 (en) | Printed circuit board with embedded capacitors therein, and process for manufacturing the same | |
| JP2005142523A (en) | Method of manufacturing printed circuit board including buried resistor | |
| JP2001210956A (en) | Multilayer laminate | |
| JP2008130748A (en) | Method of manufacturing printed circuit board containing resistive element | |
| JP2006156547A (en) | Wiring circuit board and manufacturing method thereof | |
| CN102469691A (en) | Printed circuit board and method of manufacturing the same | |
| JP2004064052A (en) | Noise shielding type laminated substrate and its manufacturing method | |
| JP2003304060A (en) | Method of manufacturing double-sided circuit board | |
| US20060096780A1 (en) | Thin film circuit integrating thick film resistors thereon | |
| CN110650587A (en) | Flexible circuit board and manufacturing method thereof | |
| JP2003324027A (en) | Method of manufacturing laminated electronic component | |
| KR20020085635A (en) | Routing method of the outside of a castle type printed circuit board | |
| JP2006229097A (en) | Capacitor film and manufacturing method therefor | |
| JP4252227B2 (en) | Manufacturing method of double-sided flexible circuit board | |
| JP2004031699A (en) | Ceramic circuit board and method for manufacturing the same | |
| JP2009094330A (en) | Substrate for wiring board and method for manufacturing the same | |
| JP2004014553A (en) | Print circuit substrate and chip part, and manufacturing method thereof | |
| JP4501570B2 (en) | Manufacturing method of multilayer wiring board with built-in capacitor | |
| JP2005340728A (en) | Laminated ceramic electronic component, circuit board and the like, and manufacturing method of ceramic green sheet including electrode and the like for manufacturing same component, same circuit board and the like | |
| JPH0410753B2 (en) | ||
| JP2681205B2 (en) | Printed wiring board with membrane element | |
| JP2000323837A (en) | Manufacture of multilayer printed wiring board | |
| JP2003224364A (en) | Multilayer printed wiring board | |
| JP2007027238A (en) | Resistive element and multilayer wiring board incorporating the same, and method of adjusting resistance value of resistive element | |
| JP2003298207A (en) | Manufacturing method of double-side circuit board |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20040607 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20060720 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20060801 |
|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20061205 |