JP2003078168A - Nitride semiconductor light emitting element - Google Patents

Nitride semiconductor light emitting element

Info

Publication number
JP2003078168A
JP2003078168A JP2001263361A JP2001263361A JP2003078168A JP 2003078168 A JP2003078168 A JP 2003078168A JP 2001263361 A JP2001263361 A JP 2001263361A JP 2001263361 A JP2001263361 A JP 2001263361A JP 2003078168 A JP2003078168 A JP 2003078168A
Authority
JP
Japan
Prior art keywords
nitride semiconductor
light emitting
layer
electrode
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2001263361A
Other languages
Japanese (ja)
Inventor
Toshio Hata
俊雄 幡
Mayuko Fudeta
麻祐子 筆田
Hiroaki Kimura
大覚 木村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP2001263361A priority Critical patent/JP2003078168A/en
Publication of JP2003078168A publication Critical patent/JP2003078168A/en
Withdrawn legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/0212Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
    • H01L2224/02163Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
    • H01L2224/02165Reinforcing structures
    • H01L2224/02166Collar structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress

Abstract

PROBLEM TO BE SOLVED: To provide a nitride semiconductor light emitting element that is improved in luminous efficiency by preventing the occurrence of cracks at the time of forming a pad electrode or joining a wire. SOLUTION: This nitride semiconductor light emitting element includes a laminated nitride semiconductor structure containing a plurality of nitride semiconductor layers including a light emitting layer, a pedestal electrode containing a nitride semiconductor layer and a silicon layer on the structure, and the pad electrode formed on the pedestal electrode. The pedestal electrode relieves the stress generated in the light emitting element at the time of forming the pad electrode or joining the wire to the pad electrode, and the silicon layer contained in the pedestal electrode can be utilized as a substrate on which the light emitting element is grown.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は青色領域から紫外光
領域で発光可能な窒化物半導体発光素子に関し、特に窒
化物半導体発光素子におけるクラックの発生を防止し得
る電極構造に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a nitride semiconductor light emitting device capable of emitting light in a blue region to an ultraviolet light region, and more particularly to an electrode structure capable of preventing the occurrence of cracks in the nitride semiconductor light emitting device.

【0002】[0002]

【従来の技術】従来から、窒化物半導体発光素子は青色
発光素子として利用できることが知られており、近年で
は青色の発光ダイオードや青紫色の半導体レーザなどが
研究されている。かかる窒化物半導体発光素子の構造と
しては、特開平11−177142号公報においてGa
N系の半導体層等の積層体にp型パッド電極を直接形成
したものが開示されている。この構造を図5に示す。
2. Description of the Related Art Conventionally, it has been known that a nitride semiconductor light emitting device can be used as a blue light emitting device, and in recent years, blue light emitting diodes and blue-violet semiconductor lasers have been studied. The structure of such a nitride semiconductor light emitting device is described in Japanese Patent Application Laid-Open No. 11-177142, Ga.
It is disclosed that a p-type pad electrode is directly formed on a laminated body such as an N-based semiconductor layer. This structure is shown in FIG.

【0003】[0003]

【発明が解決しようとする課題】しかしながら特開平1
1−177142号公報に開示されたように、窒化物半
導体層に直接パッド電極を形成する手法をとった場合に
は、パッド電極を形成する際に発光素子に発生する応力
のために発光素子にクラックが生じることがある。ま
た、発光素子に発光素子外部から電流を供給するために
はパッド電極に金属製のワイヤを接合する加工等をする
必要があるが、この加工をする際にも発光素子に応力が
発生するため、発光素子にクラックが生じ得る。したが
って、クラックが発生した発光素子に外部から電流を供
給した場合には、発光素子においてクラックを介して電
流が流れるため、電気的に短絡してしまい、発光素子が
発光しないという問題があった。
[Patent Document 1] Japanese Unexamined Patent Application Publication No.
As disclosed in Japanese Patent Laid-Open No. 1-177142, when the method of directly forming the pad electrode on the nitride semiconductor layer is adopted, the light emitting element may be damaged due to the stress generated in the light emitting element when the pad electrode is formed. Cracks may occur. Further, in order to supply a current to the light emitting element from the outside of the light emitting element, it is necessary to perform processing such as bonding a metal wire to the pad electrode, but stress is also generated in the light emitting element during this processing. The light emitting element may be cracked. Therefore, when a current is supplied from the outside to the light emitting element in which a crack has occurred, a current flows through the crack in the light emitting element, resulting in an electrical short circuit, and there is a problem that the light emitting element does not emit light.

【0004】そこで、本発明では窒化物半導体発光素子
において、パッド電極の形成またはワイヤの接合等の際
に発光素子に生じるクラックの発生および発光素子の短
絡を防止し、ひいては発光素子の信頼性向上を可能にす
ることを目的とする。
Therefore, in the present invention, in the nitride semiconductor light emitting device, the generation of cracks and the short circuit of the light emitting device which occur when the pad electrode is formed or the wire is joined is prevented, and the reliability of the light emitting device is improved. The purpose is to enable.

【0005】[0005]

【課題を解決するための手段】上記目的を達成するた
め、本発明は、発光層を含む複数の窒化物半導体層から
成る窒化物半導体積層構造体と、この積層構造体上に窒
化物半導体層とシリコン層を含む台座電極とを含み、こ
の台座電極上に形成されたパッド電極をさらに含む窒化
物半導体発光素子であることを特徴としている。
In order to achieve the above object, the present invention provides a nitride semiconductor laminated structure including a plurality of nitride semiconductor layers including a light emitting layer, and a nitride semiconductor layer on the laminated structure. And a pedestal electrode including a silicon layer, and further includes a pad electrode formed on the pedestal electrode, which is a nitride semiconductor light emitting device.

【0006】台座電極に含まれるシリコン層は、上述の
窒化物半導体積層構造体を成長させる基板として利用さ
れたものであり得る。このシリコン層は、導電性または
非導電性でもよく、好ましくは導電性である。
The silicon layer included in the pedestal electrode may be one used as a substrate for growing the above-described nitride semiconductor laminated structure. This silicon layer may be conducting or non-conducting, and is preferably conducting.

【0007】また、台座電極に含まれる窒化物半導体層
は、上述の窒化物半導体積層構造体を成長させる際のバ
ッファ層として利用されたものであり得る。この窒化物
半導体層は導電性または非導電性の性質を有する。
Further, the nitride semiconductor layer included in the pedestal electrode may be used as a buffer layer when growing the above-mentioned nitride semiconductor laminated structure. This nitride semiconductor layer has a conductive or non-conductive property.

【0008】また、台座電極表面またはパッド電極表面
または窒化物半導体積層構造体の発光面に透明導電膜を
含めることもできる。
Further, a transparent conductive film may be included on the surface of the pedestal electrode or the surface of the pad electrode or the light emitting surface of the nitride semiconductor laminated structure.

【0009】また、台座電極に含まれる窒化物半導体層
が非導電性である場合には、この窒化物半導体層は電流
阻止層として機能し得る。
When the nitride semiconductor layer included in the pedestal electrode is non-conductive, this nitride semiconductor layer can function as a current blocking layer.

【0010】[0010]

【発明の実施の形態】以下、本発明についてより詳細に
説明する。
BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be described in more detail below.

【0011】本発明における窒化物半導体発光素子は、
たとえば、n型窒化物半導体層、発光層、p型窒化物半
導体層、p型窒化物半導体コンタクト層を順次積層した
構造体から成り、さらにp型窒化物半導体コンタクト層
上にp型電極層およびp型台座電極層を順次形成した構
造体を含み、その構造体上に窒化物半導体層とシリコン
層を含む台座電極を含み、この台座電極上に形成された
パッド電極を含んでいる。ただし、上述した構造体の構
成は上記に限られない。また、台座電極に含まれる窒化
物半導体層および構造体に含まれる発光層を含む窒化物
半導体層の材質としては、InxAlyGa1-x-yN(0
≦x、0≦y、x+y≦1)等がある。また、発光層と
してはMQW(多重量子井戸)発光層またはSQW(単
一量子井戸)発光層等がある。
The nitride semiconductor light emitting device of the present invention comprises
For example, it is composed of a structure in which an n-type nitride semiconductor layer, a light emitting layer, a p-type nitride semiconductor layer, and a p-type nitride semiconductor contact layer are sequentially stacked, and a p-type electrode layer and a p-type electrode layer are formed on the p-type nitride semiconductor contact layer. The structure includes a p-type pedestal electrode layer sequentially formed, a pedestal electrode including a nitride semiconductor layer and a silicon layer on the structure, and a pad electrode formed on the pedestal electrode. However, the structure of the structure described above is not limited to the above. The material of the nitride semiconductor layer including a light emitting layer included in the nitride semiconductor layer and the structure contained in the pad electrode, In x Al y Ga 1- xy N (0
≦ x, 0 ≦ y, x + y ≦ 1) and the like. As the light emitting layer, there are an MQW (multiple quantum well) light emitting layer and an SQW (single quantum well) light emitting layer.

【0012】ここで、台座電極に含まれるシリコン層は
上述の積層構造体等を成長させる基板となり得る。すな
わち、上述の窒化物半導体発光素子の構成において説明
すると、この窒化物半導体発光素子は台座電極に含まれ
るシリコン層上にn型窒化物半導体層、発光層、p型窒
化物半導体層、p型窒化物半導体コンタクト層を順次積
層した後、p型電極層、p型台座電極層を順次形成し、
台座電極をエッチング等の手法で円形状または正方形状
等に形成することにより作製され得る。ここで、台座電
極は積層構造体の中央の位置に作製することが好まし
い。また、台座電極の形状は円形状、正方形状等に限ら
れない。また、シリコン層のシリコン以外の材質として
は、導電性または非導電性であるGaAs、GaP、I
nP等であることが好ましい。
Here, the silicon layer included in the pedestal electrode can serve as a substrate for growing the above-mentioned laminated structure or the like. That is, the structure of the above-described nitride semiconductor light emitting device will be described. This nitride semiconductor light emitting device has an n-type nitride semiconductor layer, a light emitting layer, a p-type nitride semiconductor layer, and a p-type nitride semiconductor layer on a silicon layer included in a pedestal electrode. After sequentially stacking the nitride semiconductor contact layers, a p-type electrode layer and a p-type pedestal electrode layer are sequentially formed,
It can be manufactured by forming the pedestal electrode into a circular shape or a square shape by a method such as etching. Here, it is preferable that the pedestal electrode is formed at a central position of the laminated structure. The shape of the base electrode is not limited to the circular shape, the square shape, or the like. Further, as the material of the silicon layer other than silicon, conductive or non-conductive GaAs, GaP, I
It is preferably nP or the like.

【0013】この場合には特開平11−177142号
公報において開示されたように半導体層上に直接、別個
にパッド電極を形成するのではなく、台座電極に含まれ
るシリコン層上に発光素子を成長させ、台座電極の形状
を整えた後に台座電極上にパッド電極を形成することと
なる。したがって、パッド電極を台座電極上に形成する
際に発光素子に発生する応力を台座電極が緩衝し得るこ
とから、発光素子にかかる応力を軽減し得る。
In this case, the light emitting element is grown on the silicon layer included in the pedestal electrode instead of directly forming the pad electrode directly on the semiconductor layer as disclosed in JP-A-11-177142. Then, after adjusting the shape of the base electrode, the pad electrode is formed on the base electrode. Therefore, since the pedestal electrode can buffer the stress generated in the light emitting element when the pad electrode is formed on the pedestal electrode, the stress applied to the light emitting element can be reduced.

【0014】また、発光素子外部から電流を注入する場
合には、パッド電極にワイヤボンディング等する必要が
あるが、この際にも発光素子に生じる応力を台座電極が
緩衝し得ることから、発光素子にかかる応力を軽減し得
る。
Further, when a current is injected from the outside of the light emitting element, it is necessary to wire-bond the pad electrode. However, since the pedestal electrode can buffer the stress generated in the light emitting element at this time as well, the light emitting element can be buffered. It is possible to reduce the stress applied to.

【0015】したがって、本発明においては、パッド電
極を設置する際およびパッド電極にワイヤボンディング
する際の発光素子におけるクラックの発生を防止し得
る。
Therefore, in the present invention, it is possible to prevent the occurrence of cracks in the light emitting element when the pad electrode is installed and when the pad electrode is wire-bonded.

【0016】さらにこの場合には、金属、絶縁体膜等の
蒸着等により発光素子上に電極を別個形成したり、再成
長させたりする製造工程の必要がないため、金属、絶縁
体膜等を形成する場合の熱サイクルや熱応力等による発
光素子の歪みから生じるクラックを防止し得るだけでな
く、本発明における窒化物半導体発光素子の製造歩留り
および製品のコストパフォーマンスを向上し得る。
Further, in this case, since there is no need for a manufacturing process in which an electrode is separately formed on the light emitting element by vapor deposition of a metal or an insulator film or the like, or is regrown, a metal or an insulator film or the like is not required. Not only can cracks caused by strain of the light emitting element due to thermal cycles and thermal stress in the formation be prevented, but also the manufacturing yield of the nitride semiconductor light emitting element in the present invention and the cost performance of the product can be improved.

【0017】また、台座電極に含まれる窒化物半導体層
は、シリコン層上に上述の積層構造体を成長させる場合
にはバッファ層として使用され得る。また、この窒化物
半導体層は、導電性または非導電性の性質を有してい
る。この窒化物半導体層が導電性である場合には、台座
電極上のパッド電極にAu等のワイヤをボンディングす
ることにより、このワイヤから台座電極を通して発光素
子内部へ電流を注入し得る。
Further, the nitride semiconductor layer included in the pedestal electrode can be used as a buffer layer when the above-mentioned laminated structure is grown on the silicon layer. Further, this nitride semiconductor layer has a conductive or non-conductive property. When the nitride semiconductor layer is conductive, a wire such as Au can be bonded to the pad electrode on the pedestal electrode to inject a current from the wire into the light emitting element through the pedestal electrode.

【0018】また、この窒化物半導体層が非導電性であ
る場合には、電流阻止層として利用することもでき、窒
化物半導体層の下方に位置する発光層に電流を注入する
ことがないことから、この窒化物半導体層の下方に位置
する発光層からは発光することがない。したがって、発
光素子の発光層から発生した光がこの窒化物半導体層を
含む台座電極上に設置された光を透過しない金属等から
なるパッド電極等によって遮られることがないため、窒
化物半導体発光素子の外部発光効率を向上させることが
できる。さらにまた、この窒化物半導体層が非導電性で
ある場合には台座電極表面またはパッド電極表面または
発光素子の発光面等に透明導電膜を設置することによ
り、発光面上に均一に電流を拡げ、均一に発光すること
ができる。
When the nitride semiconductor layer is non-conductive, it can be used as a current blocking layer, and no current is injected into the light emitting layer located below the nitride semiconductor layer. Therefore, the light emitting layer located below the nitride semiconductor layer does not emit light. Therefore, since the light generated from the light emitting layer of the light emitting element is not blocked by the pad electrode made of a metal or the like which does not transmit the light and is installed on the pedestal electrode including the nitride semiconductor layer, the nitride semiconductor light emitting element The external luminous efficiency of can be improved. Furthermore, when the nitride semiconductor layer is non-conductive, a transparent conductive film is provided on the surface of the pedestal electrode or the surface of the pad electrode or the light emitting surface of the light emitting element to spread the current evenly on the light emitting surface. It is possible to emit light uniformly.

【0019】また、パッド電極はAu等の材質からなっ
ており、台座電極上に蒸着等の方法により設置され得
る。このパッド電極に外部電流注入用等のAu等のワイ
ヤがボンディングされ得る。この接合方法としては、熱
圧着と超音波圧着の併用による方法が好ましい。
Further, the pad electrode is made of a material such as Au and can be installed on the pedestal electrode by a method such as vapor deposition. A wire such as Au for injecting an external current may be bonded to the pad electrode. As this joining method, a method using both thermocompression bonding and ultrasonic pressure bonding is preferable.

【0020】[0020]

【実施例】以下、本発明の窒化物半導体発光素子の具体
的実施例を示すが、本発明はこれらの実施例により何ら
限定されるものではない。
EXAMPLES Specific examples of the nitride semiconductor light emitting device of the present invention will be shown below, but the present invention is not limited to these examples.

【0021】(実施例1)図1は本発明の実施例1によ
って作製された窒化物半導体発光素子の模式的な断面図
である。図1に示された実施例1による窒化物半導体発
光素子構造1000は、Siからなる導電性基板1およ
びGaNからなる窒化物半導体導電性バッファ層21に
より構成されるn型台座電極77、n型パッド電極7、
Auワイヤ10、n型窒化物半導体層3、発光層4、p
型窒化物半導体層5、p型窒化物半導体コンタクト層
6、p型電極91およびp型台座電極9を含んでいる。
p型電極91とp型台座電極9は金属膜からなり、発光
層4から発生した光を透過しないのに対して、n型窒化
物半導体層3は発光に対して透明であることから、本発
明の窒化物半導体発光素子はn型窒化物半導体層3表面
から発光することとなる。
Example 1 FIG. 1 is a schematic cross-sectional view of a nitride semiconductor light emitting device manufactured according to Example 1 of the present invention. The nitride semiconductor light emitting device structure 1000 according to the first embodiment shown in FIG. 1 includes an n-type pedestal electrode 77 and an n-type pedestal electrode 77 configured by a conductive substrate 1 made of Si and a nitride semiconductor conductive buffer layer 21 made of GaN. Pad electrode 7,
Au wire 10, n-type nitride semiconductor layer 3, light emitting layer 4, p
The p-type nitride semiconductor layer 5, the p-type nitride semiconductor contact layer 6, the p-type electrode 91 and the p-type pedestal electrode 9 are included.
Since the p-type electrode 91 and the p-type pedestal electrode 9 are made of a metal film and do not transmit the light generated from the light emitting layer 4, the n-type nitride semiconductor layer 3 is transparent to light emission. The nitride semiconductor light emitting device of the invention emits light from the surface of the n-type nitride semiconductor layer 3.

【0022】図1の窒化物半導体発光素子を作製する場
合、まず、MOCVD(有機金属気相成長法)装置内に
導電性基板1をセットし、この導電性基板1上に窒化物
半導体導電性バッファ層21を150nmの厚さに成長
させ、順次n型窒化物半導体層3を400nmの厚さ
に、発光層4を50nmの厚さに、p型窒化物半導体層
5を10nmの厚さに、そしてp型窒化物半導体コンタ
クト層6を200nmの厚さに成長させたウエハを形成
する。
When manufacturing the nitride semiconductor light emitting device of FIG. 1, first, the conductive substrate 1 is set in a MOCVD (metal organic chemical vapor deposition) apparatus, and the nitride semiconductor conductivity is set on the conductive substrate 1. The buffer layer 21 is grown to a thickness of 150 nm, the n-type nitride semiconductor layer 3 is formed to a thickness of 400 nm, the light emitting layer 4 is formed to a thickness of 50 nm, and the p-type nitride semiconductor layer 5 is formed to a thickness of 10 nm. Then, a wafer in which the p-type nitride semiconductor contact layer 6 is grown to a thickness of 200 nm is formed.

【0023】次に、装置からウエハを取り出し、p型窒
化物半導体コンタクト層6表面上にp型電極91として
Pd(パラジウム)を50nmの厚さに、そしてその上
にp型台座電極9としてNi(ニッケル)を80μmの
厚さに形成する。
Next, the wafer is taken out of the apparatus, and Pd (palladium) as a p-type electrode 91 having a thickness of 50 nm is formed on the surface of the p-type nitride semiconductor contact layer 6 and Ni as a p-type pedestal electrode 9 is formed thereon. (Nickel) is formed to a thickness of 80 μm.

【0024】次に、フォト工程により導電性基板1をフ
ッ酸系エッチング液にて不要な部分を除去し、円形状に
加工する。このとき直径を100μmに形成する。ま
た、このときこの円形状以外の領域では窒化物半導体導
電性バッファ層21が露出している。
Next, the conductive substrate 1 is processed into a circular shape by a photo process to remove unnecessary portions with a hydrofluoric acid-based etching solution. At this time, the diameter is formed to 100 μm. At this time, the nitride semiconductor conductive buffer layer 21 is exposed in the region other than the circular shape.

【0025】次に、ドライエッチング法、ここではRI
E(反応性イオンエッチング)法を用いてこの窒化物半
導体導電性バッファ層21を塩素系ガスを用いてエッチ
ングし、上記n型窒化物半導体層3を露出させる。この
加工により、直径100μmの円形状の導電性基板1と
窒化物半導体導電性バッファ層21からなるn型台座電
極77が形成される。ここで、n型台座電極77はn型
窒化物半導体層3の発光表面のほぼ中心に形成される。
Next, a dry etching method, here RI
The nitride semiconductor conductive buffer layer 21 is etched by using a chlorine-based gas by using the E (reactive ion etching) method to expose the n-type nitride semiconductor layer 3. By this processing, the n-type pedestal electrode 77 including the circular conductive substrate 1 having a diameter of 100 μm and the nitride semiconductor conductive buffer layer 21 is formed. Here, the n-type pedestal electrode 77 is formed substantially at the center of the light emitting surface of the n-type nitride semiconductor layer 3.

【0026】次に、n型台座電極77上にAuからなる
n型パッド電極7を0.5μmの厚さに形成する。
Next, the n-type pad electrode 7 made of Au is formed on the n-type pedestal electrode 77 to a thickness of 0.5 μm.

【0027】次に、上述のように加工を終了したウエハ
を350μm角の四角形のチップとし、このチップのp
型台座電極9側をリードフレームのカップ部に乗せた
後、n型パッド電極7にAuワイヤ10を接合する。
Next, the wafer which has been processed as described above is formed into a quadrangular chip of 350 μm square, and the p of this chip is set.
After placing the mold pedestal electrode 9 side on the cup portion of the lead frame, the Au wire 10 is bonded to the n-type pad electrode 7.

【0028】こうして形成された実施例1における窒化
物半導体発光素子は、従来技術のように窒化物半導体層
上に直接、パッド電極を設置する構成ではない。したが
って、従来技術よりも窒化物半導体発光素子においてク
ラックの発生等による短絡および不均一な発光パターン
の発生を防止でき、窒化物半導体発光素子の製造歩留り
を向上させることができた。さらに、n型台座電極77
に含まれる導電性基板1を発光素子層を成長させる基板
として利用することから、窒化物半導体発光素子の作製
が従来技術よりも容易となった。
The thus formed nitride semiconductor light emitting device according to the first embodiment does not have a structure in which the pad electrode is directly provided on the nitride semiconductor layer as in the prior art. Therefore, in the nitride semiconductor light emitting device, it is possible to prevent a short circuit and an uneven light emitting pattern from occurring in the nitride semiconductor light emitting device, and it is possible to improve the manufacturing yield of the nitride semiconductor light emitting device. Furthermore, the n-type pedestal electrode 77
Since the conductive substrate 1 included in 1 is used as a substrate for growing the light emitting element layer, the fabrication of the nitride semiconductor light emitting element is easier than that of the conventional technique.

【0029】(実施例2)図2は本発明の実施例2によ
って作製された窒化物半導体発光素子の模式的な断面図
である。図2に示された実施例2による窒化物半導体発
光素子構造2000は、Siからなる導電性基板1およ
びAlNからなる窒化物半導体バッファ層2により構成
されるn型台座電極77、n型パッド電極7、Auワイ
ヤ10、n型窒化物半導体層3、発光層4、p型窒化物
半導体層5、p型窒化物半導体コンタクト層6、透光性
電極8、p型電極91およびp型台座電極9を含んでい
る。
Example 2 FIG. 2 is a schematic sectional view of a nitride semiconductor light emitting device manufactured according to Example 2 of the present invention. The nitride semiconductor light emitting device structure 2000 according to the second embodiment shown in FIG. 2 includes an n-type pedestal electrode 77 and an n-type pad electrode configured by a conductive substrate 1 made of Si and a nitride semiconductor buffer layer 2 made of AlN. 7, Au wire 10, n-type nitride semiconductor layer 3, light emitting layer 4, p-type nitride semiconductor layer 5, p-type nitride semiconductor contact layer 6, translucent electrode 8, p-type electrode 91 and p-type pedestal electrode Includes 9.

【0030】図2の窒化物半導体発光素子を作製する場
合、まず、MOCVD装置内に導電性基板1をセット
し、この導電性基板1上に窒化物半導体バッファ層2を
100nmの厚さに成長させ、順次n型窒化物半導体層
3を500nmの厚さに、発光層4を40nmの厚さ
に、p型窒化物半導体層5を5nmの厚さに、そしてp
型窒化物半導体コンタクト層6を150nmの厚さに成
長させたウエハを形成する。
When manufacturing the nitride semiconductor light emitting device of FIG. 2, first, the conductive substrate 1 is set in the MOCVD apparatus, and the nitride semiconductor buffer layer 2 is grown to a thickness of 100 nm on the conductive substrate 1. The n-type nitride semiconductor layer 3 has a thickness of 500 nm, the light-emitting layer 4 has a thickness of 40 nm, the p-type nitride semiconductor layer 5 has a thickness of 5 nm, and p
A wafer in which the type nitride semiconductor contact layer 6 is grown to a thickness of 150 nm is formed.

【0031】次に、装置からウエハを取り出し、p型窒
化物半導体コンタクト層6の表面上にp型電極91とし
てPdを30nmの厚さに、そしてその上にp型台座電
極9としてNiを100μmの厚さに形成する。
Next, the wafer is taken out from the apparatus, Pd is formed to a thickness of 30 nm as a p-type electrode 91 on the surface of the p-type nitride semiconductor contact layer 6, and Ni is 100 μm as a p-type pedestal electrode 9 thereon. To the thickness of.

【0032】次に、導電性基板1を研削、研磨を用い
て、残り厚さが10μmになるように加工する。
Next, the conductive substrate 1 is processed by grinding and polishing so that the remaining thickness is 10 μm.

【0033】次に、フォト工程により導電性基板1をフ
ッ酸系エッチング液にて不要な部分を除去し、円形状に
加工する。このときこの円形状の直径を120μmに形
成する。ここでこの直径はAuワイヤ10をパッド電極
7に接合する場合の接合径と同じにした。また、このと
きこの円形状以外の領域では窒化物半導体バッファ層2
が露出している。
Next, the conductive substrate 1 is processed into a circular shape by a photo process to remove unnecessary portions with a hydrofluoric acid-based etching solution. At this time, the diameter of this circular shape is formed to 120 μm. Here, this diameter is the same as the bonding diameter when the Au wire 10 is bonded to the pad electrode 7. Further, at this time, in the region other than the circular shape, the nitride semiconductor buffer layer 2 is formed.
Is exposed.

【0034】次に、ドライエッチング法、ここではRI
E法を用いて窒化物半導体バッファ層2を塩素系ガスを
用いてエッチングし、n型窒化物半導体層3を露出させ
る。この加工により、直径120μmの円形状の導電性
基板1と窒化物半導体バッファ層2からなるn型台座電
極77が前記n型窒化物半導体層3上に形成される。こ
こで、n型台座電極77はn型窒化物半導体層3の発光
表面のほぼ中心に形成される。
Next, a dry etching method, here RI
The N-type nitride semiconductor layer 3 is exposed by etching the nitride semiconductor buffer layer 2 using chlorine gas using the E method. By this processing, the n-type pedestal electrode 77 composed of the circular conductive substrate 1 having a diameter of 120 μm and the nitride semiconductor buffer layer 2 is formed on the n-type nitride semiconductor layer 3. Here, the n-type pedestal electrode 77 is formed substantially at the center of the light emitting surface of the n-type nitride semiconductor layer 3.

【0035】次に、n型台座電極77上にAuを用いて
n型パッド電極7を0.5μmの厚さに形成する。
Next, the n-type pad electrode 7 is formed on the n-type pedestal electrode 77 using Au to have a thickness of 0.5 μm.

【0036】次に、n型パッド電極7表面またはn型台
座電極77表面またはn型窒化物半導体層3表面に透光
性電極8として透明導電膜ITO(SnドープIn
23)を200nmの厚さに形成する。
Next, a transparent conductive film ITO (Sn-doped In) is formed as a transparent electrode 8 on the surface of the n-type pad electrode 7, the surface of the n-type pedestal electrode 77, or the surface of the n-type nitride semiconductor layer 3.
2 O 3 ) is formed to a thickness of 200 nm.

【0037】次に、上述の加工を終了したウエハを35
0μm角の四角形のチップとし、このチップのp型台座
電極9側をリードフレームのカップ部に乗せた後、n型
パッド電極7にAuワイヤ10を接合する。
Next, the wafer after the above-mentioned processing is finished with 35 wafers.
After forming a square chip of 0 μm square, placing the p-type pedestal electrode 9 side of this chip on the cup portion of the lead frame, the Au wire 10 is bonded to the n-type pad electrode 7.

【0038】こうして形成された実施例2における窒化
物半導体発光素子は、n型パッド電極7表面またはn型
台座電極77表面またはn型窒化物半導体層3表面に透
光性電極8として透明導電膜ITOを形成しているた
め、実施例1における窒化物半導体発光素子よりも、電
流を窒化物半導体発光素子に均一に注入でき、均一な発
光が確認できた。ここで、透光性電極8としては、Sb
(アンチモン)またはF(フッ素)をドープしたSnO
2(酸化スズ)、Al(アルミニウム)またはGa(ガ
リウム)をドープしたZnO(酸化亜鉛)等も使用され
得る。また本実施例の場合は、基板1には非導電性の基
板も使用され得る。
In the nitride semiconductor light emitting device thus formed in Example 2, the transparent conductive film as the transparent electrode 8 is formed on the surface of the n-type pad electrode 7, the surface of the n-type pedestal electrode 77 or the surface of the n-type nitride semiconductor layer 3. Since ITO was formed, a current could be injected more uniformly into the nitride semiconductor light emitting device than in the nitride semiconductor light emitting device in Example 1, and uniform light emission could be confirmed. Here, as the translucent electrode 8, Sb
SnO doped with (antimony) or F (fluorine)
ZnO (zinc oxide) doped with 2 (tin oxide), Al (aluminum) or Ga (gallium) may also be used. Further, in the case of the present embodiment, a non-conductive substrate may be used as the substrate 1.

【0039】(実施例3)図3は本発明の実施例3によ
って作製された窒化物半導体発光素子の模式的な上面図
である。また、図4において、本実施例における窒化物
半導体発光素子上部の模式的な断面図を示す。図3およ
び図4に示された実施例3による窒化物半導体発光素子
構造3000は、Siからなる導電性基板1およびAl
0.2Ga0.8Nからなる窒化物半導体バッファ層2により
構成されるn型台座電極77、n型パッド電極7、Au
ワイヤ10、n型窒化物半導体層3、発光層4、p型窒
化物半導体層5、p型窒化物半導体コンタクト層6、透
光性電極8、p型電極91およびp型台座電極9を含ん
でいる。
Example 3 FIG. 3 is a schematic top view of a nitride semiconductor light emitting device manufactured according to Example 3 of the present invention. Further, FIG. 4 shows a schematic cross-sectional view of the upper portion of the nitride semiconductor light emitting device in this example. The nitride semiconductor light emitting device structure 3000 according to the third embodiment shown in FIGS. 3 and 4 includes a conductive substrate 1 made of Si and Al.
The n-type pedestal electrode 77, the n-type pad electrode 7, and Au composed of the nitride semiconductor buffer layer 2 made of 0.2 Ga 0.8 N
The wire 10, the n-type nitride semiconductor layer 3, the light emitting layer 4, the p-type nitride semiconductor layer 5, the p-type nitride semiconductor contact layer 6, the transparent electrode 8, the p-type electrode 91 and the p-type pedestal electrode 9 are included. I'm out.

【0040】図3および図4に示された窒化物半導体発
光素子を作製する場合、まず、MOCVD装置内に導電
性基板1をセットし、導電性基板1上に窒化物半導体バ
ッファ層2を100nmの厚さに成長させ、順次n型窒
化物半導体層3を400nmの厚さに、発光層4を40
nmの厚さに、p型窒化物半導体層5を15nmの厚さ
に、p型窒化物半導体コンタクト層6を150nmの厚
さに成長させたウエハを形成する。
When the nitride semiconductor light emitting device shown in FIGS. 3 and 4 is manufactured, first, the conductive substrate 1 is set in the MOCVD apparatus, and the nitride semiconductor buffer layer 2 having a thickness of 100 nm is formed on the conductive substrate 1. Of the n-type nitride semiconductor layer 3 having a thickness of 400 nm and the light emitting layer 4 having a thickness of 40 nm.
nm, the p-type nitride semiconductor layer 5 is grown to a thickness of 15 nm, and the p-type nitride semiconductor contact layer 6 is grown to a thickness of 150 nm to form a wafer.

【0041】装置からウエハを取り出し、p型窒化物半
導体コンタクト層6表面上にp型電極91としてPdを
30nmの厚さに形成し、その上にp型台座電極9とし
てNiを80μmの厚さに形成する。
The wafer is taken out of the apparatus, Pd is formed as a p-type electrode 91 to a thickness of 30 nm on the surface of the p-type nitride semiconductor contact layer 6, and Ni is formed to a thickness of 80 μm as a p-type pedestal electrode 9 thereon. To form.

【0042】次に、導電性基板1を研削、研磨を用い
て、残り厚さが5μmになるように加工する。
Next, the conductive substrate 1 is processed by grinding and polishing so that the remaining thickness becomes 5 μm.

【0043】次に、フォト工程により導電性基板1を全
面にわたりフッ酸系エッチング液にて不要な部分を除去
し、円形状に加工する。このとき円形状n型台座電極7
7以外は窒化物半導体バッファ層2表面が露出してい
る。
Next, the conductive substrate 1 is subjected to a photo process to remove unnecessary portions with a hydrofluoric acid-based etching solution over the entire surface, and is processed into a circular shape. At this time, the circular n-type base electrode 7
Except for 7, the surface of the nitride semiconductor buffer layer 2 is exposed.

【0044】次に、ドライエッチング法、ここではRI
E法を用いて窒化物半導体バッファ層2を塩素系ガスを
用いてストライプ状に加工する。このとき、n型窒化物
半導体層3が露出し、線幅15μmのストライプ状の窒
化物半導体バッファ層2が前記n型窒化物半導体層3上
に形成され得る。
Next, a dry etching method, here RI
Using the E method, the nitride semiconductor buffer layer 2 is processed into a stripe shape using a chlorine-based gas. At this time, the n-type nitride semiconductor layer 3 is exposed, and the stripe-shaped nitride semiconductor buffer layer 2 having a line width of 15 μm can be formed on the n-type nitride semiconductor layer 3.

【0045】次に、n型台座電極77上にAuを用いて
n型パッド電極7を1μmの厚さに形成する。
Next, the n-type pad electrode 7 is formed on the n-type pedestal electrode 77 using Au to have a thickness of 1 μm.

【0046】次に、窒化物半導体バッファ層2またはn
型窒化物半導体バッファ層3を覆うように透光性電極8
として透明導電膜ITOを250nmの厚さに形成す
る。
Next, the nitride semiconductor buffer layer 2 or n
-Type transmissive electrode 8 covering the nitride semiconductor buffer layer 3
As a transparent conductive film ITO, a film having a thickness of 250 nm is formed.

【0047】次に、上述の加工を終了したウエハを50
0μm角の四角形のチップとし、このチップのp型台座
電極9側をリードフレームのカップ部に乗せた後、n型
パッド電極7にAuワイヤ10を接合する。
Next, 50 wafers that have undergone the above processing are processed.
After forming a square chip of 0 μm square, placing the p-type pedestal electrode 9 side of this chip on the cup portion of the lead frame, the Au wire 10 is bonded to the n-type pad electrode 7.

【0048】こうして形成された実施例3における窒化
物半導体発光素子は、発光素子層にクラックの入りやす
い方向にストライプ状の窒化物半導体バッファ層2が形
成されている。したがって、窒化物半導体バッファ層2
が非導電性である場合には、ストライプ状の窒化物半導
体バッファ層2の下部に発生したクラックには電流が流
れないため、窒化物半導体発光素子の短絡防止となるこ
とから、実施例1における窒化物半導体発光素子より
も、窒化物半導体発光素子電流をに均一に注入でき、均
一な発光が確認できた。
In the nitride semiconductor light emitting device of Example 3 thus formed, the stripe-shaped nitride semiconductor buffer layer 2 is formed in the light emitting device layer in the direction where cracks are likely to occur. Therefore, the nitride semiconductor buffer layer 2
Is non-conductive, no current flows through the cracks generated under the stripe-shaped nitride semiconductor buffer layer 2, which prevents short-circuiting of the nitride semiconductor light emitting device. The current of the nitride semiconductor light emitting device can be injected more uniformly than that of the nitride semiconductor light emitting device, and uniform light emission can be confirmed.

【0049】ここで、透光性電極8としては、Sbまた
はFをドープしたSnO2、AlまたはGaをドープし
たZnO等も使用され得る。
Here, as the transparent electrode 8, SnO 2 doped with Sb or F, ZnO doped with Al or Ga, or the like may be used.

【0050】また、本実施例においては、ストライプ状
の窒化物半導体バッファ層2をクラックが発生しやすい
方向だけでなく、いずれの方向にも設置し得る。また、
ストライプの幅、本数、形状も上記実施例には限られな
い。
In the present embodiment, the stripe-shaped nitride semiconductor buffer layer 2 can be installed not only in the direction in which cracks are likely to occur but also in any direction. Also,
The width, number and shape of the stripes are not limited to those in the above embodiment.

【0051】[0051]

【発明の効果】本発明においては、ワイヤ接合用等のパ
ッド電極層の下に台座電極を設置することにより、パッ
ド電極を形成する際またはワイヤを接合する際等の発光
素子に発生する応力を緩衝することにより、発光素子に
おけるクラックの発生を防止し得る。ひいては発光素子
の短絡防止となり、信頼性の優れた発光素子が得られ
る。さらに、本発明では、台座電極が発光素子を成長さ
せる基板になり得ることから、金属、絶縁体膜等で蒸着
して電極を形成する必要がなくなり、製造工程の省略
化、発光素子の生産性の向上、コストパフォーマンスに
優れた発光素子の生産を図ることができ得る。さらに本
発明において、台座電極に非導電性の窒化物半導体バッ
ファ層を含んでおり、発光素子の発光面とシリコン層の
間にこの窒化物半導体バッファ層が設置された場合に
は、このバッファ層が電流阻止層として機能するためバ
ッファ層下部の発光層での発光がなく、バッファ層上部
に設置されたパッド電極によって光が遮断されることが
ないことから、発光素子の外部発光効率が向上し得る。
According to the present invention, by installing the pedestal electrode under the pad electrode layer for wire bonding or the like, the stress generated in the light emitting element when the pad electrode is formed or the wire is bonded is reduced. By buffering, generation of cracks in the light emitting element can be prevented. As a result, a short circuit of the light emitting element is prevented, and a highly reliable light emitting element can be obtained. Further, in the present invention, since the pedestal electrode can serve as a substrate for growing the light emitting element, it is not necessary to form the electrode by vapor deposition with a metal, an insulating film, etc., and the manufacturing process can be omitted and the productivity of the light emitting element can be improved. It is possible to improve the production efficiency and to produce a light emitting device having excellent cost performance. Further, in the present invention, the pedestal electrode includes a non-conductive nitride semiconductor buffer layer, and when the nitride semiconductor buffer layer is provided between the light emitting surface of the light emitting element and the silicon layer, the buffer layer Function as a current blocking layer, light is not emitted from the light emitting layer below the buffer layer, and light is not blocked by the pad electrode provided above the buffer layer. Therefore, the external light emission efficiency of the light emitting element is improved. obtain.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明の実施例1によって作製された窒化物
半導体発光素子の模式的な断面図である。
FIG. 1 is a schematic cross-sectional view of a nitride semiconductor light emitting device manufactured according to Example 1 of the present invention.

【図2】 本発明の実施例2によって作製された窒化物
半導体発光素子の模式的な断面図である。
FIG. 2 is a schematic cross-sectional view of a nitride semiconductor light emitting device manufactured according to Example 2 of the present invention.

【図3】 本発明の実施例3によって作製された窒化物
半導体発光素子の模式的な上面図である。
FIG. 3 is a schematic top view of a nitride semiconductor light emitting device manufactured according to Example 3 of the present invention.

【図4】 本発明の実施例3によって作製された窒化物
半導体発光素子上部の模式的な断面図である。
FIG. 4 is a schematic cross-sectional view of an upper portion of a nitride semiconductor light emitting device manufactured according to Example 3 of the present invention.

【図5】 特開平11−177142号公報に開示され
たGaN系の半導体素子の概略構成を示す断面図であ
る。
FIG. 5 is a cross-sectional view showing a schematic configuration of a GaN-based semiconductor element disclosed in JP-A-11-177142.

【符号の説明】[Explanation of symbols]

1 導電性基板、2 窒化物半導体バッファ層、21
窒化物半導体導電性バッファ層、3 n型窒化物半導体
層、4 発光層、5 p型窒化物半導体層、6p型窒化
物半導体コンタクト層、7 n型パッド電極、77 n
型台座電極、8 透光性電極、9 p型台座電極、91
p型電極、10 Auワイヤ、100 上部クラッド
層、200 発光層、300 下部クラッド層、400
バッファ層、500 Si基板、600 p型パッド
電極。
1 conductive substrate, 2 nitride semiconductor buffer layer, 21
Nitride semiconductor conductive buffer layer, 3 n-type nitride semiconductor layer, 4 light emitting layer, 5 p-type nitride semiconductor layer, 6 p-type nitride semiconductor contact layer, 7 n-type pad electrode, 77 n
Type pedestal electrode, 8 translucent electrode, 9 p type pedestal electrode, 91
p-type electrode, 10 Au wire, 100 upper clad layer, 200 light emitting layer, 300 lower clad layer, 400
Buffer layer, 500 Si substrate, 600 p-type pad electrode.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 木村 大覚 大阪府大阪市阿倍野区長池町22番22号 シ ャープ株式会社内 Fターム(参考) 4M104 AA04 BB07 BB36 CC01 FF02 FF13 GG04 5F041 AA03 AA21 CA05 CA34 CA35 CA37 CA65 CA74 CA82 CA92 CA93 CA98 DA07    ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Daikaku Kimura             22-22 Nagaikecho, Abeno-ku, Osaka-shi, Osaka             Inside the company F-term (reference) 4M104 AA04 BB07 BB36 CC01 FF02                       FF13 GG04                 5F041 AA03 AA21 CA05 CA34 CA35                       CA37 CA65 CA74 CA82 CA92                       CA93 CA98 DA07

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 発光層を含む複数の窒化物半導体層から
成る窒化物半導体積層構造体と、前記積層構造体上に窒
化物半導体層とシリコン層を含む台座電極とを含み、前
記台座電極上に形成されたパッド電極をさらに含むこと
を特徴とする窒化物半導体発光素子。
1. A nitride semiconductor laminated structure including a plurality of nitride semiconductor layers including a light emitting layer, and a pedestal electrode including a nitride semiconductor layer and a silicon layer on the laminated structure, the pedestal electrode being on the pedestal electrode. A nitride semiconductor light emitting device, further comprising a pad electrode formed on.
【請求項2】 前記台座電極に含まれるシリコン層は、
前記積層構造体を成長させる基板として利用されたもの
であることを特徴とする請求項1に記載の窒化物半導体
発光素子。
2. The silicon layer included in the pedestal electrode comprises:
The nitride semiconductor light emitting device according to claim 1, which is used as a substrate for growing the laminated structure.
【請求項3】 前記台座電極に含まれる窒化物半導体層
は、前記積層構造体を成長させる際のバッファ層として
利用されたものであることを特徴とする請求項1に記載
の窒化物半導体発光素子。
3. The nitride semiconductor light emitting device according to claim 1, wherein the nitride semiconductor layer included in the pedestal electrode is used as a buffer layer when growing the laminated structure. element.
【請求項4】 前記台座電極がともに導電性であるシリ
コン層と窒化物半導体層とを含んでいることを特徴とす
る請求項1から3のいずれかの項に記載の窒化物半導体
発光素子。
4. The nitride semiconductor light emitting device according to claim 1, wherein the pedestal electrode includes a silicon layer and a nitride semiconductor layer, both of which are conductive.
【請求項5】 前記台座電極が導電性であるシリコン層
と非導電性である窒化物半導体層とを含み、前記台座電
極表面または前記パッド電極表面または前記積層構造体
の発光面に透明導電膜を含んでいることを特徴とする請
求項1から4のいずれかの項に記載の窒化物半導体発光
素子。
5. The transparent conductive film is formed on the surface of the pedestal electrode, the surface of the pad electrode, or the light emitting surface of the laminated structure, wherein the pedestal electrode includes a conductive silicon layer and a non-conductive nitride semiconductor layer. The nitride semiconductor light emitting device according to claim 1, further comprising:
【請求項6】 前記台座電極に含まれる非導電性である
窒化物半導体層が電流阻止層として機能することを特徴
とする請求項1、2、3または5のいずれかの項に記載
の窒化物半導体発光素子。
6. The nitride according to claim 1, wherein the non-conductive nitride semiconductor layer included in the pedestal electrode functions as a current blocking layer. Semiconductor light emitting device.
JP2001263361A 2001-08-31 2001-08-31 Nitride semiconductor light emitting element Withdrawn JP2003078168A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001263361A JP2003078168A (en) 2001-08-31 2001-08-31 Nitride semiconductor light emitting element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001263361A JP2003078168A (en) 2001-08-31 2001-08-31 Nitride semiconductor light emitting element

Publications (1)

Publication Number Publication Date
JP2003078168A true JP2003078168A (en) 2003-03-14

Family

ID=19090128

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001263361A Withdrawn JP2003078168A (en) 2001-08-31 2001-08-31 Nitride semiconductor light emitting element

Country Status (1)

Country Link
JP (1) JP2003078168A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006073189A1 (en) * 2005-01-08 2006-07-13 Kanagawa Academy Of Science And Technology Functional device and method for forming oxide material
CN100364119C (en) * 2003-07-25 2008-01-23 夏普株式会社 Nitride-based compound semiconductor light-emitting device and method of fabricating the same
US7968216B2 (en) 2005-01-08 2011-06-28 Toyoda Gosei Co., Ltd. Internal gear pump

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100364119C (en) * 2003-07-25 2008-01-23 夏普株式会社 Nitride-based compound semiconductor light-emitting device and method of fabricating the same
WO2006073189A1 (en) * 2005-01-08 2006-07-13 Kanagawa Academy Of Science And Technology Functional device and method for forming oxide material
US7968216B2 (en) 2005-01-08 2011-06-28 Toyoda Gosei Co., Ltd. Internal gear pump

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