JP2002299805A - Method of checking circuit board and mounting position - Google Patents
Method of checking circuit board and mounting positionInfo
- Publication number
- JP2002299805A JP2002299805A JP2001103122A JP2001103122A JP2002299805A JP 2002299805 A JP2002299805 A JP 2002299805A JP 2001103122 A JP2001103122 A JP 2001103122A JP 2001103122 A JP2001103122 A JP 2001103122A JP 2002299805 A JP2002299805 A JP 2002299805A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- wiring
- circuit
- terminal
- lead
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Tests Of Electronic Circuits (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、その上に電気、電
子回路素子を配置し、プリント配線を配して電気電子回
路を構成する回路基板に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board on which electric and electronic circuit elements are arranged and on which printed wiring is arranged to form an electric and electronic circuit.
【０００２】更に本発明は、上記回路基板に電気電子回
路素子を配設して電気電子回路を構成する場合の、素子
の実装方法に関する。[0002] The present invention further relates to a method of mounting an electric / electronic circuit in a case where an electric / electronic circuit element is provided on the circuit board to form an electric / electronic circuit.
【０００３】[0003]
【従来の技術】プリント配線が配置された回路基板には
電気電子素子をはんだ接続するランド部と該ランド間を
電気接続するプリント配線部及び、素子の電気導通検査
用のプリント配線パターン部などが設けられている。2. Description of the Related Art A circuit board on which printed wiring is arranged has lands for soldering electrical and electronic elements, printed wiring for electrically connecting the lands, and printed wiring pattern for testing the electrical continuity of the elements. Is provided.
【０００４】プリント配線版の回路パターンに関する先
行技術としては、特開平１０−１４５０１５号に示す公
報がある。As a prior art relating to a circuit pattern of a printed wiring board, there is a gazette disclosed in Japanese Patent Application Laid-Open No. 10-145015.
【０００５】[0005]
【発明が解決しようとする課題】前記回路基板には電気
電子素子を配設するに際し、前記電気電子素子を回路基
板の所定の位置に配置して素子のリード部を前記回路基
板のランド部にはんだ接続する必要がある。When arranging an electric / electronic element on the circuit board, the electric / electronic element is arranged at a predetermined position on the circuit board, and a lead portion of the element is placed on a land of the circuit board. Requires solder connection.
【０００６】又、従来、表面実装コネクターのような、
各リードが独立し、リード間が電気的に非導通な部品の
はんだ付け状態の検査においては、リードがはんだ付け
されているランド間の抵抗値が無限大となり、ランド間
の抵抗値をインサーキットテスターなどで測定し、はん
だ付け状態を確認するはんだ付け検査方法は使えなかっ
た。[0006] Conventionally, like a surface mount connector,
In the inspection of the soldering condition of components where the leads are independent and the leads are electrically non-conductive, the resistance between the lands to which the leads are soldered becomes infinite, and the resistance between the lands is measured in-circuit. A soldering inspection method that checks the soldering state by measuring with a tester or the like could not be used.
【０００７】そのため、インサーキットテスターの測定
プローブを部品実装ランドから繋がるテストパットに接
続し、もう一方の測定プローブを表面実装コネクターの
リード部に接続して測定プローブ間の抵抗値を測定する
はんだ付け不良可否の検査方法を行なっている。[0007] Therefore, a measurement probe of an in-circuit tester is connected to a test pad connected from a component mounting land, and the other measurement probe is connected to a lead of a surface mount connector to measure a resistance value between the measurement probes. Inspection methods are used to check for defects.
【０００８】しかしながら、外観の検査では、部品の配
置位置のズレの検査は行なえるが、形状認識によるはん
だ付け不良検査ではランド部と部品のリード部が電気的
に導通しているか否かの検査を行なえない。However, in the appearance inspection, the displacement of the component arrangement position can be inspected, but in the soldering defect inspection by shape recognition, the inspection is performed to determine whether or not the land and the component lead are electrically connected. Can not do.
【０００９】[0009]
【課題を解決するための手段】本発明の１つは、上記問
題解決のために、回路部品のリード端子を接続する配線
部を有する回路基板であって、前記配線部に、電気的接
続を遮断する遮断部を設け、前記遮断部は前記配線部上
に前記リード端子を載置する正規の位置に対して、許容
する公差の範囲内に前記リード端子が位置する場所に設
定したことを特徴とした回路基板を提案する。According to one aspect of the present invention, there is provided a circuit board having a wiring portion for connecting a lead terminal of a circuit component, wherein the wiring portion is provided with an electrical connection. An interrupting section for interrupting is provided, and the interrupting section is set at a position where the lead terminal is located within a permissible tolerance with respect to a normal position where the lead terminal is mounted on the wiring section. We propose a circuit board.
【００１０】更に、本発明は、前記配線部の前記遮断部
は前記配線上に載置する前記リード端子の端子先端側
と、端子根元側の少なくとも二箇所に配置したことを特
徴とした請求項１記載の回路基板の態様がある。Further, according to the present invention, the cut-off portion of the wiring portion is arranged at at least two positions on a terminal tip side and a terminal root side of the lead terminal placed on the wiring. There is an embodiment of the circuit board described in 1.
【００１１】本発明の他の１つは、回路部品のリード端
子を接続する配線部を有する回路基板であって、前記配
線部上に前記回路部品のリード部をＸ軸方向及びＹ軸方
向の載置位置を規制するための規制手段を形成したこと
を特徴とした回路基板を提案する。Another aspect of the present invention is a circuit board having a wiring portion for connecting a lead terminal of a circuit component, wherein a lead portion of the circuit component is provided on the wiring portion in an X-axis direction and a Y-axis direction. A circuit board characterized by forming a regulating means for regulating a mounting position is proposed.
【００１２】又、回路部品の複数のリード端子を接続す
る複数の配線部を有する回路基板であって、前記一部の
配線部上に前記リード端子の長手方向に対して直角方向
の遮断部と、前記リード端子の長手方向に対して平行方
向の遮断部を形成したことを特徴とした回路基板を提案
する。A circuit board having a plurality of wiring portions for connecting a plurality of lead terminals of a circuit component, wherein a breaking portion in a direction perpendicular to a longitudinal direction of the lead terminals is provided on the partial wiring portion. A circuit board is provided, wherein a cut-off portion is formed in a direction parallel to a longitudinal direction of the lead terminal.
【００１３】更に、前記遮断部は前記配線部を切断して
形成したことを特徴とした請求項１乃至４記載の回路基
板の態様がある。5. The circuit board according to claim 1, wherein said interrupting portion is formed by cutting said wiring portion.
【００１４】更に、本発明は、回路部品のリード端子を
接続する回路基板上の配線部に複数の遮断部を設け、前
記配線部上に前記リード端子を載置して回路基板上の前
記回路部品を実装し、前記回路基板上の配線部上にテス
タープローブを接続し、前記遮断部により分断した各ラ
ンド部と前記リード端子の導通確認により前記回路基板
上の前記回路部品の実装位置を検査することを特徴とし
た実装位置の検査方法により上記課題の解決方法を提案
する。Further, the present invention provides a wiring part on a circuit board for connecting lead terminals of a circuit component, wherein a plurality of interrupting parts are provided, and the lead terminal is placed on the wiring part and the circuit on the circuit board is provided. A component is mounted, a tester probe is connected on a wiring portion on the circuit board, and a mounting position of the circuit component on the circuit board is inspected by checking continuity between each land portion separated by the blocking portion and the lead terminal. A method for solving the above-mentioned problem is proposed by a method for inspecting a mounting position.
【００１５】更に、回路部品の複数のリード端子を接続
する複数の配線部に前記リード端子を遮断する遮断方向
の異なる方向性の遮断部を形成し、各配線部に各リード
端子を接続して回路部品を前記回路基板上に実装し、前
記回路基板上の配線部上にテスタープローブを接続し、
前記遮断部により分断した各ランドと前記リード端子の
導通確認により前記回路基板上の前記回路部品の実装位
置を検査することを特徴とした実装位置の検査方法を提
案する。Further, a plurality of wiring portions for connecting a plurality of lead terminals of the circuit component are provided with breaking portions having different blocking directions for blocking the lead terminals, and each lead terminal is connected to each wiring portion. Circuit components are mounted on the circuit board, a tester probe is connected to a wiring portion on the circuit board,
A mounting position inspection method is proposed, wherein the mounting position of the circuit component on the circuit board is inspected by checking the continuity between each land separated by the blocking section and the lead terminal.
【００１６】[0016]
【発明の実施の形態】（第一の実施例）以下に図１，２
を参照して本発明の第一の実施例を説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) FIGS.
A first embodiment of the present invention will be described with reference to FIG.
【００１７】図１は本発明に係る回路基板の要部の平面
図であり、図２は回路基板上に実装した電気部品の実装
方法及び実装した回路素子とプリント配線部との導通状
態を検査する方法の説明図である。FIG. 1 is a plan view of a main part of a circuit board according to the present invention, and FIG. 2 is a method for mounting an electric component mounted on the circuit board and inspecting a conduction state between the mounted circuit element and a printed wiring part. FIG. 4 is an explanatory diagram of a method for performing the operation.
【００１８】図において、符号１は回路基板、２、４，
６，８、は該基板１上に配線されたプリント配線部であ
る。In the drawing, reference numeral 1 denotes a circuit board, 2, 4,
Reference numerals 6 and 8 denote printed wiring portions wired on the substrate 1.
【００１９】１０は回路素子、ＩＣ集積回路素子などの
電気接続端子を備えた回路素子部で該素子部１０からは
複数の回路素子端子部１０Ａ，１０Ｂ，１０Ｃ，１０Ｄ
が設けられ、各回路素子端子部は前記プリント基板上の
前記各配線部２，４，６，８上にはんだ接続するように
構成する。Reference numeral 10 denotes a circuit element portion having an electric connection terminal such as a circuit element, an IC integrated circuit element, etc., and a plurality of circuit element terminal portions 10A, 10B, 10C, 10D from the element portion 10.
Is provided, and each circuit element terminal portion is configured to be connected by soldering to each of the wiring portions 2, 4, 6, and 8 on the printed circuit board.
【００２０】前記各プリント配線部２，４，６，８は溝
などの切断方法の遮断部により電気的に遮断されてい
る。Each of the printed wiring sections 2, 4, 6, 8 is electrically cut off by a cutting section such as a groove.
【００２１】例えば、第二のプリント配線部４は２つの
溝部４ａ，４ｂによりプリント配線部が４Ａ，４Ｂ，４
Ｃに三分割されている。For example, the second printed wiring section 4 has four printed wiring sections 4A, 4B, 4 by two grooves 4a, 4b.
C is divided into three.
【００２２】２Ｄ、４Ｄ，６Ｄ，８Ｄは各プリント配線
部に設けた導通確認用のテスタープローブ接続用ランド
部である。Reference numerals 2D, 4D, 6D and 8D denote lands for connection of a tester probe for checking continuity provided on each printed wiring portion.
【００２３】２Ｅ、４Ｅ、６Ｅ、８Ｅは他のテスタープ
ローブ接続用ランド部である。Reference numerals 2E, 4E, 6E and 8E denote other tester probe connection lands.
【００２４】回路素子端子１０Ｂの実装許容公差寸法は
図２の左右方向に対して±Ａである。The mounting tolerance of the circuit element terminal 10B is ± A with respect to the horizontal direction in FIG.
【００２５】プリント配線部４を分離する溝４ａ，４ｂ
は回路素子の正規実装位置に対して実装公差Ａだけ回路
素子端子の先端部から内側（図示右方向）に入った位置
と、回路素子端子の後端部から内側（図面左方法）に入
った位置に設ける。Grooves 4a and 4b for separating printed wiring section 4
Are located inside the front end of the circuit element terminal by the mounting tolerance A with respect to the normal mounting position of the circuit element (to the right in the drawing) and inside the rear end of the circuit element terminal (to the left in the drawing). Position.
【００２６】溝４ａ，４ｂの配置位置について図３，
４，５を参照して説明する。The positions of the grooves 4a and 4b are shown in FIG.
This will be described with reference to FIGS.
【００２７】回路素子部１０の正規位置に対する実装公
差を±Ａとし、プリント配線部４を分離する溝４ａ，４
ｂは回路素子１０が正規位置に実装された時の回路素子
端子部先端１０Ｂ−１から公差寸法のＡだけ図面右方向
に入った位置に第一の溝４ａを設け、プリント配線部４
と接する最終端１０Ｂ−２から公差寸法のＡだけ図面左
方向に入った位置に第二の溝４ｂを設ける。The mounting tolerance of the circuit element portion 10 with respect to the normal position is ± A, and the grooves 4a, 4
b, a first groove 4a is provided at a position on the right side of the drawing by a tolerance dimension A from the circuit element terminal tip 10B-1 when the circuit element 10 is mounted at a regular position,
The second groove 4b is provided at a position which is on the left side of the drawing by the tolerance dimension A from the final end 10B-2 in contact with the second groove 4b.
【００２８】上記で説明した位置に各溝４ａ，４ｂを設
けることで図４に示すように、回路素子１０の実装位置
（図示の点線の位置）が図４図示矢印Ｐ方向に公差寸法
のＡ以上に変位した場合に、図４の実線で示す回路素子
端子部１０Ｂの位置が分割されたプリント配線部４Ｃと
接続しなくなる。By providing the grooves 4a and 4b at the positions described above, as shown in FIG. 4, the mounting position (the position indicated by the dotted line) of the circuit element 10 is set to the tolerance dimension A in the direction of the arrow P shown in FIG. In the case of the above displacement, the position of the circuit element terminal portion 10B indicated by the solid line in FIG. 4 is not connected to the divided printed wiring portion 4C.
【００２９】又、図５に示すように、回路素子１０の実
装位置が正規の位置から図示Ｑ方向に公差寸法のＡだけ
変位した場合（実線の位置）に、回路素子端子部の先端
部側１０Ｂ−１は分割されたプリント配線部４Ａと接続
しなくなる。Further, as shown in FIG. 5, when the mounting position of the circuit element 10 is displaced from the normal position by the tolerance dimension A in the Q direction in the drawing (the position indicated by the solid line), the tip side of the circuit element terminal portion is set. 10B-1 is not connected to the divided printed wiring section 4A.
【００３０】図１，２に戻って説明を続行する。Returning to FIGS. 1 and 2, the description will be continued.
【００３１】回路素子１０を実装の正規位置に配置する
ことで、各回路素子端子部１０Ａ，１０Ｂ，１０Ｃ，１
０Ｄは、夫々のプリント配線部２，４，６，８上に、各
配線部の溝による分割された配線部を跨いで導通状態を
得ることができる。By arranging the circuit element 10 at a regular position for mounting, each of the circuit element terminal sections 10A, 10B, 10C, 1
In 0D, a conductive state can be obtained on each of the printed wiring sections 2, 4, 6, and 8 over the wiring section divided by the groove of each wiring section.
【００３２】導通用テスター１２の一方のプローブ１２
Ａをプローブ接続用ランド部４Ｄに接続し、他方のプロ
ーブ１２Ｂをプローブ接続用ランド部４Ｅに接続するこ
とで、回路素子１０の回路素子端子部１０Ｂを介してテ
スタ１２による抵抗値測定により回路素子１０の実装位
置の変位及び回路素子端子部の半田接続状態の検査を行
なうことが出来る。One probe 12 of the conduction tester 12
A is connected to the probe connection land 4D, and the other probe 12B is connected to the probe connection land 4E. Inspection of the displacement of the mounting position of No. 10 and the solder connection state of the circuit element terminal can be performed.
【００３３】（第二の実施例）図６，７を参照して本発
明の第二の実施例を説明する。(Second Embodiment) A second embodiment of the present invention will be described with reference to FIGS.
【００３４】前記第一の実施例は回路素子の端子部を接
続するプリント配線部を端子部の長手方向の直交する方
向のＹ軸方向に分割する例を示したが、本例は長手方向
と平行するＸ軸方向にも分割する例を示す。In the first embodiment, the printed wiring portion for connecting the terminal portion of the circuit element is divided in the Y-axis direction perpendicular to the longitudinal direction of the terminal portion. An example in which division is performed also in the parallel X-axis direction is shown.
【００３５】図において、符号１０は前記例と同じ回路
素子であり、端子部１０Ａ，１０Ｂ，１Ｃ，１０Ｄが設
けられている。In the figure, reference numeral 10 denotes the same circuit element as in the above example, and is provided with terminal portions 10A, 10B, 1C and 10D.
【００３６】プリント配線基板２０上には前記４つの端
子部と接続するためのプリント配線部２２，２４，２
６，２８が配線されている。On the printed wiring board 20, printed wiring portions 22, 24, 2 for connecting to the four terminal portions are provided.
6, 28 are wired.
【００３７】第一のプリント配線部２２には配線部の分
割用の溝部２２ａがＹ軸方向に形成されており、プリン
ト配線部２２を２２Ａと２２Ｂの２つに分割する。A groove 22a for dividing the wiring portion is formed in the first printed wiring portion 22 in the Y-axis direction, and divides the printed wiring portion 22 into two parts, 22A and 22B.
【００３８】前記溝部２２ａの位置は端子部１０Ａの後
端部から図面左方法に実装公差寸法のＢに入った位置に
設ける。The position of the groove 22a is provided at a position within a mounting tolerance dimension B from the rear end of the terminal portion 10A in the left-hand direction in the drawing.
【００３９】第四のプリント配線部２８には同様に分割
用の溝部２８ａを形成するがその位置は、端子部１０Ｄ
の先端部１０Ｄ−１から図面右方向に実装公差寸法Ｂの
寸法位置に入った位置に形成する。Similarly, a dividing groove 28a is formed in the fourth printed wiring section 28, but the position of the dividing groove 28a is different from that of the terminal section 10D.
Of the mounting tolerance dimension B in the right direction in the drawing from the front end portion 10D-1.
【００４０】第二、第三のプリント配線部２４，２６に
は該プリント配線部の長手方向Ｘ軸に対して平行するＸ
軸方向に溝２４ａ，２６ａを形成する。The second and third printed wiring portions 24 and 26 have X parallel to the longitudinal X axis of the printed wiring portions.
Grooves 24a and 26a are formed in the axial direction.
【００４１】第二のプリント配線部２４の回路素子端子
部１０Ｂを接続する配線部の平行な方向に溝部２４ａを
形成して第二のプリント配線部２４をＸ軸方向に平行な
２つの配線部２４Ａ，２４Ｂの２つに分割する。A groove 24a is formed in the direction parallel to the wiring portion connecting the circuit element terminal portion 10B of the second printed wiring portion 24, so that the second printed wiring portion 24 is divided into two wiring portions parallel to the X-axis direction. 24A and 24B.
【００４２】第二プリント配線部の前記溝部２４ａの位
置は、回路素子１０のＹ軸方向の実装の正規の実装位置
から図７の図面上方向に実装公差寸法Ｃに入った位置に
設ける。The position of the groove portion 24a of the second printed wiring portion is provided at a position within the mounting tolerance dimension C in the upward direction in the drawing of FIG. 7 from the normal mounting position of the mounting of the circuit element 10 in the Y-axis direction.
【００４３】又、第三のプリント配線部の前記溝部２６
ａの位置は、回路素子１０のＹ軸方向の実装の正規の実
装位置から図面下方向に実装公差寸法Ｃに入った位置に
設ける。Further, the groove 26 of the third printed wiring portion is formed.
The position a is provided at a position within the mounting tolerance dimension C in the downward direction of the drawing from the normal mounting position of the mounting of the circuit element 10 in the Y-axis direction.
【００４４】第三のプリント配線部２６は前記溝部２６
ａによりＸ軸方向に平行な２つの配線部２６Ａ，２６Ｂ
に分割する。The third printed wiring portion 26 is provided with the groove 26
a, two wiring portions 26A and 26B parallel to the X-axis direction.
Divided into
【００４５】導通確認用テスター１２の第一のプローブ
１２Ａを接続用ランド部２２Ｄ，２４Ｄ，２６Ｄ，２８
Ｄに接続し、第二のプローブ１２Ｂを接続用のランド２
２Ｅ，２４Ｅ，２６Ｅ，２８Ｅに接続して各プリント配
線部と回路素子の端子部との間の抵抗値の測定により導
通確認を行なう。The first probes 12A of the continuity check tester 12 are connected to the connection lands 22D, 24D, 26D, and 28.
D and the second probe 12B is connected to the connection land 2
2E, 24E, 26E, and 28E are connected to each other to check the continuity by measuring the resistance value between each printed wiring portion and the terminal portion of the circuit element.
【００４６】回路素子１０の配置位置がＸ軸方向の図示
右方向に公差寸法のＢ以上に変位した場合には第四のプ
リント配線部２８と回路素子端子１０Ｄとの間の非導通
状態が検出される。If the arrangement position of the circuit element 10 is displaced in the right direction in the X-axis direction to the tolerance B or more, a non-conductive state between the fourth printed wiring portion 28 and the circuit element terminal 10D is detected. Is done.
【００４７】又、回路素子１０の配置位置が左方向に変
位して配置された場合には第一プリント配線部２２と回
路素子端子部１０Ａとの間の非導通状態が検出される。When the arrangement position of the circuit element 10 is displaced leftward, a non-conductive state between the first printed wiring section 22 and the circuit element terminal section 10A is detected.
【００４８】更に、回路素子１０の配置位置がＹ軸方向
の図面の上部方向に公差寸法Ｃ以上に変位して配置され
た場合は第三プリント配線部２６と回路素子端子部１０
Ｃとの間の非導通状態が検出される。Further, when the arrangement position of the circuit element 10 is displaced by the tolerance dimension C or more in the upper direction of the drawing in the Y-axis direction, the third printed wiring section 26 and the circuit element terminal section 10
A non-conduction state with C is detected.
【００４９】同様に、回路素子１０の配置位置がＹ軸方
向の図面下方向に公差寸法Ｃ以上に変位して配置された
場合には、第二プリント配線部２４と回路素子の端子部
１０Ｂ間の非導通状態が検出される。Similarly, when the arrangement position of the circuit element 10 is displaced by the tolerance dimension C or more in the downward direction of the drawing in the Y-axis direction, the position between the second printed wiring portion 24 and the terminal portion 10B of the circuit element is changed. Is detected.
【００５０】回路素子１０がＸ軸方向及びＹ軸方向に各
公差寸法Ｂ，Ｃの範囲内に配置された場合には、各プリ
ント配線部と夫々の回路素子端子部との間の導通状態の
確認が取れる。When the circuit elements 10 are arranged within the tolerances B and C in the X-axis direction and the Y-axis direction, the continuity between each printed wiring section and each circuit element terminal section is established. Confirmation can be taken.
【００５１】[0051]
【発明の効果】本発明に拠れば、プリント配線基板のプ
リント配線部上に、回路素子の端子を位置させてはんだ
接続する場合に回路素子の実装配置位置の確認と配線部
と端子部の電気接続の可否を検出することができる。According to the present invention, when a terminal of a circuit element is placed on a printed wiring portion of a printed wiring board and soldered, the mounting arrangement position of the circuit element is confirmed and the electric connection between the wiring portion and the terminal portion is confirmed. Whether connection is possible can be detected.
【図１】第一の実施例の平面図。FIG. 1 is a plan view of a first embodiment.
【図２】回路素子の端子部とプリント配線部の配置関係
の説明図。FIG. 2 is an explanatory diagram of an arrangement relationship between a terminal portion of a circuit element and a printed wiring portion.
【図３】プリント配線部に形成する溝部の形成位置の説
明図。FIG. 3 is an explanatory diagram of a formation position of a groove formed in a printed wiring portion.
【図４】プリント配線部に形成する溝部の形成位置の説
明図。FIG. 4 is an explanatory diagram of a formation position of a groove formed in a printed wiring portion.
【図５】プリント配線部に形成する溝部の形成位置の説
明図。FIG. 5 is an explanatory diagram of a formation position of a groove formed in a printed wiring portion.
【図６】第二実施例の平面図。FIG. 6 is a plan view of the second embodiment.
【図７】第二実施例の回路素子とプリント配線部の配置
関係の説明図。FIG. 7 is an explanatory diagram of an arrangement relationship between a circuit element and a printed wiring section according to a second embodiment.
１ プリント配線基板 ２、４、６、８ プリント配線部 ４Ａ、４Ｂ、４Ｃ 分割配線部 ４ａ、４ｂ 溝部 １０ 回路素子 １０Ａ、１０Ｂ、１０Ｃ、１０Ｄ 回路素子端子 １２ テスター ２２、２４、２６、２８ プリント配線部 ２４Ａ、２４Ｂ、２６Ａ、２６Ｂ 分割配線部 ２８ａ、２８ｂ 溝部 DESCRIPTION OF SYMBOLS 1 Printed wiring board 2, 4, 6, 8 Printed wiring part 4A, 4B, 4C Divided wiring part 4a, 4b Groove part 10 Circuit element 10A, 10B, 10C, 10D Circuit element terminal 12 Tester 22, 24, 26, 28 Printed wiring Parts 24A, 24B, 26A, 26B Divided wiring parts 28a, 28b Groove parts
Claims (7)
を有する回路基板であって、前記配線部に、電気的接続
を遮断する遮断部を設け、前記遮断部は前記配線部上に
前記リード端子を載置する正規の位置に対して、許容す
る公差の範囲内に前記リード端子が位置する場所に設定
したことを特徴とした回路基板。1. A circuit board having a wiring portion for connecting a lead terminal of a circuit component, wherein the wiring portion is provided with a breaking portion for breaking electrical connection, and the breaking portion is provided on the wiring portion with the lead. A circuit board, wherein the lead terminal is set at a position where the lead terminal is located within an allowable tolerance with respect to a regular position where the terminal is mounted.
に載置する前記リード端子の端子先端側と、端子根元側
の少なくとも二箇所に配置したことを特徴とした請求項
１記載の回路基板。2. The terminal according to claim 1, wherein the interrupting portion of the wiring portion is disposed at at least two positions on a terminal tip side and a terminal root side of the lead terminal placed on the wiring portion. Circuit board.
を有する回路基板であって、前記配線部上に前記回路部
品のリード部をＸ軸方向及びＹ軸方向の載置位置を規制
するための規制手段を形成したことを特徴とした回路基
板。3. A circuit board having a wiring portion for connecting lead terminals of a circuit component, wherein the mounting portion positions the lead portion of the circuit component on the wiring portion in the X-axis direction and the Y-axis direction. A circuit board characterized by forming the regulating means of (1).
複数の配線部を有する回路基板であって、前記一部の配
線部上に前記リード端子の長手方向に対して直角方向の
遮断部と、前記リード端子の長手方向に対して平行方向
の遮断部を形成したことを特徴とした回路基板。4. A circuit board having a plurality of wiring portions for connecting a plurality of lead terminals of a circuit component, wherein a cut-off portion in a direction perpendicular to a longitudinal direction of the lead terminals is provided on the part of the wiring portions. A circuit board having a cut-off portion formed in a direction parallel to a longitudinal direction of the lead terminal.
したことを特徴とした請求項１乃至４記載の回路基板。5. The circuit board according to claim 1, wherein said interrupting portion is formed by cutting said wiring portion.
板上の配線部に複数の遮断部を設け、前記配線部上に前
記リード端子を載置して回路基板上の前記回路部品を実
装し、前記回路基板上の配線部上にテスタープローブを
接続し、前記遮断部により分断した各配線部と前記リー
ド端子の導通確認により前記回路基板上の前記回路部品
の実装位置を検査することを特徴とした実装位置の検査
方法。6. A wiring part on a circuit board for connecting lead terminals of a circuit component, wherein a plurality of blocking parts are provided, and the lead terminal is mounted on the wiring part to mount the circuit component on the circuit board. Connecting a tester probe to a wiring portion on the circuit board, and inspecting a mounting position of the circuit component on the circuit board by confirming continuity between each wiring portion separated by the blocking portion and the lead terminal. Inspection method of mounting position.
複数の配線部に前記リード端子を遮断する遮断方向の異
なる方向性の遮断部を形成し、各配線部に各リード端子
を接続して回路部品を前記回路基板上に実装し、前記回
路基板上の配線部上にテスタープローブを接続し、前記
遮断部により分断した各配線部と前記リード端子の導通
確認により前記回路基板上の前記回路部品の実装位置を
検査することを特徴とした実装位置の検査方法。7. A plurality of wiring portions for connecting a plurality of lead terminals of a circuit component, wherein breaking portions having different blocking directions for blocking the lead terminals are formed, and each lead terminal is connected to each wiring portion. A circuit component is mounted on the circuit board, a tester probe is connected to a wiring section on the circuit board, and the circuit on the circuit board is checked by checking the continuity between each of the wiring sections separated by the blocking section and the lead terminals. A mounting position inspection method characterized by inspecting a mounting position of a component.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001103122A JP2002299805A (en) | 2001-04-02 | 2001-04-02 | Method of checking circuit board and mounting position |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001103122A JP2002299805A (en) | 2001-04-02 | 2001-04-02 | Method of checking circuit board and mounting position |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2002299805A true JP2002299805A (en) | 2002-10-11 |
Family
ID=18956231
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001103122A Pending JP2002299805A (en) | 2001-04-02 | 2001-04-02 | Method of checking circuit board and mounting position |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2002299805A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009141170A (en) * | 2007-12-07 | 2009-06-25 | Fujitsu Component Ltd | Pad structure of board |
| JP2010160012A (en) * | 2009-01-07 | 2010-07-22 | Hitachi Computer Peripherals Co Ltd | Probe inspection apparatus |
| JP2015222800A (en) * | 2014-05-23 | 2015-12-10 | 株式会社ジャパンディスプレイ | Substrate unit and electronic device |
| CN110870390A (en) * | 2018-01-30 | 2020-03-06 | 株式会社Lg化学 | Method for producing a printed circuit board with test points and printed circuit board produced thereby |
-
2001
- 2001-04-02 JP JP2001103122A patent/JP2002299805A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009141170A (en) * | 2007-12-07 | 2009-06-25 | Fujitsu Component Ltd | Pad structure of board |
| JP2010160012A (en) * | 2009-01-07 | 2010-07-22 | Hitachi Computer Peripherals Co Ltd | Probe inspection apparatus |
| JP2015222800A (en) * | 2014-05-23 | 2015-12-10 | 株式会社ジャパンディスプレイ | Substrate unit and electronic device |
| CN110870390A (en) * | 2018-01-30 | 2020-03-06 | 株式会社Lg化学 | Method for producing a printed circuit board with test points and printed circuit board produced thereby |
| US10966313B2 (en) | 2018-01-30 | 2021-03-30 | Lg Chem, Ltd. | Method for manufacturing printed circuit board having test point, and printed circuit board manufactured thereby |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6462570B1 (en) | Breakout board using blind vias to eliminate stubs | |
| JPH1164425A (en) | Method and device for continuity inspection in electronic part | |
| JP5351171B2 (en) | Circuit board assembly and erroneous insertion detection device | |
| US6054720A (en) | Apparatus and method for evaluating the surface insulation resistance of electronic assembly manufacture | |
| JP2002299805A (en) | Method of checking circuit board and mounting position | |
| JP2006234780A (en) | Evaluation board and method for evaluating cable assembly | |
| JP2008028213A (en) | Circuit board and inspection method therefor | |
| KR100807469B1 (en) | Zif connector type board and testing method of the same | |
| JP5258497B2 (en) | Wiring structure for solder joint inspection of printed wiring board | |
| JP2006165325A (en) | Wiring structure of board mounting ic package and method for inspecting defective electric connection | |
| KR100795691B1 (en) | Probe sheet for testing flexible printed circuit board and method using which | |
| JPH0348171A (en) | Leadless probe card of in-circuit tester for hybrid integrated circuit | |
| CN109283369A (en) | A kind of automatically controlled tooling of on-line checking and preparation method thereof and working method | |
| JP3191205B2 (en) | Printed circuit board inspection equipment | |
| JPH10190181A (en) | Printed board and its inspecting method | |
| JP2010080770A (en) | Electronic circuit module and method of inspecting the same | |
| JPH06260799A (en) | Circuit board inspecting method, and circuit board | |
| JP2000100504A (en) | Connector and printed wiring board | |
| JP3395216B2 (en) | Printed wiring board inspection jig | |
| JP2591453B2 (en) | Burn-in board inspection apparatus and burn-in board inspection method | |
| JPH0621180A (en) | Inspecting method for misregistration of solder-resist layer of printed wiring board | |
| JPH088000A (en) | Connector | |
| JPH08242052A (en) | Printed wiring board | |
| JP5495303B2 (en) | Semiconductor module and semiconductor module inspection method | |
| JPH04369253A (en) | Semiconductor integrated circuit package |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20031211 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20060711 |
|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20060911 |
|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20070116 |