JP2002280513A - Circuit board with pin and electronic device using the same - Google Patents

Circuit board with pin and electronic device using the same

Info

Publication number
JP2002280513A
JP2002280513A JP2001078424A JP2001078424A JP2002280513A JP 2002280513 A JP2002280513 A JP 2002280513A JP 2001078424 A JP2001078424 A JP 2001078424A JP 2001078424 A JP2001078424 A JP 2001078424A JP 2002280513 A JP2002280513 A JP 2002280513A
Authority
JP
Japan
Prior art keywords
solder
pins
lead
weight
electronic device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001078424A
Other languages
Japanese (ja)
Inventor
Hirobumi Ishibashi
博文 石橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2001078424A priority Critical patent/JP2002280513A/en
Publication of JP2002280513A publication Critical patent/JP2002280513A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a circuit board with pins and an electronic device capable of excellently connecting lead pins to wiring conductors of an external electric circuit board via a socket or solder without adhering the solder to a shaft of the pin. SOLUTION: The circuit board with the pins comprises pads 2b with pins electrically connected to the wiring conductors 2 on the lower surface of an organic material insulating board 1 having the conductors 2, and lead pins 3 each having a large diameter part 3b of a substantially disc-like state formed on the upper end of the shaft 3a of a substantially columnar state at the pads 2b and stood by connecting the part 3b to the pads 2b by the solder 9. In this board, the solder 9 for connecting the pins 3 to the pads 2b contains an alloy of lead of 70 to 85 wt.%, tin of 5 to 20 wt.% and antimony of 5 to 15 wt.%.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【発明の属する技術分野】本発明は、半導体素子等の電
子部品を搭載するために用いられるピン付き配線基板お
よびこのピン付き配線基板上に半導体素子等の電子部品
を搭載して成る電子装置に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board with pins used for mounting electronic components such as semiconductor elements, and an electronic device having electronic components such as semiconductor elements mounted on the wiring board with pins. Things.

【０００２】[0002]

【従来の技術】近時、半導体素子等の電子部品を搭載す
るために用いられるピン付き配線基板として、例えばガ
ラス−エポキシ板等から成る絶縁板やエポキシ樹脂等か
ら成る絶縁層を複数層積層して成る絶縁基板の上面から
下面にかけて銅箔から成る複数の配線導体を設けるとと
もにこれらの配線導体の絶縁基板下面に導出した部位に
複数のピン付けパッドを形成し、これらのピン付けパッ
ドに上端部に円板状の径大部を有する略円柱状の鉄系合
金や銅系合金から成るリードピンをその上端を突き当て
て例えば鉛−錫合金から成る半田を介して接合すること
により立設して成る有機材料系のピン付き配線基板が採
用されるようになってきている。このような有機材料系
のピン付き配線基板は、セラミック材料系のピン付き配
線基板と比較して軽量であり、かつ配線導体の電気抵抗
が小さいという有利な面を有している。そして、このよ
うな有機材料系のピン付き配線基板においては絶縁基板
の上面に電子部品を搭載するとともに電子部品の電極と
配線導体とを半田バンプやボンディングワイヤ等を介し
て電気的に接続した後、電子部品を金属やセラミックか
ら成る蓋体やポッティング樹脂等から成る封止部材によ
り封止することによって製品としての電子装置となり、
この電子装置においては、絶縁基板下面のリードピンを
外部電気回路基板の配線導体にソケットや半田等を介し
て接続することにより外部電気回路基板上に実装される
とともに搭載する電子部品が外部電気回路に電気的に接
続されることとなる。2. Description of the Related Art Recently, as a wiring board with pins used for mounting electronic parts such as semiconductor elements, for example, an insulating plate made of a glass-epoxy plate or a plurality of insulating layers made of an epoxy resin are laminated. A plurality of wiring conductors made of copper foil are provided from the upper surface to the lower surface of the insulating substrate, and a plurality of pinning pads are formed at portions of these wiring conductors extending to the lower surface of the insulating substrate. A lead pin made of a substantially cylindrical iron-based alloy or copper-based alloy having a disk-shaped large-diameter portion is erected by abutting the upper end thereof and, for example, being joined via a solder made of a lead-tin alloy. The organic material-based wiring board with pins has been adopted. Such an organic material-based wiring board with pins is advantageous in that it is lighter in weight and has a smaller electric resistance of a wiring conductor than a wiring board with pins made of a ceramic material. In such an organic material-based wiring board with pins, the electronic component is mounted on the upper surface of the insulating substrate and the electrodes of the electronic component and the wiring conductor are electrically connected via solder bumps, bonding wires, or the like. By sealing the electronic components with a sealing member made of a potting resin or a lid made of metal or ceramic, an electronic device as a product is obtained.
In this electronic device, the lead pins on the lower surface of the insulating substrate are connected to the wiring conductors of the external electric circuit board via a socket, solder, or the like, so that the electronic components mounted and mounted on the external electric circuit board are connected to the external electric circuit. It will be electrically connected.

【０００３】[0003]

【発明が解決しようとする課題】しかしながら、この従
来のピン付き配線基板およびこれを用いた電子装置によ
ると、鉛−錫合金から成る半田と鉄系合金や銅合金から
成るリードピンとの濡れ性が良好であり、そのためピン
付けパッドにリードピンを鉛−錫合金から成る半田を介
して接合する際に、鉛−錫合金から成る半田の一部がリ
ードピンの径大部を越えて軸部にまで濡れ広がり、その
結果、リードピンの軸部に不要な半田が多量に付着して
しまうことがあり、そのように半田が軸部に多量に付着
した場合、リードピンを外部電気回路基板の配線導体に
ソケットや半田を介して良好に接続することが困難とな
ってしまうという問題点を有していた。However, according to the conventional wiring board with pins and the electronic device using the same, the wettability between the solder made of a lead-tin alloy and the lead pins made of an iron-based alloy or a copper alloy is reduced. Good, therefore, when joining the lead pin to the pinning pad via the lead-tin alloy solder, part of the lead-tin alloy solder wets the large part of the lead pin and reaches the shaft. As a result, a large amount of unnecessary solder may adhere to the shaft of the lead pin, and if such a large amount of solder adheres to the shaft, the lead pin may be attached to the wiring conductor of the external electric circuit board by a socket or a wire. There is a problem that it is difficult to make a good connection via solder.

【０００４】本発明は、かかる従来の問題点に鑑み案出
されたものであり、その目的は、リードピンの軸部に半
田の付着がなく、それによりリードピンを外部電気回路
基板の配線導体にソケットや半田を介して良好に接続す
ることが可能なピン付き配線基板およびそれを用いた電
子装置を提供することにある。SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned conventional problems, and has as its object to prevent solder from adhering to a shaft portion of a lead pin, thereby connecting the lead pin to a wiring conductor of an external electric circuit board. It is an object of the present invention to provide a wiring board with pins that can be connected well via solder or solder, and an electronic device using the same.

【０００５】[0005]

【課題を解決するための手段】本発明のピン付き配線基
板は、配線導体を有する有機材料系の絶縁基板の下面に
配線導体と電気的に接続されたピン付けパッドを設ける
とともに、このピン付けパッドに略円柱状の軸部の上端
に略円板状の径大部を形成して成るリードピンをその径
大部とピン付けパッドとを半田で接合することにより立
設して成るピン付き配線基板であって、リードピンとピ
ン付けパッドとを接合する半田は、70〜85重量％の鉛と
５〜20重量％の錫と５〜15重量％のアンチモンとの合金
から成ることを特徴とするものである。A wiring board with pins according to the present invention is provided with a pinning pad electrically connected to a wiring conductor on a lower surface of an organic material-based insulating substrate having a wiring conductor. Wiring with pins formed by erecting a lead pin formed by forming a substantially disk-shaped large-diameter portion at the upper end of a substantially cylindrical shaft portion on a pad and joining the large-diameter portion and a pinning pad by soldering The substrate, wherein the solder for joining the lead pin and the pinning pad is made of an alloy of 70 to 85% by weight of lead, 5 to 20% by weight of tin, and 5 to 15% by weight of antimony. Things.

【０００６】また、本発明の電子装置は、配線導体を有
する有機材料系の絶縁基板の下面に配線導体と電気的に
接続されたピン付けパッドを設けるとともに、このピン
付けパッドに略円柱状の軸部の上端に略円板状の径大部
を設けて成るリードピンをその径大部とピン付けパッド
とを半田で接合することより立設して成るピン付き配線
基板に電子部品を搭載するとともにこの電子部品の電極
と配線導体とを電気的に接続して成る電子装置であっ
て、リードピンとピン付けパッドとを接合する半田は、
70〜85重量％の鉛と５〜20重量％の錫と５〜15重量％の
アンチモンとの合金から成ることを特徴とするものであ
る。In the electronic device of the present invention, a pinning pad electrically connected to the wiring conductor is provided on the lower surface of the organic material-based insulating substrate having the wiring conductor, and the pinning pad has a substantially cylindrical shape. An electronic component is mounted on a wiring board with pins formed by erecting a lead pin having a substantially disk-shaped large-diameter portion at the upper end of a shaft portion and joining the large-diameter portion and a pinning pad with solder. An electronic device formed by electrically connecting an electrode of the electronic component and a wiring conductor together with the solder for joining the lead pin and the pinning pad,
It is characterized by comprising an alloy of 70 to 85% by weight of lead, 5 to 20% by weight of tin and 5 to 15% by weight of antimony.

【０００７】本発明のピン付き配線基板およびこれを用
いた電子装置によれば、リードピンの径大部とピン付け
パッドとを接合する半田は、70〜85重量％の鉛と５〜20
重量％の錫と５〜15重量％のアンチモンとの合金から成
ることから、このような組成によりリードピンとの濡れ
性が適度に抑制され、その結果、ピン付けパッドにリー
ドピンを接合する際にリードピンの軸部に半田が濡れ広
がることが有効に防止される。According to the wiring board with pins and the electronic device using the same according to the present invention, the solder for joining the large diameter portion of the lead pin and the pinning pad is composed of 70 to 85% by weight of lead and 5 to 20% by weight.
Since it is composed of an alloy of tin of 5% by weight and antimony of 5 to 15% by weight, wettability with the lead pin is appropriately suppressed by such a composition, and as a result, when the lead pin is joined to the pinning pad, And the solder is effectively prevented from spreading on the shaft portion.

【０００８】[0008]

【発明の実施の形態】つぎに、本発明を添付の図面に基
づき詳細に説明する。図１は、本発明を半導体素子を搭
載するためのピン付き配線基板およびこれに半導体素子
を搭載した電子装置に適用した場合の実施の形態の一例
を示す断面図であり、１は絶縁基板、２は配線導体、３
はリードピンである。この絶縁基板１と配線導体２とリ
ードピン３とで本発明のピン付き配線基板が構成され、
これに電子部品としての半導体素子４を搭載することに
より本発明の電子装置が形成される。Next, the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 is a cross-sectional view showing an example of an embodiment in which the present invention is applied to a wiring board with pins for mounting a semiconductor element and an electronic device having the semiconductor element mounted thereon, where 1 is an insulating substrate, 2 is a wiring conductor, 3
Is a lead pin. The insulating substrate 1, the wiring conductor 2, and the lead pins 3 constitute a wiring board with pins of the present invention,
The electronic device of the present invention is formed by mounting the semiconductor element 4 as an electronic component on this.

【０００９】絶縁基板１は、例えばガラス繊維を縦横に
織り込んだガラス織物にエポキシ樹脂やビスマレイミド
トリアジン樹脂等の熱硬化性樹脂を含浸させて成る板状
の芯体１ａの上下面にエポキシ樹脂やビスマレイミドト
リアジン樹脂等の熱硬化性樹脂から成る絶縁層１ｂをそ
れぞれ複数層ずつ積層して成る有機材料系の多層板であ
り、その上面から下面にかけては銅箔や銅めっき膜等か
ら成る複数の配線導体２が形成されている。The insulating substrate 1 is made of a glass fabric in which glass fibers are woven vertically and horizontally and impregnated with a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin. An organic material-based multilayer board formed by laminating a plurality of insulating layers 1b each made of a thermosetting resin such as a bismaleimide triazine resin, and a plurality of layers made of a copper foil, a copper plating film, or the like from the upper surface to the lower surface. The wiring conductor 2 is formed.

【００１０】絶縁基板１を構成する芯体１ａは、厚みが
0.3〜1.5ｍｍ程度であり、その上面から下面にかけて直
径が0.1〜1.0ｍｍ程度の複数の貫通孔５を有している。
そして、その上下面および各貫通孔５の内壁には配線導
体２の一部が被着されており、上下面の配線導体２が貫
通孔５を介して電気的に接続されている。The core 1a constituting the insulating substrate 1 has a thickness.
It has a plurality of through-holes 5 of about 0.3 to 1.5 mm and a diameter of about 0.1 to 1.0 mm from the upper surface to the lower surface.
A part of the wiring conductor 2 is attached to the upper and lower surfaces and the inner wall of each through hole 5, and the wiring conductors 2 on the upper and lower surfaces are electrically connected through the through hole 5.

【００１１】このような芯体１ａは、ガラス織物に未硬
化の熱硬化性樹脂を含浸させたシートを熱硬化させた
後、これに上面から下面にかけてドリル加工を施すこと
により製作される。なお、芯体１ａ上下面の配線導体２
は、芯体１ａ用のシートの上下全面に厚みが３〜50μｍ
程度の銅箔を貼着しておくとともにこの銅箔をシートの
硬化後にエッチング加工することにより所定のパターン
に形成される。また、貫通孔５内壁の配線導体２は、芯
体１ａに貫通孔５を設けた後に、この貫通孔５内壁に無
電解めっき法および電解めっき法により厚みが３〜50μ
ｍ程度の銅めっき膜を析出させることにより形成され
る。The core 1a is manufactured by thermally curing a sheet of glass fabric impregnated with an uncured thermosetting resin and then drilling the sheet from the upper surface to the lower surface. The wiring conductors 2 on the upper and lower surfaces of the core 1a
Has a thickness of 3 to 50 μm on the entire upper and lower surfaces of the sheet for the core 1a.
A predetermined degree of copper foil is adhered, and the copper foil is formed into a predetermined pattern by etching after curing of the sheet. The wiring conductor 2 on the inner wall of the through-hole 5 has a thickness of 3 to 50 μm after the through-hole 5 is formed in the core 1a and the inner wall of the through-hole 5 is formed by electroless plating and electrolytic plating.
It is formed by depositing a copper plating film of about m.

【００１２】さらに、芯体１ａは、その貫通孔５の内部
にエポキシ樹脂やビスマレイミドトリアジン樹脂等の熱
硬化性樹脂から成る樹脂柱６が充填されている。樹脂柱
６は、貫通孔５を塞ぐことにより貫通孔５の直上および
直下に絶縁層１ｂを形成可能とするためのものであり、
未硬化のペースト状の熱硬化性樹脂を貫通孔５内にスク
リーン印刷法により充填し、これを熱硬化させた後、そ
の上下面を略平坦に研磨することにより形成される。そ
して、この樹脂柱６を含む芯体１ａの上下面に絶縁層１
ｂが積層されている。Further, the core 1a is filled with a resin column 6 made of a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin inside the through hole 5. The resin pillar 6 is for enabling the insulating layer 1b to be formed directly above and directly below the through hole 5 by closing the through hole 5.
An uncured paste-like thermosetting resin is filled in the through-holes 5 by screen printing, and after thermosetting, the upper and lower surfaces are polished to be substantially flat. The insulating layer 1 is formed on the upper and lower surfaces of the core body 1a including the resin column 6.
b is laminated.

【００１３】芯体１ａの上下面に積層された絶縁層１ｂ
は、それぞれの厚みが20〜60μｍ程度であり、各層の上
面から下面にかけて直径が30〜100μｍ程度の複数の貫
通孔７を有している。これらの絶縁層１ｂは、配線導体
２を高密度に配線するための絶縁間隔を提供するための
ものである。そして、上層の配線導体２と下層の配線導
体２とを貫通孔７を介して電気的に接続することにより
高密度配線を立体的に形成可能としている。このような
絶縁層１ｂは、厚みが20〜60μｍ程度の未硬化の熱硬化
性樹脂のフィルムを芯体１ａ上下面に貼着し、これを熱
硬化させるとともにレーザー加工により貫通孔７を穿孔
し、さらにその上に同様にして次の絶縁層１ｂを順次積
み重ねることによって形成される。なお、各絶縁層１ｂ
表面および貫通孔７内に被着された配線導体２は、各絶
縁層１ｂを形成する毎に各絶縁層１ｂの表面および貫通
孔７内に５〜50μｍ程度の厚みの銅めっき膜を公知のセ
ミアディティブ法やサブトラクティブ法等のパターン形
成法により所定のパターンに被着させることによって形
成される。An insulating layer 1b laminated on the upper and lower surfaces of the core 1a
Has a plurality of through holes 7 each having a thickness of about 20 to 60 μm and a diameter of about 30 to 100 μm from the upper surface to the lower surface of each layer. These insulating layers 1b are for providing an insulating interval for wiring the wiring conductors 2 at high density. By electrically connecting the upper layer wiring conductor 2 and the lower layer wiring conductor 2 through the through-hole 7, high-density wiring can be formed three-dimensionally. Such an insulating layer 1b is formed by attaching a film of an uncured thermosetting resin having a thickness of about 20 to 60 μm to the upper and lower surfaces of the core 1a, thermally curing the same, and forming the through holes 7 by laser processing. The insulating layer 1b is formed by successively stacking the next insulating layers 1b in a similar manner. In addition, each insulating layer 1b
The wiring conductor 2 attached on the surface and in the through hole 7 is formed by forming a copper plating film having a thickness of about 5 to 50 μm on the surface of each insulating layer 1b and in the through hole 7 every time the insulating layer 1b is formed. It is formed by applying a predetermined pattern by a pattern forming method such as a semi-additive method or a subtractive method.

【００１４】絶縁基板１の上面から下面にかけて形成さ
れた配線導体２は、半導体素子４の各電極を外部電気回
路基板に接続するための導電路として機能し、絶縁基板
１の上面に設けられた部位の一部が半導体素子４の各電
極に例えば鉛−錫共晶合金から成る半田バンプ８を介し
て接合される電子部品接続パッド２ａを、絶縁基板１の
下面に露出した部位の一部が外部接続端子としてのリー
ドピン３を接合するためのピン付けパッド２ｂを形成し
ており、ピン付けパッド２ｂにはリードピン３が半田９
を介して立設されている。このような電子部品接続パッ
ド２ａおよびピン付けパッド２ｂは、図２に要部拡大平
面図で示すように、配線導体２に接続された略円形のパ
ターンの外周部をソルダーレジストと呼ばれる最外層の
絶縁層１ｂにより15〜150μｍ程度の幅で被覆してその
外周縁を画定することによりその直径φが、電子部品接
続パッド２ａであれば略70〜200μｍ程度に、ピン付け
パッド２ｂであれば略0.5〜2.5ｍｍ程度になるように形
成されている。なお、このようなソルダーレジスト１ｂ
により電子部品接続パッド２ａ同士あるいはピン付けパ
ッド２ｂ同士の半田８や９による電気的な短絡が有効に
防止されるとともに電子部品接続パッド２ａおよびピン
付けパッド２ｂの絶縁基板１に対する接合強度が高いも
のとなっている。The wiring conductor 2 formed from the upper surface to the lower surface of the insulating substrate 1 functions as a conductive path for connecting each electrode of the semiconductor element 4 to an external electric circuit board, and is provided on the upper surface of the insulating substrate 1. An electronic component connection pad 2a, a part of which is joined to each electrode of the semiconductor element 4 via a solder bump 8 made of, for example, a lead-tin eutectic alloy, is partially exposed on the lower surface of the insulating substrate 1. A pinning pad 2b for joining the lead pin 3 as an external connection terminal is formed, and the lead pin 3 is soldered to the pinning pad 2b.
It is erected through. As shown in the enlarged plan view of the main part of FIG. 2, the electronic component connection pad 2a and the pinning pad 2b are formed by forming the outer peripheral portion of the substantially circular pattern connected to the wiring conductor 2 on the outermost layer called solder resist. By covering the insulating layer 1b with a width of about 15 to 150 μm and defining the outer periphery thereof, the diameter φ is about 70 to 200 μm for the electronic component connection pad 2a, and substantially for the pinning pad 2b. It is formed to be about 0.5 to 2.5 mm. In addition, such solder resist 1b
This effectively prevents an electrical short circuit between the electronic component connection pads 2a or between the pin attachment pads 2b due to the solder 8 or 9, and has a high bonding strength between the electronic component connection pads 2a and the pin attachment pads 2b to the insulating substrate 1. It has become.

【００１５】また、ピン付けパッド２ｂに接合されたリ
ードピン３は搭載する半導体素子４を外部電気回路に接
続するための外部接続端子として機能する。The lead pins 3 joined to the pinning pads 2b function as external connection terminals for connecting the mounted semiconductor element 4 to an external electric circuit.

【００１６】そして、この配線基板においては、電子部
品接続パッド２ａに半導体素子４の各電極を半田バンプ
８を介して接合して半導体素子４を搭載するとともにこ
の半導体素子４を図示しない蓋体やポッティング樹脂に
より封止することによって電子装置となり、この電子装
置におけるリードピン３をソケットや半田を介して外部
電気回路基板の配線導体に接続することにより本発明の
電子装置が外部電気回路基板に実装されることとなる。In this wiring board, the electrodes of the semiconductor element 4 are bonded to the electronic component connection pads 2a via the solder bumps 8, and the semiconductor element 4 is mounted. An electronic device is obtained by sealing with a potting resin, and the electronic device of the present invention is mounted on the external electric circuit board by connecting the lead pins 3 of the electronic device to the wiring conductors of the external electric circuit board via a socket or solder. The Rukoto.

【００１７】なお、リードピン３は、図３に要部拡大断
面図で示すように、例えば鉄−ニッケル−コバルト合金
・鉄−ニッケル合金等の鉄系合金や銅−鉄−亜鉛−リン
合金等の銅系合金から成り、直径Ａが0.25〜0.5ｍｍ程
度で長さが１〜3.5ｍｍ程度の略円柱状の軸部３ａの上
端に直径Ｂが0.45〜1.25ｍｍで厚みＴが0.05〜0.3ｍｍ
程度のネールヘッドと呼ばれる略円板状の径大部３ｂを
形成して成る。そして、この径大部３ｂをピン付けパッ
ド２ｂに70〜85重量％の鉛と５〜20重量％の錫と５〜15
重量％のアンチモンとの合金から成る半田９で接合する
ことによりリードピン３がピン付けパッド２ｂに立設さ
れている。The lead pin 3 is made of an iron-based alloy such as an iron-nickel-cobalt alloy or an iron-nickel alloy or a copper-iron-zinc-phosphorus alloy as shown in an enlarged sectional view of a main part in FIG. It is made of a copper alloy and has a diameter A of about 0.25 to 0.5 mm and a length of about 1 to 3.5 mm. The upper end of a substantially cylindrical shaft portion 3a having a diameter B of 0.45 to 1.25 mm and a thickness T of 0.05 to 0.3 mm.
An approximately disk-shaped large-diameter portion 3b called a nail head is formed. Then, the large diameter portion 3b is attached to the pinning pad 2b with 70 to 85% by weight of lead, 5 to 20% by weight of tin and 5 to 15% by weight.
The lead pins 3 are erected on the pinning pads 2b by joining them with solder 9 made of an alloy with antimony by weight.

【００１８】本発明においては、このようにリードピン
３の径大部３ｂとピン付けパッド２ｂとを接合する半田
９が70〜85重量％の鉛と５〜20重量％の錫と５〜15重量
％のアンチモンとの合金から成ることが重要である。70
〜85重量％の鉛と５〜20重量％の錫と５〜15重量％のア
ンチモンとの合金から成る半田９は、鉄系合金や銅系合
金から成るリードピン３との濡れ性がそれほど良好では
ない。したがって、リードピン３とピン付けパッド２ｂ
とを半田９を介して接合する際に半田９がリードピン３
の軸部３ａに濡れ広がることが有効に防止され、その結
果、リードピン３の軸部３ａに半田９の付着がなく、リ
ードピン３を外部電気回路基板の配線導体にソケットや
半田を介して良好に接続することが可能となる。また、
70〜85重量％の鉛と５〜20重量％の錫と５〜15重量％の
アンチモンとの合金から成る半田９は、その融点が260
〜270℃程度と低いのでリードピン３とピン付けパッド
２ｂとを有機材料系の絶縁基板１に悪影響を与えること
なく接合することができる。In the present invention, the solder 9 for joining the large diameter portion 3b of the lead pin 3 and the pinning pad 2b is 70 to 85% by weight of lead, 5 to 20% by weight of tin, and 5 to 15% by weight. It is important that it consists of an alloy with% antimony. 70
The solder 9 made of an alloy of about 85% by weight of lead, 5% to 20% by weight of tin, and 5% to 15% by weight of antimony has poor wettability with the lead pin 3 made of an iron-based alloy or a copper-based alloy. Absent. Therefore, the lead pin 3 and the pinning pad 2b
When the solder 9 is joined via the solder 9, the solder 9 is
Is effectively prevented from spreading on the shaft portion 3a of the lead pin 3, and as a result, there is no adhesion of the solder 9 to the shaft portion 3a of the lead pin 3, and the lead pin 3 is satisfactorily connected to the wiring conductor of the external electric circuit board via a socket or solder. It becomes possible to connect. Also,
The solder 9 made of an alloy of 70 to 85% by weight of lead, 5 to 20% by weight of tin and 5 to 15% by weight of antimony has a melting point of 260%.
Since the temperature is as low as about 270 ° C., the lead pin 3 and the pinning pad 2b can be joined without adversely affecting the organic material-based insulating substrate 1.

【００１９】なお、半田９に含有される鉛は、その含有
量が70重量％未満であると、半田９の融点が低くなりす
ぎてしまい、例えば半導体素子４の各電極を半田８を介
して電子部品接続パッド２ａに電気的に接続する際等に
230℃程度の熱が印加されると半田９も同時に溶融して
リードピン３にずれが発生してしまう危険性が高くな
り、85重量％を超えると、有機材料系の配線基板に用い
る半田としては融点が高くなりすぎてしまい、リードピ
ン３をピン付けパッド２ｂに半田９を介して接合する際
に、半田９を溶融させるための熱で絶縁基板１に悪影響
を与えてしまう危険性が高くなる。したがって、半田９
に含有される鉛の含有率は、70〜85重量％の範囲に特定
される。If the content of lead contained in the solder 9 is less than 70% by weight, the melting point of the solder 9 becomes too low. For example, each electrode of the semiconductor element 4 is connected via the solder 8. When electrically connecting to the electronic component connection pad 2a
When the heat of about 230 ° C. is applied, the risk that the solder 9 is melted at the same time and the lead pin 3 is displaced increases, and when the heat exceeds 85% by weight, the solder used for the wiring board of the organic material is not used. The melting point becomes too high, and when joining the lead pin 3 to the pinning pad 2b via the solder 9, there is a high danger that the heat for melting the solder 9 may adversely affect the insulating substrate 1. Therefore, the solder 9
Is specified in the range of 70 to 85% by weight.

【００２０】また、半田９に含有される錫は、その含有
量が５重量％未満であると、半田９の融点が高くなりす
ぎる傾向にあり、20重量％を超えると、半田９のリード
ピン３に対する濡れ性が良好となりすぎて、リードピン
３をピン付けパッド２ｂに半田９を介して接合する際に
半田９の一部がリードピン３の軸部３ｂまで流出してし
まう危険性が高くなる。したがって、半田９中に含有さ
れる錫の含有量は、５〜20重量％の範囲に特定される。If the content of tin contained in the solder 9 is less than 5% by weight, the melting point of the solder 9 tends to be too high. When the lead pin 3 is joined to the pinning pad 2 b via the solder 9, there is a high danger that a part of the solder 9 flows out to the shaft portion 3 b of the lead pin 3. Therefore, the content of tin contained in the solder 9 is specified in the range of 5 to 20% by weight.

【００２１】さらに、半田９に含有されるアンチモン
は、半田９の固相温度を高めるとともに半田９に適度な
濡れ性を付与し、その含有量が５重量％未満であれば、
半田９のリードピン３に対する濡れ性が良好なものとな
りすぎてしまう傾向にあり、15重量％を超えると、半田
９の融点が高くなりすぎるとともに機械的強度が低下し
てしまう傾向にある。したがって、半田９に含有される
アンチモンの含有量は、５〜15重量％の範囲に特定され
る。Further, the antimony contained in the solder 9 increases the solid phase temperature of the solder 9 and imparts an appropriate wettability to the solder 9, and if the content is less than 5% by weight,
There is a tendency that the wettability of the solder 9 to the lead pins 3 tends to be too good, and if it exceeds 15% by weight, the melting point of the solder 9 tends to be too high and the mechanical strength tends to decrease. Therefore, the content of antimony contained in the solder 9 is specified in the range of 5 to 15% by weight.

【００２２】なお、リードピン３をピン付けパッド２ｂ
に半田９を介して接合するには、ピン付けパッド２ｂに
半田９用の半田ペーストを例えばメタルマスクを用いた
スクリーン印刷法により所定量印刷塗布するとともにそ
の上にリードピン３の径大部３ｂ上端面を突き当てて当
接させ、これらを260〜270℃程度高い温度で１〜２分間
加熱して半田を溶融させた後、常温に冷却する方法が採
用される。The lead pins 3 are connected to the pin pads 2b.
In order to join the lead pins 3 via the solder 9, a predetermined amount of a solder paste for the solder 9 is applied to the pinning pad 2 b by screen printing using a metal mask, for example, and the large diameter portion 3 b of the lead pin 3 is formed thereon. A method is employed in which the end faces are brought into contact with each other, heated at a high temperature of about 260 to 270 ° C. for 1 to 2 minutes to melt the solder, and then cooled to room temperature.

【００２３】かくして、本発明のピン付き配線基板およ
びこれを用いた電子装置によれば、リードピン３の軸部
３ａに半田９の付着がなく、それによりリードピン３を
外部電気回路基板の配線導体にソケットや半田を介して
良好に接続可能なピン付き配線基板およびそれを用いた
電子装置を提供することができる。Thus, according to the wiring board with pins and the electronic device using the same of the present invention, the solder 9 does not adhere to the shaft portion 3a of the lead pin 3, thereby connecting the lead pin 3 to the wiring conductor of the external electric circuit board. It is possible to provide a wiring board with pins that can be satisfactorily connected via a socket or solder and an electronic device using the same.

【００２４】なお、本発明は、上述の実施の形態の一例
に限定されるものではなく、本発明の要旨を逸脱しない
範囲であれば種々の変更が可能であることはいうまでも
ない。The present invention is not limited to the above-described embodiment, and it goes without saying that various modifications can be made without departing from the scope of the present invention.

【００２５】[0025]

【発明の効果】本発明のピン付き配線基板およびこれを
用いた電子装置によれば、リードピンの径大部とピン付
けパッドとを接合する半田は、70〜85重量％の鉛と５〜
15重量％の錫と５〜15重量％のアンチモンとの合金から
成ることから、このような組成によりリードピンとの濡
れ性が適度に抑制され、その結果、リードピンを外部電
気回路基板の配線導体にソケットや半田を介して良好に
接続可能なピン付き配線基板およびそれを用いた電子装
置を提供することができる。According to the wiring board with pins and the electronic device using the same according to the present invention, the solder for joining the large-diameter portion of the lead pin and the pinning pad is composed of 70 to 85% by weight of lead and 5 to 5% by weight.
Since it is composed of an alloy of 15% by weight of tin and 5 to 15% by weight of antimony, the wettability with the lead pin is appropriately suppressed by such a composition, and as a result, the lead pin is used as a wiring conductor of the external electric circuit board. It is possible to provide a wiring board with pins that can be satisfactorily connected via a socket or solder and an electronic device using the same.

【図面の簡単な説明】[Brief description of the drawings]

【図１】本発明のピン付き配線基板および電子装置の実
施形態例の断面図である。FIG. 1 is a cross-sectional view of an embodiment of a wiring board with pins and an electronic device according to the present invention.

【図２】本発明のピン付き配線基板および電子装置の実
施形態例の要部拡大平面図である。FIG. 2 is an enlarged plan view of a main part of an embodiment of a wiring board with pins and an electronic device according to the present invention.

【図３】本発明のピン付き配線基板および電子装置の実
施形態例の要部拡大断面図である。FIG. 3 is an enlarged sectional view of a main part of an embodiment of a wiring board with pins and an electronic device according to the present invention.

【符号の説明】[Explanation of symbols]

１・・・・・絶縁基体 ２・・・・・配線導体 ２ｂ・・・・ピン付けパッド ３・・・・・リードピン ３ａ・・・・軸部 ３ｂ・・・・径大部 ４・・・・・電子部品としての半導体素子 ９・・・・・半田 1 ... insulating base 2 ... wiring conductor 2 b ... pinning pad 3 ... lead pin 3 a ... shaft part 3 b ... large diameter part 4 ... ..Semiconductor elements as electronic components 9 .. Solder

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 ＦＩ テーマコート゛(参考） Ｈ０５Ｋ 1/18 Ｈ０５Ｋ 3/34 ５１２Ｃ 3/34 ５１２ Ｈ０１Ｌ 23/12 Ｐ ──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. 7 Identification symbol FI Theme coat ゛ (Reference) H05K 1/18 H05K 3/34 512C 3/34 512 H01L 23/12 P

Claims (2)

【特許請求の範囲】[Claims] 【請求項１】 配線導体を有する有機材料系の絶縁基板
の下面に前記配線導体と電気的に接続されたピン付けパ
ッドを設けるとともに、該ピン付けパッドに略円柱状の
軸部の上端に略円板状の径大部を形成して成るリードピ
ンを前記径大部と前記ピン付けパッドとを半田で接合す
ることにより立設して成るピン付き配線基板であって、
前記半田は、７０〜８５重量％の鉛と５〜２０重量％の
錫と５〜１５重量％のアンチモンとの合金から成ること
を特徴とするピン付き配線基板。A pinned pad electrically connected to the wiring conductor is provided on a lower surface of an organic material-based insulating substrate having a wiring conductor, and the pinned pad is provided on an upper end of a substantially cylindrical shaft portion. A pin-attached wiring board, wherein a lead pin formed by forming a disk-shaped large-diameter portion is erected by joining the large-diameter portion and the pinning pad by soldering,
A wiring board with pins, wherein the solder comprises an alloy of 70 to 85% by weight of lead, 5 to 20% by weight of tin, and 5 to 15% by weight of antimony. 【請求項２】 配線導体を有する有機材料系の絶縁基板
の下面に前記配線導体と電気的に接続されたピン付けパ
ッドを設けるとともに、該ピン付けパッドに略円柱状の
軸部の上端に略円板状の径大部を設けて成るリードピン
を前記径大部と前記ピン付けパッドとを半田で接合する
ことにより立設して成るピン付き配線基板に電子部品を
搭載するとともに該電子部品の電極と前記配線導体とを
電気的に接続して成る電子装置であって、前記半田は、
７０〜８５重量％の鉛と５〜２０重量％の錫と５〜１５
重量％のアンチモンとの合金から成ることを特徴とする
電子装置。2. An organic material-based insulating substrate having a wiring conductor is provided with a pinning pad electrically connected to the wiring conductor on a lower surface thereof, and the pinning pad is provided on an upper end of a substantially cylindrical shaft portion. An electronic component is mounted on a wiring board with pins formed by erecting a lead pin provided with a disk-shaped large-diameter portion by soldering the large-diameter portion and the pinning pad, and mounting the electronic component. An electronic device formed by electrically connecting an electrode and the wiring conductor, wherein the solder is
70-85 wt% lead, 5-20 wt% tin and 5-15
An electronic device comprising an alloy with antimony by weight.
JP2001078424A 2001-03-19 2001-03-19 Circuit board with pin and electronic device using the same Pending JP2002280513A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001078424A JP2002280513A (en) 2001-03-19 2001-03-19 Circuit board with pin and electronic device using the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001078424A JP2002280513A (en) 2001-03-19 2001-03-19 Circuit board with pin and electronic device using the same

Publications (1)

Publication Number Publication Date
JP2002280513A true JP2002280513A (en) 2002-09-27

Family

ID=18935038

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001078424A Pending JP2002280513A (en) 2001-03-19 2001-03-19 Circuit board with pin and electronic device using the same

Country Status (1)

Country Link
JP (1) JP2002280513A (en)

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