JP2003347469A - Electronic equipment - Google Patents
Electronic equipmentInfo
- Publication number
- JP2003347469A JP2003347469A JP2002152973A JP2002152973A JP2003347469A JP 2003347469 A JP2003347469 A JP 2003347469A JP 2002152973 A JP2002152973 A JP 2002152973A JP 2002152973 A JP2002152973 A JP 2002152973A JP 2003347469 A JP2003347469 A JP 2003347469A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- electronic component
- connection pad
- solder
- tin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、上面に電子部品接
続パッドを有し、下面に外部接続パッドを有する絶縁基
板上に電子部品を搭載するとともに、電子部品の電極を
電子部品接続パッドに電気的に接続して成る電子装置に
関する。The present invention relates to a method for mounting electronic components on an insulating substrate having an electronic component connection pad on an upper surface and an external connection pad on a lower surface, and connecting electrodes of the electronic component to the electronic component connection pads. The present invention relates to an electronic device that is electrically connected.
【０００２】[0002]
【従来の技術】従来、例えばガラス−エポキシ板等から
成る絶縁板やエポキシ樹脂等から成る絶縁層を複数層積
層して成る絶縁基板の内部および上下面に銅めっき等か
ら成る複数の配線導体を設けるとともにこの絶縁基板上
に半導体素子等の電子部品を搭載して成る電子装置が知
られている。2. Description of the Related Art Conventionally, a plurality of wiring conductors made of copper plating or the like are provided on the inner and upper and lower surfaces of an insulating board formed by laminating a plurality of insulating layers made of, for example, an epoxy resin or an insulating layer made of a glass-epoxy plate. There is known an electronic device provided with electronic components such as semiconductor elements mounted on the insulating substrate.
【０００３】このような電子装置においては、絶縁基板
の上面に導出した配線導体の一部が電子部品の電極がボ
ンディングワイヤや金属バンプを介して電気的に接続さ
れる、直径が30〜300μｍで厚みが15〜50μｍの電子部
品接続パッドを形成しており、絶縁基板の下面に導出し
た配線導体の一部が外部電気回路基板に半田を介して接
続される、直径が300〜800μｍで厚みが15〜50μｍの外
部接続パッドを形成している。In such an electronic device, a part of a wiring conductor led out to an upper surface of an insulating substrate is electrically connected to an electrode of an electronic component through a bonding wire or a metal bump. Forming electronic component connection pads with a thickness of 15 to 50 μm, a part of the wiring conductor led out on the lower surface of the insulating substrate is connected to an external electric circuit board via solder, the diameter is 300 to 800 μm and the thickness is External connection pads of 15 to 50 μm are formed.
【０００４】なお、このような電子部品接続パッドや外
部接続パッドには、配線導体の酸化腐食を有効に防止す
る目的で、通常、厚みが0.5〜10μｍ程度のニッケルめ
っき層および厚みが0.01〜0.8μｍ程度の金めっき層が
順次被着されている。In order to effectively prevent oxidative corrosion of wiring conductors, such electronic component connection pads and external connection pads are generally provided with a nickel plating layer having a thickness of about 0.5 to 10 μm and a thickness of 0.01 to 0.8 μm. A gold plating layer of about μm is sequentially applied.
【０００５】そして、電子部品を絶縁基板の電子部品接
続パッドに実装して電子装置を製作するとともに、絶縁
基板の外部接続パッドを半田バンプを介して外部電気回
路基板に接続することにより、電子部品が外部電気回路
に電気的に接続されることとなる。なお、このとき外部
接続パッドの金めっき層は、溶融した半田内に拡散吸収
されて消滅し、またニッケルめっき層上には、このニッ
ケルめっき層中のニッケルと半田中の錫とが反応して成
るニッケル−錫合金層が形成される。An electronic device is manufactured by mounting electronic components on electronic component connection pads of an insulating substrate, and connecting external connection pads of the insulating substrate to an external electric circuit board via solder bumps. Are electrically connected to an external electric circuit. At this time, the gold plating layer of the external connection pad is diffused and absorbed in the molten solder and disappears, and on the nickel plating layer, nickel in the nickel plating layer reacts with tin in the solder. A nickel-tin alloy layer is formed.
【０００６】[0006]
【発明が解決しようとする課題】しかしながら、この従
来の電子装置によると、半導体素子等の電子部品が作動
時に発生する熱等に起因する熱応力が外部接続パッドに
繰返し印加されると、例えば、−55℃×15分間と125℃
×15分間とを１サイクルとする温度サイクル試験（ＴＣ
Ｔ）等の接続信頼性試験において、ニッケルめっき層上
のニッケル−錫合金が脆いために、ニッケルめっき層と
半田層との間で剥離が生じて断線し易く、そのため電子
部品を長期間にわたり正常に作動させることができない
という問題点を有していた。However, according to this conventional electronic device, when a thermal stress caused by heat or the like generated when an electronic component such as a semiconductor element is operated is repeatedly applied to an external connection pad, for example, -55 ° C x 15 minutes and 125 ° C
X 15 minutes as one cycle (TC cycle test)
In a connection reliability test such as T), since the nickel-tin alloy on the nickel plating layer is brittle, peeling occurs between the nickel plating layer and the solder layer and the wire is easily disconnected, and thus the electronic component can be normally used for a long time. However, there was a problem that it could not be operated.
【０００７】本発明は、かかる従来の問題点に鑑み完成
されたものであり、その目的は、外部接続パッドの銅め
っき層と半田層との間で剥離が発生することがなく、電
子部品を長期間にわたり正常に作動させることが可能な
電子装置を提供することにある。The present invention has been completed in view of the above-mentioned conventional problems. It is an object of the present invention to provide an electronic component without peeling between a copper plating layer of an external connection pad and a solder layer. An object of the present invention is to provide an electronic device that can be normally operated for a long time.
【０００８】[0008]
【課題を解決するための手段】本発明の電子装置は、上
面に電子部品接続パッドを有し、下面に外部接続パッド
を有する絶縁基板上に電子部品を搭載するとともに、電
子部品の電極を電子部品接続パッドに電気的に接続して
成る電子装置であって、外部接続パッドは、銅めっき層
に錫を含有する半田層を被覆して成るとともに銅めっき
層と半田層との間に銅と錫とを含有する傾斜合金層が形
成されていることを特徴とするものである。An electronic device according to the present invention has an electronic component mounted on an insulating substrate having an electronic component connection pad on an upper surface and an external connection pad on a lower surface, and has an electrode for the electronic component. An electronic device electrically connected to a component connection pad, wherein the external connection pad is formed by coating a solder layer containing tin on a copper plating layer, and copper is provided between the copper plating layer and the solder layer. A gradient alloy layer containing tin is formed.
【０００９】本発明の電子装置によれば、外部接続パッ
ドは、銅めっき層に錫を含有する半田層を被覆して成る
とともに銅めっき層と半田層との間に銅と錫とを含有す
る傾斜合金層が形成されていることから、外部接続パッ
ドの銅めっき層と半田層とが銅と錫とを含有する傾斜合
金層を介して強固に接合され、その結果、電子部品が作
動時に発生する熱等による熱応力が繰り返し印加された
としても、外部接続パッドの銅めっき層と半田層とが剥
離することがなく、電子部品を長期間にわたり正常に作
動させることができる。According to the electronic device of the present invention, the external connection pad is formed by coating a copper-containing layer with a solder layer containing tin and containing copper and tin between the copper-plated layer and the solder layer. Since the graded alloy layer is formed, the copper plating layer and the solder layer of the external connection pad are firmly joined via the graded alloy layer containing copper and tin, and as a result, electronic components are generated during operation. Even if thermal stress due to heat or the like is repeatedly applied, the copper plating layer and the solder layer of the external connection pad do not peel off, and the electronic component can operate normally for a long period of time.
【００１０】[0010]
【発明の実施の形態】次に、本発明の電子装置を、添付
の図面に基づいて詳細に説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an electronic device according to the present invention will be described in detail with reference to the accompanying drawings.
【００１１】図１は、本発明の電子装置の実施の形態の
一例を示す断面図であり、図２は、その要部拡大断面図
である。これらの図において、１は絶縁基板、２は電子
部品、３は電子部品接続パッド、４は外部接続パッドで
あり、本発明の電子装置は、主にこれらで構成されてい
る。なお、この図の例では、電子部品２は例えばＬＳＩ
等の半導体素子であり、外部接続パッド４は銅めっき層
５に錫を含有する半田層６を被覆することにより形成さ
れている。FIG. 1 is a sectional view showing an example of an embodiment of an electronic device according to the present invention, and FIG. 2 is an enlarged sectional view of a main part thereof. In these figures, 1 is an insulating substrate, 2 is an electronic component, 3 is an electronic component connection pad, and 4 is an external connection pad, and the electronic device of the present invention is mainly composed of these. Note that, in the example of FIG.
The external connection pads 4 are formed by coating a copper plating layer 5 with a solder layer 6 containing tin.
【００１２】本発明の電子装置は、上面に電子部品接続
パッド３を有し、下面に外部接続パッド４を有する絶縁
基板１上に電子部品２を搭載するとともに、電子部品２
の電極を電子部品接続パッド３に電気的に接続して成
る。The electronic device of the present invention has an electronic component 2 mounted on an insulating substrate 1 having an electronic component connection pad 3 on an upper surface and an external connection pad 4 on a lower surface.
Are electrically connected to the electronic component connection pads 3.
【００１３】絶縁基板１は、例えば、ガラス繊維を縦横
に織り込んだガラス織物に、エポキシ樹脂やビスマレイ
ミドトリアジン樹脂等の熱硬化性樹脂を含浸させて成る
板状の芯体７の上下面に、エポキシ樹脂やビスマレイミ
ドトリアジン樹脂等の熱硬化性樹脂から成る絶縁層８ａ
をそれぞれ複数層積層して成り、その上面から下面にか
けては銅めっきや銅箔等から成る複数の配線導体９が形
成されている。The insulating substrate 1 has, for example, a glass fabric in which glass fibers are woven vertically and horizontally impregnated with a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin. Insulating layer 8a made of thermosetting resin such as epoxy resin or bismaleimide triazine resin
And a plurality of wiring conductors 9 made of copper plating, copper foil or the like are formed from the upper surface to the lower surface.
【００１４】絶縁基板１を構成する芯体７は、厚みが0.
3〜1.5ｍｍ程度であり、その上面から下面にかけて直径
が0.2〜1.0ｍｍ程度の複数のスルーホール10を有してい
る。そして、芯体７の上下面および各スルーホール10の
内壁には配線導体９の一部が被着されており、上下面の
配線導体９がスルーホール10を介して電気的に接続され
ている。The core 7 constituting the insulating substrate 1 has a thickness of 0.1 mm.
It has a plurality of through holes 10 of about 3 to 1.5 mm and a diameter of about 0.2 to 1.0 mm from the upper surface to the lower surface. Part of the wiring conductor 9 is attached to the upper and lower surfaces of the core body 7 and the inner wall of each through hole 10, and the wiring conductors 9 on the upper and lower surfaces are electrically connected through the through hole 10. .
【００１５】このような芯体７は、ガラス織物に未硬化
の熱硬化性樹脂を含浸させたシートを熱硬化させた後、
これに上面から下面にかけてドリル加工を施すことによ
り製作される。なお、芯体７上下面の配線導体９は、芯
体７用のシートの上下全面に厚みが5〜50μｍ程度の銅
箔を貼着しておくとともに、この銅箔をシートの硬化後
にエッチング加工することにより所定のパターンに形成
される。また、スルーホール10内壁の配線導体９は、芯
体７にスルーホール10を設けた後に、このスルーホール
10内壁に無電解めっき法および電解めっき法により厚み
が5〜50μｍ程度の銅めっきを析出させることにより形
成される。The core 7 is formed by thermally curing a sheet in which a glass fabric is impregnated with an uncured thermosetting resin,
It is manufactured by performing drilling from the upper surface to the lower surface. For the wiring conductors 9 on the upper and lower surfaces of the core 7, copper foil having a thickness of about 5 to 50 μm is stuck on the entire upper and lower surfaces of the sheet for the core 7, and the copper foil is etched after the sheet is cured. Thus, a predetermined pattern is formed. Further, the wiring conductor 9 on the inner wall of the through hole 10 is formed by forming the through hole 10 in the
10 is formed by depositing copper plating having a thickness of about 5 to 50 μm on the inner wall by electroless plating and electrolytic plating.
【００１６】さらに、芯体７は、そのスルーホール10の
内部にエポキシ樹脂やビスマレイミドトリアジン樹脂等
の熱硬化性樹脂から成る樹脂柱11が充填されている。樹
脂柱11は、スルーホール10を塞ぐことによりスルーホー
ル10の直上および直下に絶縁層８ａを形成可能とするた
めのものであり、未硬化のペースト状の熱硬化性樹脂を
スルーホール10内にスクリーン印刷法により充填し、こ
れを熱硬化させた後、その上下面を略平坦に研磨するこ
とにより形成される。そして、この樹脂柱11を含む芯体
７の上下面に絶縁層８ａが積層されている。Further, the core 7 is filled with resin columns 11 made of a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin inside the through holes 10. The resin pillar 11 is for enabling the insulating layer 8 a to be formed directly above and directly below the through hole 10 by closing the through hole 10. An uncured paste-like thermosetting resin is placed in the through hole 10. It is formed by filling by a screen printing method, thermally curing the material, and polishing the upper and lower surfaces thereof to be substantially flat. An insulating layer 8a is laminated on the upper and lower surfaces of the core body 7 including the resin columns 11.
【００１７】絶縁層８ａは、それぞれの厚みが20〜50μ
ｍ程度であり、各層の上面から下面にかけて直径が30〜
100μｍ程度の複数の貫通孔12を有している。これらの
絶縁層８ａは、配線導体９を高密度に配線するための絶
縁間隔を提供するためのものであり、最表層を除く絶縁
層８ａにはその表面および貫通孔12内に配線導体９の一
部が被着されている。そして、上層の配線導体９と下層
の配線導体９とを貫通孔12内の貫通導体を介して電気的
に接続することにより高密度配線を立体的に形成可能と
している。なお、最表層の絶縁層８ａは、厚みが20〜50
μｍ程度の耐半田樹脂層８ｂである。The insulating layer 8a has a thickness of 20 to 50 μm.
m, and the diameter from the upper surface to the lower surface of each layer is 30 to
It has a plurality of through holes 12 of about 100 μm. These insulating layers 8a are for providing an insulating interval for wiring the wiring conductors 9 at high density, and the insulating layers 8a except for the outermost layer are provided on the surface and in the through holes 12 of the wiring conductors 9. Some have been deposited. By electrically connecting the upper-layer wiring conductor 9 and the lower-layer wiring conductor 9 via the through conductor in the through-hole 12, high-density wiring can be formed three-dimensionally. The outermost insulating layer 8a has a thickness of 20 to 50.
It is a solder-resistant resin layer 8b of about μm.
【００１８】このような絶縁層８ａは、厚みが20〜50μ
ｍ程度の未硬化の熱硬化性樹脂のフィルムを芯体７の上
下面に貼着し、これを熱硬化させるとともにレーザ加工
により貫通孔12を穿孔し、さらにその上に同様にして次
の絶縁層８ａを順次積み重ねることによって形成され
る。なお、各絶縁層８a表面および貫通孔12内に被着さ
れた配線導体９は、各絶縁層８ａを形成する毎に各絶縁
層８ａの表面および貫通孔12内に5〜50μｍ程度の厚み
の銅めっきを公知のセミアディティブ法やサブトラクテ
ィブ法等のパターン形成法により所定のパターンに被着
させることによって形成される。The insulating layer 8a has a thickness of 20 to 50 μm.
m of uncured thermosetting resin film is adhered to the upper and lower surfaces of the core body 7, which is thermally cured, and a through hole 12 is formed by laser processing. It is formed by sequentially stacking the layers 8a. The wiring conductor 9 attached to the surface of each insulating layer 8a and the inside of the through hole 12 has a thickness of about 5 to 50 μm on the surface of each insulating layer 8a and the inside of the through hole 12 every time the insulating layer 8a is formed. It is formed by applying copper plating to a predetermined pattern by a known pattern forming method such as a semi-additive method or a subtractive method.
【００１９】絶縁基板１の上面から下面にかけて形成さ
れた配線導体９は、電子部品２の各電極を外部電気回路
基板に接続するための導電路として機能し、絶縁基板１
の上面に露出している部位が電子部品２の各電極に導体
バンプ13を介して接続される、直径が30〜300μｍで厚
みが15〜50μｍの電子部品接続パッド３の一部を、絶縁
基板１の下面に露出している部位が外部電気回路基板
（図示せず）に導体バンプ（図示せず）を介して接続さ
れる、直径が300〜800μｍで厚みが15〜50μｍの外部接
続パッド４の一部を形成している。The wiring conductor 9 formed from the upper surface to the lower surface of the insulating substrate 1 functions as a conductive path for connecting each electrode of the electronic component 2 to an external electric circuit board.
A portion of the electronic component connection pad 3 having a diameter of 30 to 300 μm and a thickness of 15 to 50 μm, which is connected to each electrode of the electronic component 2 via the conductive bump 13 at a portion exposed on the upper surface of the electronic component 2, is connected to an insulating substrate. An external connection pad 4 having a diameter of 300 to 800 μm and a thickness of 15 to 50 μm, which is connected to an external electric circuit board (not shown) via a conductive bump (not shown) at a portion exposed on the lower surface of 1. Form a part of.
【００２０】なお、この例では、電子部品２の各電極は
電子部品接続パッド３に導体バンプ13を介して接続され
ているが、電子部品２の電極は例えばボンディングワイ
ヤを介して電子部品接続パッド３に接続されてもよい。
その場合、電子部品接続パッド３は電子部品２が搭載さ
れる部位の周囲に配置される。In this example, each electrode of the electronic component 2 is connected to the electronic component connection pad 3 via the conductor bump 13, but the electrode of the electronic component 2 is connected, for example, via a bonding wire. 3 may be connected.
In that case, the electronic component connection pad 3 is arranged around a portion where the electronic component 2 is mounted.
【００２１】そして、絶縁基板１上面の電子部品接続パ
ッド３に半導体素子等の電子部品２の各電極を導体バン
プ13を介して接続した後、電子部品２をエポキシ樹脂等
から成るアンダーフィル材14により絶縁基板１に接合す
ることにより電子装置が完成する。After connecting each electrode of the electronic component 2 such as a semiconductor device to the electronic component connection pad 3 on the upper surface of the insulating substrate 1 via the conductor bump 13, the electronic component 2 is connected to the underfill material 14 made of epoxy resin or the like. To complete the electronic device.
【００２２】なお、本発明の電子装置においては、導体
バンプを介した外部電気回路基板への実装を容易、かつ
強固なものとするために、外部接続パッド４を、絶縁基
板１の下面に露出した配線導体９を構成する銅めっき層
５に錫を含有する半田層６を被覆して成るとともに銅め
っき層５と半田層６との間に銅と錫を含有する傾斜合金
層15を形成して成るものとしている。そして、本発明に
おいてはこのことが重要である。In the electronic device of the present invention, the external connection pads 4 are exposed on the lower surface of the insulating substrate 1 in order to easily and firmly mount the external connection pads via the conductor bumps. The copper plating layer 5 constituting the wiring conductor 9 thus formed is coated with a solder layer 6 containing tin, and a gradient alloy layer 15 containing copper and tin is formed between the copper plating layer 5 and the solder layer 6. It consists of This is important in the present invention.
【００２３】本発明の電子装置によれば、外部接続パッ
ド４は、銅めっき層５に錫を含有する半田層６を被覆し
て成るとともに銅めっき層５と半田層６との間に銅と錫
とを含有する傾斜合金層15が形成されていることから、
外部接続パッド４の銅めっき層５と半田層６とが銅と錫
とを含有する傾斜合金層15を介して強固に接合され、そ
の結果、電子部品２が作動時に発生する熱等による熱応
力が繰り返し印加されたとしても外部接続パッド４の銅
めっき層５と半田層６とが剥離することがなく、電子部
品を長期間にわたり正常に作動させることができる。According to the electronic device of the present invention, the external connection pad 4 is formed by covering the copper plating layer 5 with the solder layer 6 containing tin and at the same time, copper is provided between the copper plating layer 5 and the solder layer 6. Since the gradient alloy layer 15 containing tin is formed,
The copper plating layer 5 and the solder layer 6 of the external connection pad 4 are firmly joined via the gradient alloy layer 15 containing copper and tin, and as a result, thermal stress due to heat or the like generated when the electronic component 2 operates. Is repeatedly applied, the copper plating layer 5 of the external connection pad 4 and the solder layer 6 do not peel off, and the electronic component can be normally operated for a long time.
【００２４】なお、ここで傾斜合金層15とは、特性の異
なる金属の接合や表面被覆において、両者の接合面での
急激な性質の変化を無くすために、接合領域での組成を
連続的に徐々に変化させた合金層である。銅めっき層５
と半田層６とから形成される傾斜合金層15の組成は、例
えば、半田層６として鉛／錫＝60質量％／40質量％の鉛
−錫半田を用いた場合、半田層６から銅めっき層５にか
けて錫が40質量％から０質量％へ除々に減少し、銅が60
質量％から100重量％に除々に増加する傾斜組成にな
る。なお、半田層６を形成する半田としては、例えば鉛
−錫、錫−亜鉛、錫−銀−ビスマス等の錫を含有させた
ものが用いられる。Here, the graded alloy layer 15 is used to continuously change the composition in the joining region in order to eliminate a sudden change in properties at the joining surface between the joining and surface coating of metals having different characteristics. This is an alloy layer that is gradually changed. Copper plating layer 5
The composition of the gradient alloy layer 15 formed from the solder layer 6 and the solder layer 6 is, for example, when a lead-tin solder of lead / tin = 60% by mass / 40% by mass is used as the solder layer 6, copper plating is performed from the solder layer 6. Through layer 5, tin gradually decreased from 40% by weight to 0% by weight and copper was reduced to 60% by weight.
The graded composition gradually increases from mass% to 100 wt%. As the solder for forming the solder layer 6, for example, a solder containing tin such as lead-tin, tin-zinc, tin-silver-bismuth is used.
【００２５】なお、半田層６の錫の含有量は20〜70質量
％の範囲が好ましい。錫の含有量が20質量％より少ない
と錫が拡散し難く、銅めっき層５と半田層６とから形成
される傾斜合金層15が良好に形成されにくい傾向にあ
り、70質量％より多いと半田層６の柔軟性が低下し、長
期の熱履歴を加えるとクラックが生じ易くなる傾向にあ
る。従って、半田層６の錫の含有量は20〜70質量％の範
囲が好ましい。The tin content of the solder layer 6 is preferably in the range of 20 to 70% by mass. If the content of tin is less than 20% by mass, tin is difficult to diffuse, and the gradient alloy layer 15 formed from the copper plating layer 5 and the solder layer 6 tends to be difficult to be formed satisfactorily. The flexibility of the solder layer 6 decreases, and cracks tend to occur when a long-term heat history is added. Therefore, the tin content of the solder layer 6 is preferably in the range of 20 to 70% by mass.
【００２６】外部接続パッド４を構成する銅めっき層５
上に半田層６を取着させるには、まず、図２に要部拡大
断面図で示すように、例えば、外部接続パッド４を構成
する銅めっき層５の表面にロジン樹脂と有機溶剤とから
成るフラックスを塗布して銅めっき層５の半田濡れ性を
向上させた後、この上に、例えば鉛−錫から成る半田ペ
ーストを、５〜15μｍの厚みに印刷する。次に、加熱リ
フロー炉を用いて窒素雰囲気中で、加熱リフロー炉のピ
ーク温度を半田の融点付近の温度（180〜210℃）に設定
し、数分間リフローすることにより、半田ペーストが一
旦溶融した後に固化して半田層６が銅めっき層５に固着
され外部接続パッド４が形成される。このとき、半田の
融点付近の温度で数分間加熱することにより、銅めっき
層５と半田層６との接合領域には、半田層６中の錫が銅
めっき層５へ除々に拡散反応して銅と錫とを含有する厚
みが0.5〜５μｍ程度の銅と錫とを含有する傾斜合金層1
5が形成される。そして、この傾斜合金層15を介して銅
めっき層５と半田層６とが強固に接合される。Copper plating layer 5 constituting external connection pad 4
In order to attach the solder layer 6 thereon, first, as shown in an enlarged sectional view of a main part in FIG. 2, for example, a rosin resin and an organic solvent are applied to the surface of the copper plating layer 5 constituting the external connection pad 4. After improving the solder wettability of the copper plating layer 5 by applying a flux having a thickness of 5 to 15 μm, a solder paste made of, for example, lead-tin is printed thereon. Next, in a nitrogen atmosphere using a heating reflow furnace, the peak temperature of the heating reflow furnace was set to a temperature near the melting point of the solder (180 to 210 ° C.), and the solder paste was once melted by reflowing for several minutes. Thereafter, the solder layer 6 is solidified and the solder layer 6 is fixed to the copper plating layer 5 to form the external connection pads 4. At this time, by heating at a temperature near the melting point of the solder for several minutes, tin in the solder layer 6 gradually diffuses into the copper plating layer 5 in the joint region between the copper plating layer 5 and the solder layer 6 and reacts. Gradient alloy layer 1 containing copper and tin having a thickness of about 0.5 to 5 μm containing copper and tin
5 is formed. Then, the copper plating layer 5 and the solder layer 6 are firmly joined via the gradient alloy layer 15.
【００２７】なお、銅と錫とを含有する傾斜合金層15の
厚みが0.5μｍより薄いと傾斜合金15と半田層６との密
着強度が弱くなり、半田層６と銅めっき層５とが剥離し
易くなる傾向があり、５μｍより厚いと錫の拡散に長時
間を有するため絶縁基板１の熱硬化性樹脂が劣化し、絶
縁基板１と銅めっき層５との密着強度が低下してしまう
傾向にある。従って、銅と錫とを含有する傾斜合金層15
の厚みは0.5〜５μｍの範囲が好ましい。このような銅
と錫とを含有する傾斜合金層15の厚みは、銅めっき層５
上に半田を溶融させる時間を調節することにより、所望
の値とすることができる。If the thickness of the gradient alloy layer 15 containing copper and tin is smaller than 0.5 μm, the adhesion strength between the gradient alloy 15 and the solder layer 6 becomes weak, and the solder layer 6 and the copper plating layer 5 are separated. When the thickness is more than 5 μm, the thermosetting resin of the insulating substrate 1 is deteriorated because the tin has a long time to diffuse, and the adhesion strength between the insulating substrate 1 and the copper plating layer 5 tends to decrease. It is in. Therefore, the graded alloy layer 15 containing copper and tin
Has a thickness of preferably 0.5 to 5 μm. The thickness of the graded alloy layer 15 containing copper and tin is such that the copper plating layer 5
A desired value can be obtained by adjusting the time for melting the solder on top.
【００２８】なお、加熱リフロー炉で半田を溶融する際
の熱から絶縁層８ａを守るため、耐半田樹脂層８ｂが被
着されている。耐半田樹脂層８ｂは外部接続パッド４を
露出するように形成され、耐半田樹脂層８ｂの厚みが外
部接続パッド４の厚みより厚く形成されている。In order to protect the insulating layer 8a from heat when the solder is melted in the heating reflow furnace, a solder-resistant resin layer 8b is provided. The solder-resistant resin layer 8b is formed so as to expose the external connection pad 4, and the thickness of the solder-resistant resin layer 8b is formed to be larger than the thickness of the external connection pad 4.
【００２９】かくして、本発明の電子装置によれば、上
面に電子部品接続パッドを有し、下面に外部接続パッド
を有する絶縁基板上に電子部品を搭載するとともに、電
子部品の電極を電子部品接続パッドに電気的に接続する
ことにより、電子部品を長期間にわたり正常に作動させ
ることができる。Thus, according to the electronic device of the present invention, the electronic component is mounted on the insulating substrate having the electronic component connection pad on the upper surface and the external connection pad on the lower surface, and the electrodes of the electronic component are connected to the electronic component. By electrically connecting to the pad, the electronic component can operate normally for a long time.
【００３０】なお、本発明は、上述の実施例に限定され
るものでなく、本発明の要旨を逸脱しない範囲であれば
種々の変更は可能である。The present invention is not limited to the above-described embodiment, and various changes can be made without departing from the gist of the present invention.
【００３１】[0031]
【発明の効果】本発明の電子装置によれば、外部接続パ
ッドは、銅めっき層に錫を含有する半田層を被覆して成
るとともに銅めっき層と半田層との間に銅と錫とを含有
する傾斜合金層が形成されていることから、外部接続パ
ッドの銅めっき層と半田層とが銅と錫とを含有する傾斜
合金層を介して強固に接合され、その結果、電子部品が
作動時に発生する熱等による熱応力が繰り返し印加され
たとしても、外部接続パッドの銅めっき層と半田層とが
剥離することがなく、電子部品を長期間にわたり正常に
作動させることができる。According to the electronic device of the present invention, the external connection pad is formed by coating a copper-containing layer with a solder layer containing tin, and at the same time, forming copper and tin between the copper-plated layer and the solder layer. Since the contained gradient alloy layer is formed, the copper plating layer and the solder layer of the external connection pad are firmly joined via the gradient alloy layer containing copper and tin, and as a result, the electronic component operates. Even if thermal stress due to heat or the like that is sometimes generated is repeatedly applied, the copper plating layer and the solder layer of the external connection pad do not peel off, and the electronic component can operate normally for a long period of time.
【図１】本発明の電子装置の実施の形態の一例を示す断
面図である。FIG. 1 is a cross-sectional view illustrating an example of an embodiment of an electronic device of the present invention.
【図２】図１に示す電子装置の要部拡大断面図である。FIG. 2 is an enlarged sectional view of a main part of the electronic device shown in FIG.
１・・・・・絶縁基板 ２・・・・・電子部品 ３・・・・・電子部品接続用パッド ４・・・・・外部接続用パッド ５・・・・・銅めっき層 ６・・・・・半田層 15・・・・・銅と錫とを含有する傾斜合金層 1 ... Insulated substrate 2 .... Electronic parts 3 ... Pad for connecting electronic components 4 ... Pad for external connection 5 ... Copper plating layer 6 ... Solder layer ····· Gradient alloy layer containing copper and tin
Claims (1)
に外部接続パッドを有する絶縁基板上に電子部品を搭載
するとともに、該電子部品の電極を前記電子部品接続パ
ッドに電気的に接続して成る電子装置であって、前記外
部接続パッドは、銅めっき層に錫を含有する半田層を被
覆して成るとともに前記銅めっき層と前記半田層との間
に銅と錫とを含有する傾斜合金層が形成されていること
を特徴とする電子装置。An electronic component is mounted on an insulating substrate having an electronic component connection pad on an upper surface and an external connection pad on a lower surface, and electrodes of the electronic component are electrically connected to the electronic component connection pad. The electronic device according to claim 1, wherein the external connection pad is formed by coating a copper-containing layer with a solder layer containing tin, and the copper-tin layer and the inclined layer containing copper and tin between the copper plating layer and the solder layer. An electronic device, wherein an alloy layer is formed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002152973A JP2003347469A (en) | 2002-05-27 | 2002-05-27 | Electronic equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002152973A JP2003347469A (en) | 2002-05-27 | 2002-05-27 | Electronic equipment |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2003347469A true JP2003347469A (en) | 2003-12-05 |
Family
ID=29770169
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002152973A Pending JP2003347469A (en) | 2002-05-27 | 2002-05-27 | Electronic equipment |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2003347469A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100424842C (en) * | 2004-11-17 | 2008-10-08 | 日本特殊陶业株式会社 | Wiring board and method of producing the same |
-
2002
- 2002-05-27 JP JP2002152973A patent/JP2003347469A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100424842C (en) * | 2004-11-17 | 2008-10-08 | 日本特殊陶业株式会社 | Wiring board and method of producing the same |
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