JP2002141292A - Method of manufacturing silicon thin film - Google Patents
Method of manufacturing silicon thin filmInfo
- Publication number
- JP2002141292A JP2002141292A JP2001028430A JP2001028430A JP2002141292A JP 2002141292 A JP2002141292 A JP 2002141292A JP 2001028430 A JP2001028430 A JP 2001028430A JP 2001028430 A JP2001028430 A JP 2001028430A JP 2002141292 A JP2002141292 A JP 2002141292A
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- JP
- Japan
- Prior art keywords
- thin film
- silicon
- based thin
- substrate
- producing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、プラズマ ＣＶＤ
法によるシリコン系薄膜の製造法に関し、低周波数の鋸
波の交番周波数の電位を基板に印加しつつ、高い電界強
度でも破壊しないシリコン系絶縁薄膜を成長する方法に
関する。また、本発明は、ノンドープのシリコン系薄膜
の少数キャリア寿命制御法に関し、特に、プラズマ Ｃ
ＶＤ法によるシリコン系薄膜を成長する際に、シリコン
系薄膜を堆積するための絶縁性基板表面に交番電位を印
加することにより、少数キャリア寿命の長短が制御でき
るノンドープのシリコン系薄膜の製造法に関する。TECHNICAL FIELD The present invention relates to a plasma CVD.
The present invention relates to a method for producing a silicon-based thin film by a method, wherein a silicon-based insulating thin film that does not break down even with a high electric field strength is applied to a substrate while applying a potential of an alternating frequency of a low-frequency sawtooth wave to a substrate. The present invention also relates to a method for controlling the minority carrier lifetime of a non-doped silicon-based thin film.
The present invention relates to a method for producing a non-doped silicon-based thin film capable of controlling the length of minority carrier lifetime by applying an alternating potential to the surface of an insulating substrate for depositing the silicon-based thin film when growing the silicon-based thin film by the VD method. .
【０００２】[0002]
【従来の技術】従来の非晶質シリコン薄膜の製造法を図
２を参照して説明する。図２は代表的櫛形電極型のプラ
ズマ生成装置を利用した成膜法を示すもので、容器（図
示は省略する）中に、カソード1とアノード2からなる複
数組の電極板を平行に配置させ、この電極間に高周波電
源3から100KHz〜13.5ＭHzの高周波電力が供給されるよ
うになっている。SiH4等の反応ガスは前記カソード1と
アノード2に向かって噴出する。他方、この平行電極の
直角平面の位置に基板4が配置される。この基板4は電気
切換器8にて直流電位5を与えたり、あるいは匡体接地6
を任意に切り替えることができる。基板4はプラズマ7か
ら離れた位置に保持され、基板4に堆積した非晶質シリ
コン薄膜は電子温度の高いプラズマ特有の強いイオン衝
撃によるダメージが緩和され、さらに、その作用をさら
に高めるために、外部から直流電位5を与えることによ
り、膜中の欠陥密度が減少するばかりでなく、3Å/秒と
いう高速の成膜が可能である。このことは、特にノンド
ープの良質の非晶質シリコンの薄膜を利用する電子素子
の性能の向上と低コスト化が見込める製造法であった。2. Description of the Related Art A conventional method for manufacturing an amorphous silicon thin film will be described with reference to FIG. FIG. 2 shows a film forming method using a typical comb-shaped electrode type plasma generating apparatus. In a container (not shown), a plurality of sets of electrode plates including a cathode 1 and an anode 2 are arranged in parallel. A high frequency power of 100 KHz to 13.5 MHz is supplied from a high frequency power supply 3 between the electrodes. A reaction gas such as SiH 4 is ejected toward the cathode 1 and the anode 2. On the other hand, the substrate 4 is arranged at a position on a plane perpendicular to the parallel electrodes. This substrate 4 is supplied with a DC potential 5 by an electric switch 8 or is
Can be arbitrarily switched. The substrate 4 is held at a position away from the plasma 7, and the amorphous silicon thin film deposited on the substrate 4 is reduced in damage due to the strong ion bombardment peculiar to the plasma having a high electron temperature. By applying a DC potential 5 from the outside, not only the defect density in the film is reduced, but also a high-speed film formation of 3Å / sec is possible. This is a manufacturing method that is expected to improve the performance and reduce the cost of an electronic device using a non-doped high-quality amorphous silicon thin film.
【０００３】[0003]
【発明が解決しようとする課題】しかしながら、従来の
成膜方法では電導率が一義的に決まり、それらの特性を
自由に制御することが難しく、精緻な電子素子を設計す
る上で許容範囲が狭いという問題があった。特に、高い
電界強度でも破壊しない絶縁薄膜を設計する上で許容範
囲が狭いという重大な欠点があった。また、このような
物性の中でも、ノンドープのシリコン系薄膜の製造時に
少数キャリアの寿命の長短が制御できる方法はほとんど
皆無であった。それ故、少数キャリアの寿命の長短によ
って電子の蓄積あるいは再結合に起因する立ち上がり時
間もしくは立ち下がり時間を成膜中に制御できる電子素
子は不純物をドーピングする以外ほとんど実現する手段
がなかった。そのため、高周波で動作する目的の電子素
子を製造する上で、製造コストの制限および設計の自由
度が狭いという欠点があった。However, in the conventional film forming method, the electric conductivity is uniquely determined, it is difficult to freely control those characteristics, and the allowable range in designing a precise electronic element is narrow. There was a problem. In particular, there is a serious disadvantage that the allowable range is narrow in designing an insulating thin film that does not break down even at a high electric field strength. Also, among such physical properties, there has been almost no method capable of controlling the length of the minority carrier lifetime when producing a non-doped silicon-based thin film. Therefore, there is almost no means for realizing an electronic element capable of controlling a rise time or a fall time due to accumulation or recombination of electrons depending on the length of the minority carrier lifetime during film formation, except for doping impurities. Therefore, when manufacturing an electronic element intended to operate at a high frequency, there are disadvantages that the manufacturing cost is limited and the degree of freedom in design is narrow.
【０００４】本発明は、ノンドープながら少数キャリア
の寿命の短長が制御できるシリコン系薄膜の製造法を提
供することを目的とする。また、本発明は、高い電界強
度でも破壊しない絶縁特性の優れた電子的特性が向上す
るシリコン系薄膜の製造法の提供を目的とする。An object of the present invention is to provide a method for producing a silicon-based thin film in which the life of minority carriers can be controlled to be short or long while being non-doped. Another object of the present invention is to provide a method for producing a silicon-based thin film which has excellent insulation properties and does not break down even at a high electric field strength and has improved electronic properties.
【０００５】[0005]
【課題を解決するための手段】上記目的を達成するため
に、本発明のシリコン系薄膜の成膜方法は、プラズマCV
D法によって絶縁基板表面にシリコン系薄膜を形成する
方法において、前記基板に自己加熱および外部温度を与
え、かつ絶縁基板の表面に堆積させるシリコン系薄膜の
膜質の機能を制御するため、任意の周波数、任意の電
位、任意の波高の交番電位を印加することができる。望
ましくは波高値が±100〜500Vで、周波数が0.1〜55Ｈｚ
の鋸波を用いることができる。In order to achieve the above object, a method for forming a silicon-based thin film according to the present invention comprises a plasma CVD method.
In the method of forming a silicon-based thin film on the surface of an insulating substrate by the method D, self-heating and applying an external temperature to the substrate, and controlling the film quality of the silicon-based thin film deposited on the surface of the insulating substrate, an arbitrary frequency , An arbitrary potential, and an alternating potential having an arbitrary wave height can be applied. Preferably, the peak value is ± 100 to 500 V, and the frequency is 0.1 to 55 Hz.
Can be used.
【０００６】ここで、前記基板を、成膜中に前記基板の
プラズマによる自己加熱と外部強制加熱をかねることが
できる位置に配置することが好ましく、基板を、プラズ
マ生成のための櫛形電極の端部から10ｍｍの距離以上離
れた位置に設置することが好ましい。交番電位を前記基
板の裏面に形成した導電性薄膜を介して印加するとよ
く、導電性薄膜は、金属板、スパッタ、レーザーアブレ
ーション、電子ビーム蒸着、イオン注入、導電性ペイン
ト、メッキ、導電性高分子もしくは金属蒸着等によって
形成するとよい。Here, it is preferable that the substrate is arranged at a position capable of performing both self-heating by plasma and forced external heating of the substrate during film formation. The substrate is placed at an end of a comb-shaped electrode for generating plasma. It is preferable to install at a position at least 10 mm away from the part. Alternating potential may be applied via a conductive thin film formed on the back surface of the substrate, and the conductive thin film may be a metal plate, sputter, laser ablation, electron beam evaporation, ion implantation, conductive paint, plating, conductive polymer. Alternatively, it may be formed by metal evaporation or the like.
【０００７】また、シリコン系薄膜を成膜後、別の製造
プロセスに移行する必要性がある場合や外観上の美観の
確保の目的では前記導電性膜をエッチング等で除去して
も差し支えがない。さらに、前記基板の表面層にはシリ
コン窒化薄膜を堆積したものを用いてもよい。In addition, when it is necessary to shift to another manufacturing process after the formation of the silicon-based thin film, or for the purpose of securing an aesthetic appearance, the conductive film may be removed by etching or the like. . Further, the surface layer of the substrate may be formed by depositing a silicon nitride thin film.
【０００８】[0008]
【発明の実施の形態】発明実施の形態を図１を参照して
説明する。図１はプラズマ ＣＶＤ装置の模式図で、装
置の容器は図示を省略してある。まず、裏面に導電膜44
Aを施した基板44を用意する。ここで、基板とはシリコ
ン系薄膜を堆積する目的の下地であり、ガラス、ビニー
ル、プラスチックなどの高分子、あるいは塗料、絶縁性
半導体、焼結物等無機質の酸化物であり、電気的にも熱
的にも絶縁性を有する。また、この下地の中に導電性の
液体、固体の物質が存在しても良い。この基板44を有機
溶媒で洗浄した後、プラズマCVD装置中の図示は省略す
るがサセプタに基板表面をプラズマと対向させるように
して設置する。サセプタはステンレス鋼製のガイドで、
テフロン（登録商標）製の台を介して固定される。ま
ず、導電膜44Aを接地しながらプラズマCVD装置にモノシ
ランガスと窒素ガスを流入し、カソード11とアノード22
に高周波電源33から高周波電力を印加して、プラズマ77
を発生し、プラズマ中のシリコンラジカルと原子状窒素
とから基板表面上にシリコン窒化薄膜を堆積し、シリコ
ン窒化薄膜を基板上に形成する。次に、基板裏面の導電
性薄膜に交番電位を印加しながらモノシランSiH4ガスと
水素H2ガスを流入し、プラズマ中のシリコンラジカルと
原子状水素とからシリコンを堆積し、シリコン系薄膜を
シリコン窒化薄膜上に形成する。DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to FIG. FIG. 1 is a schematic view of a plasma CVD apparatus, in which the container of the apparatus is not shown. First, the conductive film 44 on the back
A substrate 44 to which A has been applied is prepared. Here, the substrate is a base for the purpose of depositing a silicon-based thin film, and is a polymer such as glass, vinyl, or plastic, or an inorganic oxide such as a paint, an insulating semiconductor, or a sintered product. It has thermal insulation. Further, a conductive liquid or solid substance may be present in the base. After cleaning the substrate 44 with an organic solvent, the substrate is placed on a susceptor in a plasma CVD apparatus so that the surface of the substrate faces plasma, although not shown. The susceptor is a stainless steel guide,
It is fixed via a Teflon (registered trademark) base. First, a monosilane gas and a nitrogen gas were introduced into the plasma CVD apparatus while the conductive film 44A was grounded, and the cathode 11 and the anode 22 were introduced.
To the plasma 77
Is generated, a silicon nitride thin film is deposited on the substrate surface from silicon radicals and atomic nitrogen in the plasma, and a silicon nitride thin film is formed on the substrate. Next, monosilane SiH 4 gas and hydrogen H 2 gas are introduced while applying an alternating potential to the conductive thin film on the back surface of the substrate, and silicon is deposited from silicon radicals and atomic hydrogen in the plasma. It is formed on a nitride thin film.
【０００９】この際、サセプタには、加熱あるいは冷却
の手段は設けておらず、基板はプラズマによる自己加熱
と外部加熱器99の輻射により温度上昇する。本発明にお
いては、基板を放電電極から離れた位置に設置し、その
温度は、120〜250℃の間で任意の温度に保持することが
できる。成膜すべきシリコン窒化薄膜で覆われた金属板
または導電性高分子板には交番電位を印加しているので
基板表面上の電位は基板全体に渡り一様に変化する。そ
こへプラズマからのシリコンラジカルと水素原子が飛来
するが、それらはシリコン窒化薄膜の表面では、基板の
静電ポテンシャルの極性およびその大きさにより成膜が
制限を受ける。ここで、モノシランガスと水素ガスのそ
れぞれの流量比と圧力等を限定することによって、シリ
コン窒化薄膜上に堆積速度が一定の非晶質シリコン系薄
膜が得られる。At this time, the susceptor has no means for heating or cooling, and the temperature of the substrate rises due to self-heating by plasma and radiation of the external heater 99. In the present invention, the substrate is placed at a position distant from the discharge electrode, and its temperature can be maintained at any temperature between 120 and 250 ° C. Since an alternating potential is applied to the metal plate or the conductive polymer plate covered with the silicon nitride thin film to be formed, the potential on the substrate surface changes uniformly over the entire substrate. There, silicon radicals and hydrogen atoms from the plasma fly, but on the surface of the silicon nitride thin film, film formation is limited by the polarity and magnitude of the electrostatic potential of the substrate. Here, by limiting the flow ratio, the pressure, and the like of the monosilane gas and the hydrogen gas, an amorphous silicon-based thin film having a constant deposition rate can be obtained on the silicon nitride thin film.
【００１０】基板に与える交番電位はプラズマ発生中の
自己電圧よりも大きく、かつ周波数を一定に保ちながら
成膜することは重要なことである。特に、交番電位の波
形を鋸波とすることは、窒化シリコン薄膜表面上の静電
ポテンシャルを徐々に大きくする。もしくは、その静電
ポテンシャルを徐々に小さくすることである。そのた
め、既に着床したシリコンと着床しようとするシリコン
ラジカルとの間に結合エネルギーを自由に変化させるこ
とができることになる。そのため、シリコン系薄膜の堆
積方向の制御にとって重要なことである。そのため、交
番電位の印加はシリコン系薄膜の少数キャリア寿命の長
短の制御にとって重要な手段である。ここに、シリコン
系とはシリコン原子を主体とした原料ガスとの集合体で
構成される。It is important that the alternating potential applied to the substrate is higher than the self-voltage during generation of plasma and that the film is formed while keeping the frequency constant. In particular, making the waveform of the alternating potential into a sawtooth waveform gradually increases the electrostatic potential on the surface of the silicon nitride thin film. Alternatively, the electrostatic potential is gradually reduced. Therefore, it is possible to freely change the binding energy between the silicon already implanted and the silicon radical to be implanted. Therefore, it is important for controlling the deposition direction of the silicon-based thin film. Therefore, the application of the alternating potential is an important means for controlling the length of the minority carrier lifetime of the silicon-based thin film. Here, the silicon-based material is composed of an aggregate of a raw material gas mainly composed of silicon atoms.
【００１１】基板に交番電位を印加するための基板裏面
の導電性膜は、シリコン系薄膜を堆積する表面に一様な
電位分布をもたらすために、スパッタ、レーザーアブレ
ーション、電子ビーム蒸着、イオン注入、導電性ペイン
ト、メッキ、導電性高分子もしくは金属蒸着等によって
形成するのがよい。The conductive film on the back surface of the substrate for applying an alternating potential to the substrate is provided with a sputtering, laser ablation, electron beam evaporation, ion implantation, It is preferably formed by conductive paint, plating, conductive polymer or metal deposition.
【００１２】[0012]
【実施例】以下に本発明の一実施例を説明する。まず、
50ｍｍ角で厚さ0.5ｍｍの平行平板のステンレス鋼を有
機溶媒で脱脂した後、図１に示した成膜用のCVD装置に
装着する。具体的には、装置匡体から電気的に浮かした
サセプタ上に基板表面がプラズマ生成用の放電電極を構
成する1対または2対以上の櫛形電極の側部を結ぶ平面と
平行であり、その距離は10ｍｍである。このステンレス
鋼板には任意の周波数と、任意の波高値の鋸波状の電位
を印加することができる。装置内に酸素、炭化物、水分
および空中からの塵埃、各種のイオンなどの残留ガス分
子が皆無となるように高真空に排気し、次に、装置内に
純窒素ガスを100sccmで流入し、装置内圧力が0.8Torr.
程度になった後、周波数13.56MHzの高周波電力を0.1ｗ/
ｃｍ2で放電電極に投入し窒素プラズマを発生する。そ
の際、基板の電位は匡体と同電位である。次に、純度10
0％のモノシランガスを20sccmで装置に流入し、シリコ
ン窒化薄膜を堆積する。堆積中の真空度は0.9Torr.,30m
in.を経過した後、モノシランと窒素の流入を停止し、
真空に保つ。これらの堆積過程を通して基板の温度は20
0〜250℃である。An embodiment of the present invention will be described below. First,
A 50 mm square, 0.5 mm thick parallel plate stainless steel is degreased with an organic solvent, and then mounted on the CVD apparatus for film formation shown in FIG. Specifically, on the susceptor electrically floating from the device housing, the substrate surface is parallel to a plane connecting the sides of one or more pairs of comb-shaped electrodes constituting a discharge electrode for plasma generation. The distance is 10 mm. A sawtooth potential having an arbitrary frequency and an arbitrary peak value can be applied to the stainless steel plate. The system was evacuated to a high vacuum so that there was no residual gas molecules such as oxygen, carbides, moisture, dust from the air, and various ions in the system, and then pure nitrogen gas was introduced into the system at 100 sccm. Internal pressure is 0.8 Torr.
After that, the high frequency power of 13.56MHz
Charged to a discharge electrode at cm 2 to generate nitrogen plasma. At this time, the potential of the substrate is the same as that of the housing. Next, purity 10
0% monosilane gas is flowed into the apparatus at 20 sccm to deposit a silicon nitride thin film. The vacuum degree during deposition is 0.9 Torr., 30 m
After passing in., stop the flow of monosilane and nitrogen,
Keep under vacuum. Through these deposition processes, the substrate temperature is 20
0-250 ° C.
【００１３】このシリコン窒化薄膜の堆積に続いて、シ
リコン系薄膜を以下のように堆積する。まず、純水素ガ
スを30sccmで装置に流入し、装置内圧力が0.8Torr.程度
になった後、周波数13.56MHzの高周波電力を0.1ｗ/ｃｍ
2で放電電極に投入し水素プラズマを発生する。その直
後、基板に図3もしくは図4に示す周波数、波高値200
ｖ、極性が負又は正の鋸波電位を印加しながら、純度10
0％のモノシランガスを10sccmで装置に流入し、シリコ
ン系薄膜を堆積する。堆積中の真空度は0.9Torr.であ
る。これらの混合ガス流量とガス圧力の条件下では非晶
質シリコンの堆積速度は2〜3Å/secである。堆積時間60
min.を経過した後、モノシランと水素の流入を停止し、
真空に保つ。これらの堆積過程を通して基板の温度は20
0〜250℃である。鋸波の周波数の変化の範囲は負極性側
が最高0.9Ｈzで、匡体アースを含め、正極性側が最高0.
9Hzである。Subsequent to the deposition of the silicon nitride thin film, a silicon-based thin film is deposited as follows. First, pure hydrogen gas was introduced into the apparatus at 30 sccm, and after the pressure in the apparatus became about 0.8 Torr, high frequency power of 13.56 MHz was applied at 0.1 w / cm.
In step 2, it is charged into a discharge electrode to generate hydrogen plasma. Immediately thereafter, the frequency and peak value 200 shown in FIG. 3 or FIG.
v, while applying a sawtooth potential of negative or positive polarity,
0% monosilane gas flows into the apparatus at 10 sccm to deposit a silicon-based thin film. The degree of vacuum during the deposition is 0.9 Torr. Under these mixed gas flow rate and gas pressure conditions, the deposition rate of amorphous silicon is 2-3Å / sec. Deposition time 60
After the passage of min., stop the flow of monosilane and hydrogen,
Keep under vacuum. Through these deposition processes, the substrate temperature is 20
0-250 ° C. The range of the frequency change of the sawtooth is 0.9 Hz at the maximum on the negative polarity side and 0 at the positive polarity side including the housing ground.
9 Hz.
【００１４】このようにして成膜したシリコン窒化薄膜
とシリコン系薄膜の合成薄膜の電気的物性を下記に示す
測定によって評価した。図5は、暗状態の電気的な耐電
圧を測定するための試料構造と測定回路図の合成図を示
したものである。まず、試料はステンレス板44Bの上に
シリコン窒化薄膜44Cとシリコン系薄膜10を堆積した。
そして、その上に100℃前後でニッケルが蒸着されてい
る。このニッケル電極11Bに探針12を1本立てる。他方、
別の1本の探針13をステンレス板44Bに立てる。そして、
この2本の探針の間に直流電源15から直流電位を印加す
る。この電位を徐々に上昇して行き、直流電流計14の電
流が急激に流れ始めるときの直流電圧Vを記録する。シ
リコン窒化薄膜44Cとシリコン系薄膜10との合成膜厚tを
別途測定しておく。本実施例では、シリコン窒化薄膜44
Cとシリコン系薄膜10は同じ程度（例えば、２μm）の厚
さである。そうすると、単位厚み当たりの絶縁耐電圧V/
tが計算できる。本実施例の測定ではV/t=500MV/cmであ
った。この値は、単結晶シリコンを熱酸化したシリコン
酸化膜の耐電圧10ＭＶ/cmに比べて約１桁強ほど高い優
れた値である。また、上記の電圧の極性を反転してもV/
t=500MV/cmは変化が無い。このように、本実施例による
シリコン窒化薄膜44Cとシリコン系薄膜10の合成薄膜は
優れた電気的特性を実現することができる。なお、本実
施例の原料ガスにはモノシランSiH4を用いたが、更なる
高速の成膜速度を得るにはジシランSi2H6を用いる方が
良い。The electrical properties of the silicon nitride thin film and the silicon-based thin film thus formed were evaluated by the following measurements. FIG. 5 shows a composite diagram of a sample structure for measuring electric withstand voltage in a dark state and a measurement circuit diagram. First, as a sample, a silicon nitride thin film 44C and a silicon-based thin film 10 were deposited on a stainless steel plate 44B.
Then, nickel is deposited thereon at about 100 ° C. One probe 12 stands on the nickel electrode 11B. On the other hand,
Another probe 13 is set up on the stainless steel plate 44B. And
A DC potential is applied from the DC power supply 15 between the two probes. The potential is gradually increased, and the DC voltage V at which the current of the DC ammeter 14 starts to flow rapidly is recorded. The combined thickness t of the silicon nitride thin film 44C and the silicon-based thin film 10 is separately measured. In this embodiment, the silicon nitride thin film 44
C and the silicon-based thin film 10 have the same thickness (for example, 2 μm). Then, the insulation withstand voltage per unit thickness V /
t can be calculated. In the measurement of this example, V / t = 500 MV / cm. This value is an excellent value which is about one order of magnitude higher than the withstand voltage of 10 MV / cm of a silicon oxide film obtained by thermally oxidizing single crystal silicon. Even if the polarity of the above voltage is inverted, V /
There is no change at t = 500MV / cm. Thus, the composite thin film of the silicon nitride thin film 44C and the silicon-based thin film 10 according to the present embodiment can realize excellent electrical characteristics. Although monosilane SiH 4 was used as a source gas in this embodiment, disilane Si 2 H 6 is better to be used in order to obtain a higher film forming speed.
【００１５】図6は、暗状態の電気的導電率σdの基板に
与えた鋸波周波数依存性を示す。鋸波周波数に関して特
異な傾向はない。σd自体は多数キャリアの輸送特性を
観測するものであり、通常の電気伝導度と同様である。
ただし、通常、高品質のノンドープの非晶質シリコンの
場合、σd=10-11Ω-1・cm-1と言われている。これに対
して、本実施例は10-7〜10-4Ω-1・cm-1台に及んでい
て、かつ従来言われているような微結晶シリコンのσd=
10-3Ω-1・cm-1台の値に漸近する。このように、本実施
例は高品質の非晶質シリコンと微結晶シリコンの中間的
電子電導状態が実現できる。FIG. 6 shows the dependence of the electric conductivity σ d in the dark state on the frequency of the sawtooth wave applied to the substrate. There is no peculiar tendency regarding the sawtooth frequency. σ d itself is for observing the transport characteristics of majority carriers, and is similar to ordinary electric conductivity.
However, it is generally said that σ d = 10 −11 Ω− 1 · cm −1 in the case of high-quality non-doped amorphous silicon. On the other hand, the present embodiment extends to the order of 10 -7 to 10 -4 Ω -1 cm -1 , and σ d =
It approaches the value of the order of 10 -3 Ω -1 · cm -1 . As described above, this embodiment can realize an intermediate state of electron conduction between high-quality amorphous silicon and microcrystalline silicon.
【００１６】図７は、前記シリコン系薄膜で形成した少
数キャリア寿命の基板に与える鋸波周波数の依存性を図
示したものである。鋸波周波数が負極性側0.5Hz、正極
性側0.3Hzの場合、標準偏差を考慮に入れても、少数キ
ャリア寿命が他の鋸波周波数に比べて、平均値で4〜5分
の1程度短いと言う特徴がある。このように鋸波周波数
の選択次第で、故意に不純物をドーピングしなくても、
少数キャリアの寿命を短くすることができる。FIG. 7 illustrates the dependence of the sawtooth frequency on the minority carrier lifetime substrate formed of the silicon-based thin film. When the sawtooth frequency is 0.5 Hz on the negative polarity side and 0.3 Hz on the positive polarity side, the minority carrier lifetime is about 4 to 5 times the average value compared to other sawtooth frequencies, even if the standard deviation is taken into account. There is a feature that it is short. Thus, depending on the choice of the sawtooth frequency, without intentionally doping impurities,
The life of the minority carrier can be shortened.
【００１７】[0017]
【発明の効果】以上説明したように、本発明によれば、
従来の櫛形電極構造のプラズマＣＶＤ装置を使用して、
電極から僅かに離れた距離に絶縁基板を置き、その絶縁
基板の裏面に施した導電性薄膜に、低周波数の交番電位
を印加した成膜方法を用いることにより、シリコン系の
絶縁薄膜が実現できる。そのため、約500MV/cmと優れた
耐電圧のシリコン系とシリコン窒化膜の合成絶縁薄膜が
実現できる。しかも、この合成絶縁膜は同一の反応炉を
用いて、連続的に形成できるので、性能の高い電子素子
を安価に製造できる方法である。また、高品質の非晶質
シリコンと微結晶シリコンの中間的な電導状態を実現で
きる。さらに、ノンドープのシリコン系薄膜の少数キャ
リアの寿命を選択的に制御できる製造法を提供した。こ
の技術により、少数キャリアの蓄積あるいは再結合に関
わる立ち上がり時間もしくは立ち下がり時間の短縮化が
実現できる。As described above, according to the present invention,
Using a conventional comb-shaped electrode structure plasma CVD device,
A silicon-based insulating thin film can be realized by placing the insulating substrate at a distance slightly away from the electrode and using a film forming method in which a low-frequency alternating potential is applied to the conductive thin film applied to the back surface of the insulating substrate. . Therefore, a synthetic insulating thin film of a silicon-based and silicon nitride film having an excellent withstand voltage of about 500 MV / cm can be realized. In addition, since this synthetic insulating film can be continuously formed using the same reaction furnace, it is a method for manufacturing a high-performance electronic element at low cost. In addition, a conductive state intermediate between high-quality amorphous silicon and microcrystalline silicon can be realized. Furthermore, the present invention provides a manufacturing method capable of selectively controlling the life of minority carriers in a non-doped silicon-based thin film. According to this technique, the rise time or the fall time related to the accumulation or recombination of minority carriers can be reduced.
【図１】発明実施の形態を説明するためのＣＶＤ装置の
模式図である。FIG. 1 is a schematic view of a CVD apparatus for describing an embodiment of the present invention.
【図２】従来の非晶質シリコン薄膜の製造法を示す図で
ある。FIG. 2 is a view showing a conventional method for manufacturing an amorphous silicon thin film.
【図３】基板裏面の導電性薄膜に印加する交番電位の一
例としての鋸波電位を示す図である。FIG. 3 is a diagram illustrating a sawtooth potential as an example of an alternating potential applied to a conductive thin film on the back surface of a substrate.
【図４】基板裏面の導電性薄膜に印加する交番電位の別
の例としての鋸波電位を示す図である。FIG. 4 is a diagram showing a sawtooth potential as another example of the alternating potential applied to the conductive thin film on the back surface of the substrate.
【図５】暗状態の電気的な耐電圧を測定するための試料
構造と測定回路図の合成図である。FIG. 5 is a composite diagram of a sample structure and a measurement circuit diagram for measuring electric withstand voltage in a dark state.
【図６】暗状態の電気的導電率の基板に与えた鋸波周波
数依存性を示す図である。FIG. 6 is a diagram showing the dependence of the electrical conductivity in the dark state on the frequency of the sawtooth wave applied to the substrate.
【図７】シリコン系薄膜で形成した少数キャリア寿命の
基板に与える鋸波周波数の依存性を示す図である。FIG. 7 is a diagram showing the dependence of the sawtooth wave frequency on a minority carrier lifetime substrate formed of a silicon-based thin film.
１０ シリコン系薄膜 １１ カソード １１Ｂ ニッケル電極 １２，１３ 探針 １４ 直流電流計 １５ 直流電源 ２２ アノード ３３ 高周波電源 ４４ 基板 ４４Ａ 導電膜 ４４Ｂ ステンレス板 ４４Ｃ シリコン窒化薄膜 ５５ 鋸波発生器 ６６ 筐体接地 ７７ プラズマ ８８ 電気切換器 ９９ 外部加熱器 DESCRIPTION OF SYMBOLS 10 Silicon-based thin film 11 Cathode 11B Nickel electrode 12, 13 Probe 14 DC ammeter 15 DC power supply 22 Anode 33 High frequency power supply 44 Substrate 44A Conductive film 44B Stainless steel plate 44C Silicon nitride thin film 55 Saw wave generator 66 Housing ground 77 Plasma 88 Electric switch 99 External heater
Claims (8)
コン系薄膜を成膜する方法において、前記絶縁基板に自
己加熱および外部温度を加えて、かつ前記絶縁基板に交
番電位を印加しながら絶縁膜基板表面にシリコン系薄膜
を堆積することを特徴とするシリコン系薄膜の製造法。1. A method for forming a silicon-based thin film on a surface of an insulating substrate by a plasma CVD method, the method comprising: applying self-heating and an external temperature to the insulating substrate; and applying an alternating potential to the insulating substrate. A method for producing a silicon-based thin film, comprising depositing a silicon-based thin film on a surface.
コン系薄膜を成膜する方法において、前記絶縁基板に自
己加熱および外部温度を加えて、かつ前記絶縁基板に鋸
波電位を印加しながら絶縁基板表面にシリコン系薄膜を
堆積することを特徴とするシリコン系薄膜の製造法。2. A method of forming a silicon-based thin film on a surface of an insulating substrate by a plasma CVD method, wherein the insulating substrate is subjected to self-heating and an external temperature, and a sawtooth potential is applied to the insulating substrate. A method for producing a silicon-based thin film, comprising depositing a silicon-based thin film on a surface.
性に選択できることを特徴とする請求項2に記載のシリ
コン系薄膜の製造法。3. The method for producing a silicon-based thin film according to claim 2, wherein the peak value of the sawtooth potential can be selected to be negative or positive.
性を順次零に低減することを特徴とする請求項2に記載
のシリコン系薄膜の製造法法。4. The method for producing a silicon-based thin film according to claim 2, wherein the negative or positive polarity of the peak value of the sawtooth potential is sequentially reduced to zero.
しくは棒状電極、あるいは、平行平板電極などの端部か
らプラズマによる損傷が避けられる位置に設置すること
を特徴とする請求項2〜請求項4のいずれかに記載のシリ
コン系薄膜の製造法。5. The substrate according to claim 2, wherein the substrate is disposed at a position where damage from plasma is avoided from an end of a comb-shaped or rod-shaped electrode for generating plasma, or a parallel plate electrode. 5. The method for producing a silicon-based thin film according to any one of 4.
することにより、膜圧方向の絶縁破壊電界が500MV/cm以
上を達成できる請求項2〜請求項5のいずれかに記載の絶
縁薄膜の製造方法。6. The insulating thin film according to claim 2, wherein a dielectric breakdown electric field in a film pressure direction can be at least 500 MV / cm by continuously depositing the insulation and the silicon-based thin film. Manufacturing method.
レーション、電子ビーム蒸着、イオン注入、導電性ペイ
ント、メッキ、導電性高分子もしくは金属蒸着等によっ
て形成することを特徴とする請求項2〜請求項4のいずれ
かに記載のシリコン系薄膜の製造法。7. The method according to claim 2, wherein the conductive thin film is formed by sputtering, laser ablation, electron beam evaporation, ion implantation, conductive paint, plating, conductive polymer or metal evaporation. 5. The method for producing a silicon-based thin film according to any one of 4.
に、エッチング等の手段で除去することを特徴とする請
求項5に記載のシリコン系薄膜の製造法。8. The method for producing a silicon-based thin film according to claim 5, wherein the metal thin film is removed by means such as etching after forming the silicon-based thin film.
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