JP2002111153A - Circuit board - Google Patents

Circuit board

Info

Publication number
JP2002111153A
JP2002111153A JP2000299904A JP2000299904A JP2002111153A JP 2002111153 A JP2002111153 A JP 2002111153A JP 2000299904 A JP2000299904 A JP 2000299904A JP 2000299904 A JP2000299904 A JP 2000299904A JP 2002111153 A JP2002111153 A JP 2002111153A
Authority
JP
Japan
Prior art keywords
wiring conductor
surface wiring
conductor
bonding
thickness
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000299904A
Other languages
Japanese (ja)
Inventor
Tadashi Murakami
忠 村上
Yutaka Irumagawa
裕 入間川
Masanori Anura
雅徳 案浦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2000299904A priority Critical patent/JP2002111153A/en
Publication of JP2002111153A publication Critical patent/JP2002111153A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
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    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
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    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Wire Bonding (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a circuit board that can be directly subjected to bonding junction via an Au wire to a surface wiring conductor 2 using Ag as a main constituent, and, furthermore, has stable junction strength. SOLUTION: In this circuit board, the surface wiring conductor 2 using the Ag as the main constituent is deposited and formed on the surface of a substrate 1, an electronic component 5 such as an IC chip and an SAW element is arranged in the surface wiring conductor 2, and the boding junction is carried out by a wire W made of Au from the electrode component 5 to the one portion of the surface wiring conductor 2. The thickness of the surface wiring conductor 2 should range from 5 to 15 μm, and the Vickers hardness (Hv) should be 100 or more.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【発明の属する技術分野】本発明は、ガラスセラミック
材料を用いて、低温、例えば８００〜１０５０℃で焼成
可能な回路基板に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board which can be fired at a low temperature, for example, at 800 to 1050 DEG C. using a glass ceramic material.

【０００２】[0002]

【従来の技術】従来より、焼成温度を８００〜１０５０
℃と比較的低い温度で焼成可能な材料を用いた回路基板
が提案されている。2. Description of the Related Art Conventionally, a firing temperature of 800 to 1050 has been used.
There has been proposed a circuit board using a material that can be fired at a relatively low temperature of ° C.

【０００３】回路基板は、複数の誘電体（絶縁）層から
なる多層基体の各層間に内部配線導体を有し、同時に、
多層基体の厚み方向に所定内部配線導体を接続するビア
ホール導体を有し、さらに、多層基体の表面に、ＩＣチ
ップ、ＳＡＷ素子などチップ状電子部品を搭載するため
の表面配線導体が形成されている。A circuit board has an internal wiring conductor between each layer of a multi-layer substrate composed of a plurality of dielectric (insulating) layers.
It has a via-hole conductor for connecting a predetermined internal wiring conductor in the thickness direction of the multilayer substrate, and a surface wiring conductor for mounting a chip-shaped electronic component such as an IC chip or a SAW element is formed on the surface of the multilayer substrate. .

【０００４】内部配線導体の導電率を高め、回路の高速
化のために、内部配線導体として、Ａｇ系の表面配線導
体が用されている。また、絶縁層としては、Ａｇ系表面
配線導体のＡｇの融点から、低温で焼成可能なガラスー
セラミック層が用いられる。[0004] In order to increase the conductivity of the internal wiring conductor and increase the speed of the circuit, an Ag-based surface wiring conductor is used as the internal wiring conductor. Further, as the insulating layer, a glass-ceramic layer that can be fired at a low temperature from the melting point of Ag of the Ag-based surface wiring conductor is used.

【０００５】また、表面配線導体としては、チップ状電
子部品を搭載していた（特開平７−３２６８３５号）。Also, chip-shaped electronic components have been mounted as surface wiring conductors (Japanese Patent Laid-Open No. 7-326835).

【０００６】そして、必要に応じて表面配線導体に接続
するように、厚膜抵抗体膜を焼き付けたり、また、絶縁
保護膜を被覆したりして、最後に、各種電子部品を半田
により接合する。具体的には、電子部品が搭載される表
面配線導体上にクリーム状の半田を塗布し、各種電子部
品を載置する。これにより、電子部品はクリーム状の半
田によって仮保持されることになる。[0006] Then, a thick film resistor film is baked or an insulating protective film is coated so as to be connected to the surface wiring conductor as required, and finally, various electronic components are joined by soldering. . Specifically, cream-like solder is applied on a surface wiring conductor on which electronic components are mounted, and various electronic components are mounted. As a result, the electronic component is temporarily held by the creamy solder.

【０００７】この状態で、２３０℃前後の熱処理を行う
リフロー炉に投入して、クリーム状の半田を溶融して、
徐冷・硬化して半田接合を行う。In this state, it is put into a reflow furnace for heat treatment at about 230 ° C. to melt the creamy solder,
Slowly cool and harden to perform solder joining.

【０００８】その後、ボンディング接合の工程を行う。
まず基体の上にボンディングワイヤ接合する電子部品を
搭載する。まず、ＩＣチップやＳＡＷ素子などの電子部
品側でＡｕワイヤの一端部分のファストボンドを行い、
続いてＡｕワイヤの途中端を表面配線導体４上に熱をあ
たえながら、超音波振動をあたえてセカンドボンディン
グしていた。即ち、Ａｕのボンディングワイヤの他端側
の先端を押しつぶしてボールを固相接合していた。Thereafter, a bonding step is performed.
First, an electronic component to be bonded with a bonding wire is mounted on a base. First, fast bonding of one end of Au wire is performed on the electronic component side such as IC chip and SAW element,
Subsequently, while applying heat to the middle end of the Au wire on the surface wiring conductor 4, ultrasonic bonding was applied to perform second bonding. In other words, the ball was solid-phase bonded by crushing the tip of the other end of the Au bonding wire.

【０００９】しかし、上記パッドとなる表配線導体の膜
厚は２０μm以上であり、Ａｇを用いた場合、Ａｇの硬
度はＡｕに近似して比較的柔らかいため、Ａｕのボンデ
ィングワイヤの先端を押しつぶすことが困難であるとい
う問題点があった。尚、基板上に形成したＡg系表面配
線導体のビッカース硬度は８０程度である。However, since the thickness of the surface wiring conductor serving as the pad is 20 μm or more, and when Ag is used, the hardness of Ag is relatively soft close to Au, so that the tip of the Au bonding wire is crushed. There was a problem that it was difficult. The Vickers hardness of the Ag-based surface wiring conductor formed on the substrate is about 80.

【００１０】そこで、基体にＭｏ、Ｗなどの表面配線導
体を配置し、その表面に、Ｎｉメッキ中間層、Ａｕメッ
キ表面層を形成する方法が提案されている。すなわち、
Ａｕのボンディングワイヤは、Ｎｉメッキ中間層、Ａｕ
メッキ表面層を形成することにより、Ａｕメッキ表面層
を有する表面配線導体のトータルの硬度をあげていた。
これはＮｉメッキ中間層が硬いことから、Ａｕのボンデ
ィングワイヤの先端を押しつぶすことが容易になり、強
固な結合が可能になるものである。Therefore, there has been proposed a method in which a surface wiring conductor such as Mo or W is disposed on a substrate and a Ni plating intermediate layer and an Au plating surface layer are formed on the surface. That is,
The Au bonding wire is a Ni-plated intermediate layer, Au
By forming the plated surface layer, the total hardness of the surface wiring conductor having the Au plated surface layer has been increased.
This is because the Ni plating intermediate layer is hard, so that the tip of the Au bonding wire can be easily crushed, and a strong connection can be achieved.

【００１１】ここで、表面のＡｕメッキはＡｕのボンデ
ィングワイヤとほぼ同じ硬さだが、Ａｕメッキは２〜３
μｍと薄く、またＡｕメッキの下に、Ａｕより硬いＮｉ
メッキ中間層が存在するため、キャピラリーによる接合
時に、概略Ｎｉメッキ中間層を押すことになり、Ａｕの
ボンディングワイヤの先端を押しつぶすことができる。The Au plating on the surface is almost the same hardness as the Au bonding wire, but the Au plating is 2-3
μm thin and Ni harder than Au under Au plating
Because of the presence of the plating intermediate layer, the Ni plating intermediate layer is generally pressed during bonding by the capillary, and the tip of the Au bonding wire can be crushed.

【００１２】[0012]

【発明が解決しようとする課題】しかしながら、このよ
うな構造で、ボンディング性を良好に維持するために、
Ｎｉメッキの膜厚を約１μｍ、Ａｕ膜厚を２〜３μｍ以
上にすることが必要であり、この結果、製造工程の煩雑
化を起こしてしまうことになり、実際の工程に供さない
ものであった。However, in order to maintain good bonding properties with such a structure,
It is necessary that the thickness of the Ni plating is about 1 μm and the thickness of the Au film is 2-3 μm or more. As a result, the manufacturing process becomes complicated and is not used in the actual process. there were.

【００１３】また、Ａｕメッキを用いるため、材料コス
トがかかるという問題点もあった。[0013] In addition, there is another problem in that the use of Au plating increases the material cost.

【００１４】本発明は、上述の問題に鑑みて案出された
ものであり、その目的は、Ａｇ系表面配線導体上にＮｉ
メッキ中間層、Ａｕメッキ表面層を形成することなく、
ボンディング接合が容易で、且つ低コストの回路基板を
提供するものである。The present invention has been devised in view of the above-mentioned problems, and has as its object the purpose of providing Ni on a Ag-based surface wiring conductor.
Without forming plating intermediate layer, Au plating surface layer,
An object of the present invention is to provide a low-cost circuit board that can be easily bonded.

【００１５】[0015]

【課題を解決するための手段】本発明に係る回路基板
は、Ａｇ系表面配線導体を形成した絶縁基板上に、電子
部品を配置するとともに、前記電子部品から前記Ａｇ系
表面配線導体にＡｕワイヤによりボンディング接合して
成る回路基板であって、前記Ａｇ系表面配線導体の厚み
は５〜１５μｍの範囲にあり、かつビッカース硬度（Ｈ
ｖ）を１００以上としたことを特徴とする回路基板であ
る。According to the present invention, there is provided a circuit board comprising: an electronic component disposed on an insulating substrate having an Ag-based surface wiring conductor formed thereon; and an Au wire from the electronic component to the Ag-based surface wiring conductor. Wherein the Ag-based surface wiring conductor has a thickness in the range of 5 to 15 μm and a Vickers hardness (H
A circuit board wherein v) is 100 or more.

【００１６】なお、ビッカース硬度（Ｈｖ）は、回路基
板にＡｇ系表面配線導体を形成した状態で厚押し込み硬
さ試験により求める。The Vickers hardness (Hv) is determined by a thickness indentation hardness test in a state where an Ag-based surface wiring conductor is formed on a circuit board.

【作用】本発明では、前記Ａｇ系表面配線導体の厚みが
５〜１５μｍの範囲であり、ビッカース硬度（Ｈｖ）が
１００以上になり、キャピラリーによってＡｕのボンデ
ィングワイヤの先端（セカンドボンディング側端部）を
押しつぶすようにして接合することが容易になる。According to the present invention, the thickness of the Ag-based surface wiring conductor is in the range of 5 to 15 μm, the Vickers hardness (Hv) becomes 100 or more, and the tip of the Au bonding wire (the end on the second bonding side) by a capillary. It is easy to crush and join.

【００１７】すなわち、表面のＡｇ系表面配線導体は、
Ａｕのボンディングワイヤより軟らかいものの、表面配
線導体の厚みは１５μｍ以下と薄く、また表面配線導体
の下に、Ａｕのボンディングワイヤより硬い基体（絶縁
基板）が存在するため、直接Ａｇ系表面配線導体の硬度
をあげることができ、安定したワイヤボンディングが行
え、しかも、表面配線導体の接合強度を向上させること
ができる。That is, the Ag based surface wiring conductor on the surface is
Although it is softer than the Au bonding wire, the thickness of the surface wiring conductor is as thin as 15 μm or less, and a base (insulating substrate) harder than the Au bonding wire exists under the surface wiring conductor. Hardness can be increased, stable wire bonding can be performed, and the bonding strength of the surface wiring conductor can be improved.

【００１８】なお、表面配線導体の厚みが１５μｍを越
える場合、ビッカース硬度（Ｈｖ）が１００未満にな
り、ＡｇはＡｕのボンディングワイヤより軟らかいた
め、Ａｕのボンディングワイヤの他端側の先端を押しつ
ぶすことが困難になる。一方、厚みが５μｍ未満の場
合、表面配線導体を均一に形成することが困難になり、
印刷後にかすれが発生したり、表面配線導体厚みが小さ
いために、焼き付け後に表面配線導体表面にガラス浮き
が発生するという問題点がある。When the thickness of the surface wiring conductor exceeds 15 μm, the Vickers hardness (Hv) becomes less than 100, and Ag is softer than the Au bonding wire. Therefore, the tip of the other end of the Au bonding wire is crushed. Becomes difficult. On the other hand, when the thickness is less than 5 μm, it is difficult to form the surface wiring conductor uniformly,
There is a problem in that blurring occurs after printing or that the thickness of the surface wiring conductor is small, so that a glass float occurs on the surface of the surface wiring conductor after baking.

【００１９】また、従来のように、表面配線導体とし
て、下地導体層上にＮｉなどの中間メッキ層、Ａｕ表面
メッキ層を用いる必要がない。即ち、メッキという異な
る工程を省略させることができるため、製造工程も非常
に簡素化されることになる。Further, unlike the prior art, it is not necessary to use an intermediate plating layer of Ni or the like and an Au surface plating layer on the underlying conductor layer as the surface wiring conductor. That is, since the different step of plating can be omitted, the manufacturing process is also greatly simplified.

【００２０】しかも、Ａｕ表面メッキ層を被着させる必
要がないため、材料コストを大幅に低減できる。In addition, since there is no need to apply an Au surface plating layer, material costs can be greatly reduced.

【００２１】[0021]

【発明の実施の形態】以下、本発明の回路基板を図面に
基づいて説明する。図１は、本発明に係る回路基板の断
面図である。尚、実施例の基体１は、４層の誘電体（絶
縁）層が積層した多層構造となっている。DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a circuit board according to the present invention will be described with reference to the drawings. FIG. 1 is a sectional view of a circuit board according to the present invention. The substrate 1 of the embodiment has a multilayer structure in which four dielectric (insulating) layers are stacked.

【００２２】図１において、１０は回路基板であり、１
は積層構造の絶縁基板である基体、２はＡｇ系表面配線
導体であり、３は内部配線導体、４はビアホール導体、
５はAuのボンディングワイヤWによって接続された電子
部品（ＩＣチップやＳＡＷ素子）、６は半田を介して接
続された電子部品である。In FIG. 1, reference numeral 10 denotes a circuit board,
Is a substrate that is an insulating substrate having a laminated structure, 2 is an Ag-based surface wiring conductor, 3 is an internal wiring conductor, 4 is a via hole conductor,
Reference numeral 5 denotes an electronic component (IC chip or SAW element) connected by a bonding wire W of Au, and reference numeral 6 denotes an electronic component connected via solder.

【００２３】基体１は、絶縁層１ａ〜１ｄが積層されて
成り、絶縁層１ａ〜１ｄの厚み方向には、ビアホール導
体４が形成されている。また、絶縁層１ａ〜１ｄの層間
には、内部配線層３が配置されている。同時に、基体１
の表面には、基体１と同時焼成されて形成されるＡｇ系
表面配線導体２が形成されている。The base 1 is formed by laminating insulating layers 1a to 1d, and a via-hole conductor 4 is formed in the thickness direction of the insulating layers 1a to 1d. Further, an internal wiring layer 3 is arranged between the insulating layers 1a to 1d. At the same time, the substrate 1
An Ag-based surface wiring conductor 2 formed by simultaneous firing with the substrate 1 is formed on the surface of the substrate 1.

【００２４】絶縁層１ａ〜１ｄは、ガラス成分と無機物
フィラーであるセラミック成分とから構成されている。
ガラスーセラミック材料は、例えば８５０〜１０５０℃
前後の比較的低い温度で焼成可能となるため、セラミッ
ク成分としては、クリストバライト、石英、コランダム
（αアルミナ）、ムライト、コージライトなどが例示で
きる。また、ガラス成分として複数の金属酸化物を含む
ガラスフリットを焼成処理することによって、コージェ
ライト、ムライト、アノーサイト、セルジアン、スピネ
ル、ガーナイト、ウイレマイト、ドロマイト、ペタライ
トやその置換誘導体の結晶を少なくとも１種類を析出す
るものである。この絶縁層１ａ〜１ｄの厚みは、例えば
１００〜３００μｍ程度である。The insulating layers 1a to 1d are composed of a glass component and a ceramic component as an inorganic filler.
The glass-ceramic material is, for example, 850 to 1050 ° C.
Since it can be fired at a relatively low temperature before and after, cristobalite, quartz, corundum (α-alumina), mullite, cordierite and the like can be exemplified. Further, by firing a glass frit containing a plurality of metal oxides as glass components, at least one kind of crystal of cordierite, mullite, anorthite, Celsian, spinel, garnite, willemite, dolomite, petalite or a substituted derivative thereof is obtained. Is deposited. The thickness of the insulating layers 1a to 1d is, for example, about 100 to 300 μm.

【００２５】内部配線層３、ビアホール導体４は、Ａｇ
系（Ａｇ単体、Ａｇ−ＰｄなどのＡｇ合金）など導体膜
（表面配線導体）からなり、内部配線層３の厚みは５〜
１５μｍ程度であり、ビアホール導体４の直径は任意な
値とすることができるが、例えば直径は８０〜２５０μ
ｍである。The internal wiring layer 3 and the via-hole conductor 4 are made of Ag
System (Ag alone, Ag alloy such as Ag-Pd) or other conductive film (surface wiring conductor), and the thickness of the internal wiring layer 3 is 5 to 5.
The diameter of the via-hole conductor 4 can be set to an arbitrary value, for example, 80 to 250 μm.
m.

【００２６】また、基体１の表面には、Ａｇ系表面配線
導体２が配置されている。表面配線導体２は、基体１と
同時に焼成され、形成されている。このＡｇ系表面配線
導体２は、Ａｇ系（Ａｇ単体、Ａｇ−Ｐｄ、Ａｇ−Ｐｔ
などのＡｇ合金）表面配線導体材料を含むものである。On the surface of the substrate 1, an Ag-based surface wiring conductor 2 is disposed. The surface wiring conductor 2 is formed by firing at the same time as the base 1. This Ag-based surface wiring conductor 2 is made of an Ag-based (Ag alone, Ag-Pd, Ag-Pt
(Ag alloy, etc.) surface wiring conductor material.

【００２７】Ａｇ系表面配線導体２は、主に基体の表面
の回路配線を構成するとともに、ボンディングワイヤに
よって接続される電子部品５のボンディングパッドを構
成したり、半田を介して接続される電子部品６の接続パ
ッドを構成したり、また、厚膜抵抗膜、厚膜コンデンサ
素子や外部回路と接続する端子電極となる。The Ag-based surface wiring conductor 2 mainly forms a circuit wiring on the surface of the base, forms a bonding pad of an electronic component 5 connected by a bonding wire, or connects an electronic component connected via solder. 6 and constitutes terminal electrodes for connection to thick film resistive films, thick film capacitor elements and external circuits.

【００２８】本発明の特徴的なことは、電子部品５から
AｕのボンディングワイヤＷを介して、セカンドボンデ
ィングにより接合するＡｇ系表面配線導体２の厚みが、
５〜１５μｍの範囲にあり、且つビッカース硬度（Ｈ
ｖ）が１００以上である。The feature of the present invention is that the electronic component 5
The thickness of the Ag-based surface wiring conductor 2 joined by the second bonding via the Au bonding wire W is
Vickers hardness (H
v) is 100 or more.

【００２９】このため、表面のＡｇ系表面配線導体２は
Ａｕのボンディングワイヤより軟らかいが、表面配線導
体２の厚みは１５μｍ以下と薄く、また表面配線導体２
の下に、Ａｕのボンディングワイヤより硬い基体１が存
在するため、セカンドボンディング時にキャピラリーに
よる接合時で概略基体１を押すことになり、その結果、
ボンディングワイヤＷの先端（セカンドボンディングさ
れる端部で、ボンディング中においてとワイヤＷの途
中）を押しつぶすことが容易になる。For this reason, although the Ag-based surface wiring conductor 2 on the surface is softer than the Au bonding wire, the thickness of the surface wiring conductor 2 is as thin as 15 μm or less.
Below, there is a substrate 1 that is harder than the Au bonding wire, so that the substrate 1 is roughly pushed during bonding by the capillary during the second bonding, and as a result,
It becomes easy to crush the tip of the bonding wire W (the end to be second-bonded, during bonding and in the middle of the wire W).

【００３０】なお、表面配線導体の厚みが１５μｍを越
える場合、そのビッカース硬度（Ｈｖ）が１００未満に
なり、ＡｕのボンディングワイヤＷに比較して軟らかく
なるため、ＡｕのボンディングワイヤＷの先端を押しつ
ぶすことが困難になり、密着性が低下してしまう。一
方、厚みが５μｍ未満の場合、表面配線導体を均一に形
成することが困難になり、印刷後にかすれが発生した
り、表面配線導体厚みが小さいために、焼き付け後に表
面配線導体２表面にガラス浮きが発生するという問題点
がある。この表面配線導体２表面にガラス浮きができな
くなる。When the thickness of the surface wiring conductor exceeds 15 μm, its Vickers hardness (Hv) becomes less than 100 and becomes softer than the Au bonding wire W, so that the tip of the Au bonding wire W is crushed. It becomes difficult, and the adhesiveness decreases. On the other hand, if the thickness is less than 5 μm, it becomes difficult to form the surface wiring conductor uniformly, and blurring occurs after printing, and the glass floating on the surface of the surface wiring conductor 2 after baking due to the small thickness of the surface wiring conductor. There is a problem that occurs. Glass cannot float on the surface of the surface wiring conductor 2.

【００３１】このため、基体１はＡｇより硬く、またＡ
ｇ系表面配線導体２の厚みが小さい場合、上記押し込み
硬さ試験や接合時に概略基体１を押すことから、キャピ
ラリーによってＡｕのボンディングワイヤＷの先端をＡ
ｇ系表面配線導体２に直接押しつぶすようにして接合す
ることが容易になる。For this reason, the substrate 1 is harder than Ag,
When the thickness of the g-based surface wiring conductor 2 is small, the substrate 1 is roughly pressed during the indentation hardness test and the bonding, so that the tip of the Au bonding wire W is moved to A by a capillary.
It is easy to directly crush and join the g-system surface wiring conductor 2.

【００３２】また、従来のように、下地導体層上に、Ｎ
ｉなどの中間メッキ層、Ａｕ表面メッキ層を用いていな
い。即ち、メッキという異なる工程を省略させることが
できるため、製造工程も非常に簡素化されることにな
る。Further, as in the prior art, N
No intermediate plating layer such as i, and no Au plating layer are used. That is, since the different step of plating can be omitted, the manufacturing process is also greatly simplified.

【００３３】しかも、Ａｕ表面メッキ層を被着させる必
要がないため、材料コストを大幅に低減できる。Moreover, since there is no need to apply an Au surface plating layer, material costs can be greatly reduced.

【００３４】上述の回路基板１０の製造方法について説
明する。A method for manufacturing the above-described circuit board 10 will be described.

【００３５】まず、絶縁層１ａ〜１ｄとなるガラス−セ
ラミック材料から成るグリーンシートを形成する。具体
的には、セラミック粉末、低融点ガラス成分のフリッ
ト、有機バインダ、有機溶剤を均質混練したスラリー
を、ドクターブレード法によって所定厚みにテープ成形
して、所定大きさに切断してシートを作成する。First, a green sheet made of a glass-ceramic material to be the insulating layers 1a to 1d is formed. Specifically, a ceramic powder, a frit of a low-melting glass component, an organic binder, and a slurry obtained by homogeneously kneading an organic solvent are tape-formed to a predetermined thickness by a doctor blade method, and cut into a predetermined size to form a sheet. .

【００３６】セラミック粉末は、クリストバライト、石
英、コランダム（αアルミナ）、ムライト、コージライ
トなどの絶縁セラミック材料、ＢａＴｉＯ3、Ｐｂ4Ｆｅ
2Ｎｂ2Ｏ12、ＴｉＯ2などの誘電体セラミック材料、Ｎ
ｉ−Ｚｎフェライト、Ｍｎ−Ｚｎフェライト（広義の意
味でセラミックという）などの磁性体セラミック材料な
どが挙げられ、その平均粒径１．０〜６．０μｍ、好ま
しくは１．５〜４．０μｍに粉砕しものを用いる。尚、
セラミック材料は２種以上混合して用いられてもよい。
特に、コランダムを用いた場合、コスト的に有利とな
る。The ceramic powder includes insulating ceramic materials such as cristobalite, quartz, corundum (α-alumina), mullite, cordierite, BaTiO 3 , Pb 4 Fe
Dielectric ceramic materials such as 2 Nb 2 O 12 and TiO 2 , N
Examples include magnetic ceramic materials such as i-Zn ferrite and Mn-Zn ferrite (certain in a broad sense), and the average particle size is 1.0 to 6.0 μm, preferably 1.5 to 4.0 μm. Use what is ground. still,
Two or more ceramic materials may be used in combination.
In particular, the use of corundum is advantageous in terms of cost.

【００３７】低融点ガラス成分のフリットは、焼成処理
することによってコージェライト、ムライト、アノーサ
イト、セルジアン、スピネル、ガーナイト、ウイレマイ
ト、ドロマイト、ペタライトやその置換誘導体の結晶や
スピネル構造の結晶相を析出するものであればよく、例
えば、Ｂ2Ｏ3 、ＳｉＯ2 、Ａｌ2Ｏ3 、ＺｎＯ、アルカ
リ土類酸化物を含むガラスフリットが挙げられる。この
様なガラスフリットは、ガラス化範囲が広くまた屈伏点
が６００〜８００℃付近にあるため、８５０〜１０５０
℃程度の低温焼成に適し、Ａｇ系内部配線層３、Ａｇ系
表面配線導体２の導体膜との焼結挙動が近似している。
尚、このガラスフリットの平均粒径は、１．０〜６．０
μｍ、１．５〜３．５μｍである。The frit of the low-melting glass component precipitates a crystal phase of cordierite, mullite, anorthite, serdian, spinel, garnite, willemite, dolomite, petalite or a substituted derivative thereof or a crystal phase having a spinel structure by firing. Any material may be used, for example, glass frit containing B 2 O 3 , SiO 2 , Al 2 O 3 , ZnO, and alkaline earth oxide. Such a glass frit has a wide vitrification range and a yield point of about 600 to 800 ° C.
The sintering behavior of the Ag-based internal wiring layer 3 and the Ag-based surface wiring conductor 2 with the conductor film is similar to that of low-temperature baking at about ℃.
In addition, the average particle size of this glass frit is 1.0 to 6.0.
μm, and 1.5 to 3.5 μm.

【００３８】上述のセラミック材料とガラス材料との構
成比率は、８５０〜１０５０℃の比較的低温で焼成する
ために、セラミック材料が１０〜６０ｗｔ％、好ましく
は３０〜５０ｗｔ％であり、ガラス材料が９０〜４０ｗ
ｔ％、好ましくは７０〜５０ｗｔ％である。The composition ratio between the ceramic material and the glass material is 10 to 60 wt%, preferably 30 to 50 wt%, for firing at a relatively low temperature of 850 to 1050 ° C. 90-40w
t%, preferably 70 to 50 wt%.

【００３９】有機バインダは、固形分（セラミック粉
末、低融点ガラス成分のフリット）との濡れ性も重視す
る必要があり、比較的低温で且つ短時間の焼成工程で焼
失できるように熱分解性に優れたものが好ましく、アク
リル酸もしくはメタクリル酸系重合体のようなカルボキ
シル基、アルコール性水酸基を備えたエチレン性不飽和
化合物が好ましい。It is necessary to give importance to the wettability of the organic binder with the solid content (ceramic powder, frit of the low melting point glass component). Excellent ones are preferable, and ethylenically unsaturated compounds having a carboxyl group and an alcoholic hydroxyl group such as acrylic acid or methacrylic acid-based polymers are preferable.

【００４０】溶剤として、有機系溶剤、水系溶剤を用い
ることができる。例えば、有機溶剤の場合には、２，
２，４−トリメチル−１，３−ペンタンジオールモノイ
ソベンチートなどが用いられ、水系溶剤の場合には、水
溶性である必要があり、モノマー及びバインダには、親
水性の官能基、例えばカルボキシル基が付加されてい
る。その付加量は酸価で表せば２〜３００であり、好ま
しくは５〜１００である。As the solvent, an organic solvent or an aqueous solvent can be used. For example, in the case of an organic solvent,
For example, 2,4-trimethyl-1,3-pentanediol monoisoventate or the like is used. In the case of an aqueous solvent, the solvent must be water-soluble, and the monomer and the binder include a hydrophilic functional group such as carboxyl. A group has been added. The amount of addition is 2 to 300, and preferably 5 to 100 in terms of acid value.

【００４１】付加量が少ない場合は水への溶解性、固定
成分の粉末の分散性が悪くなり、多い場合は熱分解性が
悪くなるため、付加量は、水への溶解性、分散性、熱分
解性を考慮して、上述の範囲で適宜付加される。When the added amount is small, the solubility in water and the dispersibility of the powder of the fixed component are deteriorated, and when the added amount is large, the thermal decomposability is deteriorated. In consideration of the thermal decomposability, it is appropriately added within the above range.

【００４２】次に、絶縁層１ａ〜１ｄとなるグリーンシ
ートに、各層のビアホール導体４の形成位置に対応し
て、所定径の貫通孔をパンチングによって形成する。Next, through holes having a predetermined diameter are formed by punching in the green sheets to be the insulating layers 1a to 1d, corresponding to the positions where the via hole conductors 4 are formed in each layer.

【００４３】次に、グリーンシートの貫通孔に、ビアホ
ール導体４となる導体をＡｇ系導電性ペーストの印刷に
より充填するとともに、絶縁層１ｂ〜１ｄとなるグリー
ンシート上に、各内部配線層３となる導体膜を印刷し、
乾燥処理を行う。Next, a conductor to be a via-hole conductor 4 is filled into the through hole of the green sheet by printing an Ag-based conductive paste, and each of the internal wiring layers 3 is placed on the green sheet to be the insulating layers 1b to 1d. Printed conductive film,
Perform a drying process.

【００４４】ここで、ビアホール導体４、内部配線層３
を形成するＡｇ系導電性ペーストは、Ａｇ系（Ａｇ単
体、Ａｇ−ＰｄなどのＡｇ合金）粉末、ホウ珪酸系低融
点ガラスフリット、エチルセルロースなどの有機バイン
ダー、溶剤を均質混合したものが用いられる。Here, the via-hole conductor 4 and the internal wiring layer 3
As the Ag-based conductive paste for forming, a mixture of Ag-based (Ag alone, Ag alloy such as Ag-Pd) powder, borosilicate-based low melting point glass frit, organic binder such as ethyl cellulose, and a solvent is used.

【００４５】また、絶縁層１ａとなるグリーンシート上
に、表面配線導体２となる導体膜を、Ａｇ系導電性ペー
ストを用いて印刷し、乾燥処理を行う。この時の厚み
は、６〜１７μｍ程度である。Further, a conductive film to be the surface wiring conductor 2 is printed on a green sheet to be the insulating layer 1a using an Ag-based conductive paste and dried. The thickness at this time is about 6 to 17 μm.

【００４６】このＡｇ系導電性ペーストは、例えば、Ａ
ｇ粉末、Ｐｔ粉末、低融点ガラスフリット、有機バイン
ダー、溶剤を均質混合したものが用いられる。尚、その
他に、Ｖ2Ｏ5粉末を各金属成分に対して０．２〜１．０
ｗｔ％添加すると、基体１との接合強度が向上して望ま
しい。尚、Ｖ2Ｏ5粉末を各金属成分に対して０．２ｗｔ
％未満では、充分なアンカー効果が得られず、また、
１．０ｗｔ％を越えると表面配線導体２の表面に析出さ
れてしまう。The Ag-based conductive paste is, for example, A
g powder, Pt powder, a low melting glass frit, an organic binder, and a solvent are uniformly mixed. In addition, V 2 O 5 powder was added to each metal component in an amount of 0.2 to 1.0.
Addition of wt% is desirable because the bonding strength with the base 1 is improved. In addition, V 2 O 5 powder was added at 0.2 wt.
%, A sufficient anchor effect cannot be obtained, and
If it exceeds 1.0 wt%, it will be deposited on the surface of the surface wiring conductor 2.

【００４７】なお、Ａｇ系導電性ペーストの固形分が少
ないと、焼成時の収縮率が大きいため、焼成後の膜厚を
小さくすることができるが、焼成時の基体の反りが大き
くなる。一方、固形分が少ないと、焼成後の膜厚を１５
μｍ以下にすることが困難になる。このため、固形分の
比率が８０〜９０ｗｔ％の範囲にあることが望ましい。When the solid content of the Ag-based conductive paste is small, the shrinkage ratio during firing is large, so that the film thickness after firing can be reduced, but the warpage of the substrate during firing increases. On the other hand, if the solid content is low, the film thickness after firing is 15
It is difficult to reduce the thickness to less than μm. Therefore, it is desirable that the ratio of the solid content be in the range of 80 to 90 wt%.

【００４８】このようにビアホール導体４となる導体、
内部配線層３となる導体膜が形成された絶縁層１ｂ〜１
ｄとなるグリーンシート、表面配線導体２となる導体膜
が形成された絶縁層１ａとなるグリーンシートを、基体
１の絶縁層１ａ〜１ｄの積層順に応じて積層一体化す
る。The conductor which becomes the via-hole conductor 4 as described above,
Insulating layers 1b-1 on which a conductor film to be internal wiring layer 3 is formed
The green sheet to be d and the green sheet to be the insulating layer 1a on which the conductor film to be the surface wiring conductor 2 is formed are laminated and integrated according to the lamination order of the insulating layers 1a to 1d of the base 1.

【００４９】次に、未焼成の積層体を、酸化性雰囲気ま
たは大気雰囲気で焼成処理する。焼成処理は、脱バイン
ダ過程と焼結過程からなる。Next, the unfired laminate is fired in an oxidizing atmosphere or an air atmosphere. The firing process includes a binder removal process and a sintering process.

【００５０】脱バインダ過程は、絶縁層１ａ〜１ｄとな
るグリーンシート、内部配線層３となる導体膜、ビアホ
ール導体４となる導体、表面配線導体２となる導体膜に
含まれる有機成分を焼失するためのものであり、例えば
６００℃以下の温度領域で行われる。The binder removal process burns off organic components contained in the green sheets serving as the insulating layers 1a to 1d, the conductor film serving as the internal wiring layer 3, the conductor serving as the via hole conductor 4, and the conductor film serving as the surface wiring conductor 2. This is performed, for example, in a temperature range of 600 ° C. or less.

【００５１】また、焼結過程は、グリーンシートのガラ
ス成分を結晶化させると同時にセラミック粉末の粒界に
均一に分散させ、基体に一定強度が発生し、内部配線層
３となる導体膜、ビアホール導体４となる導体、表面配
線導体２となる導体膜の導電材料の金属粉末、Ａｇ粉末
等が粒成長させて、低抵抗化させ、絶縁層１ａ〜１ｄと
一体化させるものである。これは、ピーク温度８５０〜
１０５０℃に達するまでに行われる。In the sintering process, the glass component of the green sheet is crystallized and simultaneously dispersed uniformly in the grain boundaries of the ceramic powder, so that the substrate has a certain strength, and the conductor film and the via hole serving as the internal wiring layer 3 are formed. A metal powder, an Ag powder, or the like, which is a conductive material of the conductor that becomes the conductor 4 and the conductor film that becomes the surface wiring conductor 2, is grown to reduce the resistance, and is integrated with the insulating layers 1a to 1d. This is the peak temperature of 850
It is performed until the temperature reaches 1050 ° C.

【００５２】この工程で、基体内部の内部配線層３、ビ
アホール導体４が形成され、且つ基体表面に表面配線導
体２が形成された基体１が達成されることになる。In this step, the substrate 1 in which the internal wiring layer 3 and the via-hole conductor 4 inside the substrate are formed and the surface wiring conductor 2 is formed on the substrate surface is achieved.

【００５３】次に、必要に応じて、所定形状の絶縁保護
膜を形成して、各種電子部品５、６を実装・接続を行
う。例えば、電子部品６は、チップ抵抗器、積層セラミ
ックコンデンサなどであり、所定表面配線導体２に半田
を介して接続が行われる。また、電子部品５は、ＩＣチ
ップ、ＳＡＷ素子などであり、所定表面配線導体２に機
械的に接続された後、所定表面配線導体２にボンディン
グワイヤＷを介してボンディング接続される。ここで、
ボンディングワイヤＷとは、Ａｕの細線である。Next, if necessary, an insulating protective film of a predetermined shape is formed, and various electronic components 5 and 6 are mounted and connected. For example, the electronic component 6 is a chip resistor, a multilayer ceramic capacitor, or the like, and is connected to the predetermined surface wiring conductor 2 via solder. The electronic component 5 is an IC chip, a SAW element, or the like. After being mechanically connected to the predetermined surface wiring conductor 2, the electronic component 5 is bonded to the predetermined surface wiring conductor 2 via a bonding wire W. here,
The bonding wire W is a thin Au wire.

【００５４】これにより、図１に示す回路基板が得られ
ることになる。As a result, the circuit board shown in FIG. 1 is obtained.

【００５５】[0055]

【実施例】本発明者は、表面配線導体２の印刷膜厚を調
節することにより、焼成後膜厚を変化させて試料１〜７
を作成した。そして、表面配線導体２の印刷後及び焼き
付け後に金属顕微鏡で観察し、それぞれ印刷後のかすれ
及び焼き付け後のガラス浮きを調べ、発生しなかった場
合を丸印、すなわち良品、発生した場合をバツ印、すな
わち不良品とした。さらに、かすれ及びガラス浮きが発
生しなかった条件については、基体１に表面配線導体２
を形成した後のビッカース硬度（Ｈｖ）及び熱エージン
グ試験後の基体１と表面配線導体２との接合強度につい
て調べた。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The inventor of the present invention adjusted the printed film thickness of the surface wiring conductor 2 to change the film thickness after sintering to obtain samples 1 to 7.
It was created. Then, after printing and baking of the surface wiring conductor 2, the metallographic microscope is used to observe the fading after printing and the glass float after baking, respectively. That is, it was determined to be defective. Furthermore, the conditions under which the blur and the glass float did not occur are described below.
Was formed and the bonding strength between the substrate 1 and the surface wiring conductor 2 after the thermal aging test was examined.

【００５６】[0056]

【表１】 [Table 1]

【００５７】試料１〜６は、それぞれ焼成後膜厚が３〜
１６μmとした。また、表面配線導体２の材料はＡｇ−
Ｐｔ（Ａｇ９９ｗｔ％、Ｐｔ１％）と、この金属成分に
対して、Ｖ2Ｏ5成分が０．２ｗｔ％含有した表面配線導
体２とした。試料７は、基体１の表面配線導体２上に、
Ｎｉ中間メッキ層（１μｍ）、Ａｕ表面メッキ層（３μ
ｍ）を形成した。Samples 1 to 6 each had a thickness of 3 to 3 after firing.
It was 16 μm. The material of the surface wiring conductor 2 is Ag-
Pt (Ag 99 wt%, Pt 1%) and the surface wiring conductor 2 containing 0.2 wt% of a V 2 O 5 component with respect to this metal component. The sample 7 is placed on the surface wiring conductor 2 of the base 1.
Ni intermediate plating layer (1 μm), Au surface plating layer (3 μm)
m) was formed.

【００５８】ビッカース硬度（Ｈｖ）は、対角線が１３
６°の正四角錐のダイアモンド圧子に静荷重をかけて測
定面に押し付け、このときのくぼみの表面積を荷重で除
した値を用いた。The Vickers hardness (Hv) is 13 on the diagonal line.
A static load was applied to a diamond indenter having a regular pyramid of 6 ° and pressed against the measurement surface, and a value obtained by dividing the surface area of the depression at this time by the load was used.

【００５９】基体と表面配線導体２との接合強度は、表
面配線導体２に接続された各ボンディングワイヤＷを垂
直方向に引っ張り、各ボンディングワイヤＷが表面配線
導体２の一部とともに表面配線導体２から剥がれ、外れ
た際の引っ張り強度を調べた。また、熱エージング試験
の条件は、２４０℃×１ｍｉｎとした。The bonding strength between the substrate and the surface wiring conductor 2 is such that each bonding wire W connected to the surface wiring conductor 2 is pulled in the vertical direction, and each bonding wire W together with a part of the surface wiring conductor 2 , And the tensile strength when detached. The condition of the heat aging test was 240 ° C. × 1 min.

【００６０】その結果、焼成後膜厚が５〜１５μｍの場
合（試料番号２〜５）、ビッカース硬度が１００以上に
なり、また基体と表面配線導体２との接合強度も８．４
ｋｇｆ以上となった。As a result, when the film thickness after firing is 5 to 15 μm (sample numbers 2 to 5), the Vickers hardness becomes 100 or more, and the bonding strength between the base and the surface wiring conductor 2 is also 8.4.
kgf or more.

【００６１】これに対し、焼成後膜厚が３μｍの場合
（試料番号１）、印刷時のかすれ、焼成時のガラス浮き
が発生した。一方、焼成後膜厚が１６μｍの場合（試料
番号６）、ビッカース硬度（Ｈｖ）が８０となり、また
基体１と表面配線導体２との接合強度は６．８ｋｇｆと
なった。On the other hand, when the film thickness after firing was 3 μm (Sample No. 1), blurring during printing and floating of glass during firing occurred. On the other hand, when the film thickness after firing was 16 μm (Sample No. 6), the Vickers hardness (Hv) was 80, and the bonding strength between the base 1 and the surface wiring conductor 2 was 6.8 kgf.

【００６２】なお、Ｎｉメッキ中間層、Ａｕメッキ表面
層を形成した比較例（試料番号７）では、ビッカース硬
度（Ｈｖ）が１８０となり、基体と表面配線導体２との
接合強度は１０ｋｇｆとなった。すなわち、本発明の実
施例（試料番号２〜５）は、Ｎｉメッキ中間層、Ａｕメ
ッキ表面層を形成した比較例（試料番号７）と同等のビ
ッカース硬度（Ｈｖ）及び接合強度が得られることがわ
かった。In the comparative example (Sample No. 7) in which the Ni-plated intermediate layer and the Au-plated surface layer were formed, the Vickers hardness (Hv) was 180, and the bonding strength between the base and the surface wiring conductor 2 was 10 kgf. . That is, the examples (Sample Nos. 2 to 5) of the present invention can obtain the same Vickers hardness (Hv) and bonding strength as the comparative example (Sample No. 7) in which the Ni plating intermediate layer and the Au plating surface layer are formed. I understood.

【００６３】[0063]

【発明の効果】以上のように本発明によれば、Ａｇ系表
面配線導体の厚みが５〜１５μｍの範囲にあり、かつビ
ッカース硬度（Ｈｖ）が１００以上であるため、Ａｇ系
表面配線導体の一部にＡｕのボンディングワイヤＷを用
いて固相接合しても、キャピラリーによってＡｕのボン
ディングワイヤＷの先端をＡｇに直接押しつぶすように
して接合することが容易である。As described above, according to the present invention, the thickness of the Ag-based surface wiring conductor is in the range of 5 to 15 μm and the Vickers hardness (Hv) is 100 or more. Even if solid-state bonding is performed using an Au bonding wire W in part, it is easy to bond by directly crushing the tip of the Au bonding wire W to Ag by means of a capillary.

【００６４】また、従来のように、下地導体層上に、Ｎ
ｉなどの中間メッキ層、Ａｕ表面メッキ層を用いていな
い。即ち、メッキという異なる工程を省略することがで
きるため、製造工程も非常に簡素化されることになる。Further, as in the conventional case, N
No intermediate plating layer such as i, and no Au plating layer are used. That is, since a different step of plating can be omitted, the manufacturing process is also greatly simplified.

【００６５】しかも、Ａｕ表面メッキ層を被着させる必
要がないため、材料コストを低減できる。Further, since there is no need to apply an Au surface plating layer, material costs can be reduced.

【図面の簡単な説明】[Brief description of the drawings]

【図１】本発明に係る回路基板の断面図である。FIG. 1 is a cross-sectional view of a circuit board according to the present invention.

【符号の説明】[Explanation of symbols]

１０ 回路基板 １ 基体 １ａ〜１ｄ 絶縁層 ２ 表面配線導体 ３ 内部配線導体 ４ ビアホール導体 ５ ボンディングワイヤによって接続され
る電子部品 ６ 半田によって接続される電子部品DESCRIPTION OF SYMBOLS 10 Circuit board 1 Base | substrate 1a-1d Insulation layer 2 Surface wiring conductor 3 Internal wiring conductor 4 Via hole conductor 5 Electronic component connected by bonding wire 6 Electronic component connected by solder

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 ＦＩ テーマコート゛(参考） Ｈ０５Ｋ 3/46 Ｈ０１Ｌ 23/12 Ｗ Ｆターム(参考） 4E351 AA07 BB01 BB24 BB31 CC11 CC22 DD05 DD22 DD60 GG08 5E346 AA02 AA12 AA15 BB01 BB16 CC18 CC39 EE21 GG03 HH11 5F044 AA02 FF05 ──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. 7 Identification symbol FI Theme coat ゛ (Reference) H05K 3/46 H01L 23/12 W F-term (Reference) 4E351 AA07 BB01 BB24 BB31 CC11 CC22 DD05 DD22 DD60 GG08 5E346 AA02 AA12 AA15 BB01 BB16 CC18 CC39 EE21 GG03 HH11 5F044 AA02 FF05

Claims (1)

【特許請求の範囲】[Claims] 【請求項１】 Ａｇ系表面配線導体を形成した絶縁基板
上に、電子部品を配置するとともに、前記電子部品から
前記Ａｇ系表面配線導体にＡｕワイヤによりボンディン
グ接合して成る回路基板であって、 前記Ａｇ系表面配線導体の厚みは５〜１５μｍの範囲に
あり、かつビッカース硬度（Ｈｖ）を１００以上とした
ことを特徴とする回路基板。1. A circuit board comprising: an electronic component disposed on an insulating substrate on which an Ag-based surface wiring conductor is formed; and bonding bonding of the electronic component to the Ag-based surface wiring conductor with an Au wire. A circuit board, wherein the thickness of the Ag-based surface wiring conductor is in the range of 5 to 15 μm, and the Vickers hardness (Hv) is 100 or more.
JP2000299904A 2000-09-29 2000-09-29 Circuit board Pending JP2002111153A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000299904A JP2002111153A (en) 2000-09-29 2000-09-29 Circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000299904A JP2002111153A (en) 2000-09-29 2000-09-29 Circuit board

Publications (1)

Publication Number Publication Date
JP2002111153A true JP2002111153A (en) 2002-04-12

Family

ID=18781652

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000299904A Pending JP2002111153A (en) 2000-09-29 2000-09-29 Circuit board

Country Status (1)

Country Link
JP (1) JP2002111153A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101527669B1 (en) * 2011-03-10 2015-06-09 도와 일렉트로닉스 가부시키가이샤 Semiconductor light-emitting element and method of manufacturing thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101527669B1 (en) * 2011-03-10 2015-06-09 도와 일렉트로닉스 가부시키가이샤 Semiconductor light-emitting element and method of manufacturing thereof

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