JP2001356709A5 - - Google Patents
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- JP2001356709A5 JP2001356709A5 JP2000179899A JP2000179899A JP2001356709A5 JP 2001356709 A5 JP2001356709 A5 JP 2001356709A5 JP 2000179899 A JP2000179899 A JP 2000179899A JP 2000179899 A JP2000179899 A JP 2000179899A JP 2001356709 A5 JP2001356709 A5 JP 2001356709A5
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- Prior art keywords
- electrode
- layer
- pixel
- thin film
- electro
- Prior art date
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- 239000003990 capacitor Substances 0.000 claims 20
- 239000010409 thin film Substances 0.000 claims 15
- 239000010408 film Substances 0.000 claims 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 9
- 229910052710 silicon Inorganic materials 0.000 claims 9
- 239000010703 silicon Substances 0.000 claims 9
- 239000000758 substrate Substances 0.000 claims 6
- 239000004065 semiconductor Substances 0.000 claims 5
- 239000012535 impurity Substances 0.000 claims 3
- 230000000875 corresponding Effects 0.000 claims 2
- 238000004519 manufacturing process Methods 0.000 claims 2
- 230000005611 electricity Effects 0.000 claims 1
- 238000005468 ion implantation Methods 0.000 claims 1
- 239000011159 matrix material Substances 0.000 claims 1
- 230000003287 optical Effects 0.000 claims 1
Claims (16)
前記薄膜トランジスタを構成する半導体層の少なくともチャネル領域を平面的に見て覆う位置に積層されたカバー層とを備えており、
前記画素電位側容量電極及び前記固定電位側容量電極のうち一方の電極と前記カバー層とは同一シリコン層から形成されていることを特徴とする電気光学装置。A scanning line and a data line intersecting with each other on a substrate, a thin film transistor connected to the scanning line and the data line, a pixel electrode connected to the thin film transistor, and a pixel connected to the pixel electrode and having a pixel electrode potential A storage capacitor including a potential-side capacitance electrode and a fixed-potential-side capacitance electrode that is disposed opposite to the pixel-potential-side capacitance electrode via a dielectric film and is set to a fixed potential;
A cover layer laminated at a position covering at least the channel region of the semiconductor layer constituting the thin film transistor in plan view,
One of the pixel potential side capacitor electrode and the fixed potential side capacitor electrode and the cover layer are formed of the same silicon layer.
前記カバー層をなすシリコン層部分は、前記不純物がドープされないことにより前記一方の電極よりも導電性が小さいことを特徴とする請求項1又は2に記載の電気光学装置。The silicon layer portion forming the one electrode is conductive by being doped with impurities,
3. The electro-optical device according to claim 1, wherein the silicon layer portion forming the cover layer has a smaller conductivity than the one electrode because the impurity is not doped. 4.
前記カバー層は、前記一方の電極からパターン的に分離されていないことを特徴とする請求項5に記載の電気光学装置。The one electrode is the fixed potential side capacitive electrode,
6. The electro-optical device according to claim 5, wherein the cover layer is not pattern-separated from the one electrode.
前記固定電位側容量電極は、前記上層遮光膜に接続され、前記上層遮光膜を介して固定電位に落とされていることを特徴とする請求項1から7のいずれか一項に記載の電気光学装置。A conductive upper-layer light-shielding film, which is laminated on the substrate above the thin film transistor and at least partially defines a non-opening region of the pixel;
The electro-optic according to any one of claims 1 to 7, wherein the fixed potential side capacitance electrode is connected to the upper light shielding film and dropped to a fixed potential through the upper light shielding film. apparatus.
前記固定電位側容量電極は、前記下層遮光膜に接続され、前記下層遮光膜を介して固定電位に落とされていることを特徴とする請求項1から7のいずれか一項に記載の電気光学装置。A conductive lower-layer light-shielding film that is laminated on the substrate below the thin film transistor and covers the channel region from the lower side;
The electro-optic according to claim 1, wherein the fixed potential side capacitance electrode is connected to the lower light shielding film and is dropped to a fixed potential through the lower light shielding film. apparatus.
該走査線及びデータ線に接続される薄膜トランジスタを形成する工程と、
該薄膜トランジスタに接続される画素電極を形成する工程と、
前記画素電極に接続され画素電極電位とされる画素電位側容量電極と該画素電位側容量電極に誘電体膜を介して対向配置され固定電位とされる固定電位側容量電極とを含む蓄積容量を形成する工程と、
前記薄膜トランジスタを構成する半導体層の少なくともチャネル領域を平面的に見て覆う位置に積層されるカバー層を形成する工程と
を備えており、
前記蓄積容量を形成する工程及び前記カバー層を形成する工程では、同一シリコン層から前記画素電位側容量電極及び前記固定電位側容量電極のうち一方の電極と前記カバー層とを形成することを特徴とする電気光学装置の製造方法。Forming intersecting scanning lines and data lines on the substrate;
Forming a thin film transistor connected to the scan line and the data line;
Forming a pixel electrode connected to the thin film transistor;
A storage capacitor including a pixel potential side capacitor electrode connected to the pixel electrode and configured as a pixel electrode potential; and a fixed potential side capacitor electrode disposed opposite to the pixel potential side capacitor electrode via a dielectric film and configured as a fixed potential. Forming, and
Forming a cover layer laminated at a position covering at least the channel region of the semiconductor layer constituting the thin film transistor in plan view,
In the step of forming the storage capacitor and the step of forming the cover layer, one of the pixel potential side capacitor electrode and the fixed potential side capacitor electrode and the cover layer are formed from the same silicon layer. A method for manufacturing an electro-optical device.
該走査線及びデータ線に接続された薄膜トランジスタと、
該薄膜トランジスタに接続された画素電極と、
該画素電極に接続され画素電極電位とされる画素電位側容量電極と該画素電位側容量電極に誘電体膜を介して対向配置され固定電位とされる固定電位側容量電極とを含む蓄積容量と、
前記薄膜トランジスタを構成する半導体層の少なくともチャネル領域を平面的に見て覆う位置に積層されたシリコンでなる遮光層と
を備えており、
前記蓄積容量の一方の電極は前記遮光層と同層で形成されていることを特徴とする電気光学装置。A scan line and a data line intersecting each other on the substrate,
A thin film transistor connected to the scan line and the data line;
A pixel electrode connected to the thin film transistor;
A storage capacitor including a pixel potential side capacitor electrode connected to the pixel electrode and serving as a pixel electrode potential; and a fixed potential side capacitor electrode disposed opposite to the pixel potential side capacitor electrode via a dielectric film and configured as a fixed potential; ,
A light shielding layer made of silicon laminated at a position covering at least the channel region of the semiconductor layer constituting the thin film transistor in plan view,
The electro-optical device, wherein one electrode of the storage capacitor is formed in the same layer as the light shielding layer.
前記走査線は、前記薄膜トランジスタのチャネル領域に対向する部分にゲート電極としての幅広部を有するとともに他の部分に幅狭部を有し、
前記幅広部の幅は、データ線の延びる方向に延びている前記チャネル領域のチャネル長を規定するように設けられていることを特徴とする電気光学装置。A scanning line extending in a certain direction on the substrate, a data line extending in a direction intersecting the scanning line, a thin film transistor provided corresponding to an intersection region of the scanning line and the data line, and a thin film transistor corresponding to the thin film transistor And a pixel electrode provided in a matrix arrangement,
The scanning line has a wide portion as a gate electrode in a portion facing the channel region of the thin film transistor and a narrow portion in another portion,
2. The electro-optical device according to claim 1, wherein a width of the wide portion is provided so as to define a channel length of the channel region extending in a direction in which the data line extends.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000179899A JP3731447B2 (en) | 2000-06-15 | 2000-06-15 | Electro-optical device and manufacturing method thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000179899A JP3731447B2 (en) | 2000-06-15 | 2000-06-15 | Electro-optical device and manufacturing method thereof |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2005216889A Division JP3969439B2 (en) | 2005-07-27 | 2005-07-27 | Electro-optic device |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2001356709A JP2001356709A (en) | 2001-12-26 |
JP2001356709A5 true JP2001356709A5 (en) | 2005-10-06 |
JP3731447B2 JP3731447B2 (en) | 2006-01-05 |
Family
ID=18681086
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2000179899A Expired - Fee Related JP3731447B2 (en) | 2000-06-15 | 2000-06-15 | Electro-optical device and manufacturing method thereof |
Country Status (1)
Country | Link |
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JP (1) | JP3731447B2 (en) |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002122881A (en) * | 2000-10-13 | 2002-04-26 | Nec Corp | Liquid crystal display device and its manufacturing method |
JP3870897B2 (en) | 2002-01-07 | 2007-01-24 | セイコーエプソン株式会社 | Electro-optical device and electronic apparatus |
JP3700697B2 (en) * | 2002-02-12 | 2005-09-28 | セイコーエプソン株式会社 | Electro-optical device and electronic apparatus |
KR20030096562A (en) * | 2002-06-14 | 2003-12-31 | 일진다이아몬드(주) | Tft-lcd and tft-lcd making method |
JP4214741B2 (en) * | 2002-08-27 | 2009-01-28 | セイコーエプソン株式会社 | Electro-optical device and electronic apparatus |
JP3850364B2 (en) | 2002-10-25 | 2006-11-29 | 株式会社ミツトヨ | Measuring point drive mechanism of displacement measuring instrument |
JP4021392B2 (en) * | 2002-10-31 | 2007-12-12 | セイコーエプソン株式会社 | Electro-optical device and electronic apparatus |
JP3791517B2 (en) | 2002-10-31 | 2006-06-28 | セイコーエプソン株式会社 | Electro-optical device and electronic apparatus |
JP3925549B2 (en) * | 2002-11-26 | 2007-06-06 | セイコーエプソン株式会社 | Electro-optical device and electronic apparatus |
JP3767590B2 (en) | 2002-11-26 | 2006-04-19 | セイコーエプソン株式会社 | ELECTRO-OPTICAL DEVICE, MANUFACTURING METHOD THEREOF, AND ELECTRONIC DEVICE |
US7206048B2 (en) | 2003-08-13 | 2007-04-17 | Samsung Electronics Co., Ltd. | Liquid crystal display and panel therefor |
JP4529450B2 (en) * | 2004-01-19 | 2010-08-25 | セイコーエプソン株式会社 | Electro-optical device and electronic apparatus |
JP4197016B2 (en) | 2006-07-24 | 2008-12-17 | セイコーエプソン株式会社 | Electro-optical device substrate, electro-optical device, and electronic apparatus |
JP4349406B2 (en) | 2006-08-24 | 2009-10-21 | セイコーエプソン株式会社 | Electro-optical device substrate, electro-optical device, and electronic apparatus |
JP5034529B2 (en) | 2007-02-01 | 2012-09-26 | セイコーエプソン株式会社 | Electro-optical device substrate, electro-optical device, and electronic apparatus |
US7616275B2 (en) | 2007-02-07 | 2009-11-10 | Seiko Epson Corporation | Electro-optical device substrate, electro-optical device, and electronic apparatus |
JP4935404B2 (en) | 2007-02-16 | 2012-05-23 | セイコーエプソン株式会社 | Electro-optical device substrate and manufacturing method thereof, and electro-optical device and electronic apparatus |
JP5018336B2 (en) * | 2007-08-22 | 2012-09-05 | セイコーエプソン株式会社 | Electro-optical device and electronic apparatus |
JP5157319B2 (en) * | 2007-08-28 | 2013-03-06 | セイコーエプソン株式会社 | Electro-optical device and electronic apparatus |
JP5003366B2 (en) | 2007-09-10 | 2012-08-15 | セイコーエプソン株式会社 | ELECTRO-OPTICAL DEVICE, MANUFACTURING METHOD THEREOF, AND ELECTRONIC DEVICE |
JP2009122250A (en) | 2007-11-13 | 2009-06-04 | Seiko Epson Corp | Electro-optical device and electronic apparatus |
JP4730407B2 (en) * | 2008-07-17 | 2011-07-20 | セイコーエプソン株式会社 | Electro-optical device and electronic apparatus |
JP5157783B2 (en) | 2008-09-25 | 2013-03-06 | セイコーエプソン株式会社 | Electro-optical device and electronic apparatus |
JP4530105B2 (en) * | 2009-10-13 | 2010-08-25 | セイコーエプソン株式会社 | Electro-optical device and electronic apparatus |
JP5782676B2 (en) | 2010-03-10 | 2015-09-24 | セイコーエプソン株式会社 | Electro-optical device, electronic apparatus, and method of manufacturing electro-optical device |
-
2000
- 2000-06-15 JP JP2000179899A patent/JP3731447B2/en not_active Expired - Fee Related
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