JP2001196409A - 半導体デバイス - Google Patents

半導体デバイス

Info

Publication number
JP2001196409A
JP2001196409A JP2000387813A JP2000387813A JP2001196409A JP 2001196409 A JP2001196409 A JP 2001196409A JP 2000387813 A JP2000387813 A JP 2000387813A JP 2000387813 A JP2000387813 A JP 2000387813A JP 2001196409 A JP2001196409 A JP 2001196409A
Authority
JP
Japan
Prior art keywords
lead
metal portion
tin
semiconductor device
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2000387813A
Other languages
English (en)
Other versions
JP2001196409A5 (ja
JP4698826B2 (ja
Inventor
E Greer Stewart
スチュアート・イー・グリーア
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of JP2001196409A publication Critical patent/JP2001196409A/ja
Publication of JP2001196409A5 publication Critical patent/JP2001196409A5/ja
Application granted granted Critical
Publication of JP4698826B2 publication Critical patent/JP4698826B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

(57)【要約】 【課題】 半導体デバイスが提供される。 【解決手段】 導電性バンプ３２は、半導体ダイ１１の
上に載置するように形成される。導電性バンプ３２は一
般に、低減された濃度の鉛を有し、２６０℃を超えない
温度でフローし、アルファ粒子に関わる問題を低減し
た。１つの実施例では、導電性バンプ３２は、主に錫２
０を含み、比較的薄い鉛の層３０を有する。鉛３０と、
錫の一部分２０とが相互に作用して、鉛と錫の共晶点に
近い、比較的低い融点の半田を形成する。錫２０のほと
んどは、未反応のまま残され、半導体ダイ１１とパッケ
ージング基板４２との間に、スタンドオフを形成でき
る。他の金属および不純物も、導電性バンプ３２の機械
特性または電気特性を向上するのに使用できる。

Description

【発明の詳細な説明】
【０００１】
【産業上の利用分野】本発明は、一般に半導体デバイス
関し、さらに詳しくは、導電パンプを有する半導体デバ
イスとその形成方法に関する。
【０００２】
【従来の技術】パッケージングをめぐる現在の環境上ま
たは健康上の問題は一般に、鉛の使用に対する懸念を提
起する。導電性バンプを有する現在のフリップ・チップ
方式の多くは一般に、バンプ内部での鉛の比率が比較的
高い。Controlled Collapsed Chip Connection（Ｃ４）
と呼ばれる特定のタイプのバンプでは、バンプは一般に
約９７重量パーセントの鉛と、約３重量パーセントの錫
を有する。これらのバンプは、３つの異なる問題を生じ
る。第１に、多くの顧客が希望する以上に鉛を有する。
第２に、バンプをフローさせる（flow）のに比較的高温
が必要であり、第３に、鉛の使用は一般に、半導体デバ
イスのアルファ粒子の生成を生じる。
【０００３】高温のフローを低減しようと、Evaporated
Extended Eutecticバンプ（Ｅ３）が、フロー温度を低
下するのに用いられた。この特定の実施例では、バンプ
は一般に、比較的厚い、主に鉛から成る層の下に比較的
薄い錫層を含み、比較的薄い錫層によって覆われる。フ
ロー工程の間、錫と鉛は、ダイから遠位の点において、
約２００℃を超えない温度で、比較的容易にフローし
て、比較的低温で良好なチップ接続を行なう。Ｅ３バン
プの問題は、依然鉛が多すぎることであり、アルファ粒
子に関する問題を有することである。
【０００４】
【発明が解決しようとする課題】アルファ粒子の問題を
低減しようと、２つの異なるタイプの鉛を使用するアイ
デアが生まれた。下方の鉛層は不純物がほとんどなく、
一般的な商業用の鉛層によって被覆される。これについ
ての問題は、加熱とフローの間、商業用層からの鉛の一
部と不純物が、下方の鉛層に移動するおそれがあること
である。したがって、アルファ粒子の低減の度合いがそ
れほどでなくなる可能性がある。さらに、鉛が多すぎ
る、フロー温度が高すぎるなど、Ｃ４バンプに関する問
題と同じ２つの問題点がある。
【０００５】
【課題を解決するための手段】導電性バンプが、半導体
ダイの上に載置されるように形成される。導電性バンプ
は一般に、鉛の濃度が低く、２６０℃を超えない温度で
フローし、アルファ粒子に関連する問題を低減した。１
つの実施例で、導電性バンプは、主に錫を含み、比較的
薄い鉛の層を有する。鉛と、錫の一部分は相互作用を起
こして、鉛と錫の共晶点に近い、比較的低温で溶融する
半田を形成する。錫のほとんどは未反応のまま残り、半
導体ダイとパッケージング基板との間に、スタンドオフ
を形成できる。他の金属および不純物も、導電性バンプ
の機械特性または電気特性を改善するのに使用できる。
本発明は、添付請求の範囲によって定義され、実施例の
説明を読むと、さらに理解が深まる。
【０００６】
【実施例】図１は、半導体ダイ１１の一部の断面図を含
む。図１に示されるように、半導体ダイ１１は、絶縁層
１０を含む。絶縁層１０は、窒化物，酸化物，酸化窒化
物，またはその混合物を含む。絶縁層１０内に形成され
るのが、半導体ダイ相互接続パッド１２である。パッド
１２は、主に、アルミニウム，銅，タングステンなどを
含む導電性の充填材料を有する。ここで用いられる「主
に」とは、少なくとも半分として定義される。また、接
着層または障壁層も形成されるが、相互接続パッド１２
とともに示されず、これは一般に導電性の充填材料を堆
積する前に形成される。相互接続パッド１２を形成した
後、ついで、パッシベーション層１４が、絶縁層１０と
パッド１２の上に形成される。開口部が、パッシベーシ
ョン層１４を貫通して形成されて、ダイ相互接続パッド
１２の一部を露出する開口部を形成する。
【０００７】ついで、選択的スクラッチ（scratch） 保
護またはアルファ保護層１６が、パッシベーション層１
４の上に形成される。層１６は一般に、ポリイミドなど
の材料を含む。ついで、バンプ下冶金層（underbump me
tallurgy）１８が、パッシベーション層１４のポリイミ
ド層部分の上に形成され、これは、ダイ相互接続パッド
１２と接触する。バンプ下冶金層１８は一般に、クロー
ム，銅，チタン，タンタル，金，プラチナ，パラジウ
ム，ニッケル，コバルト，鉄，これらの合金，および他
の異なる金属との組合せなどから成る複数の膜を含む。
また、必要な場合には、障壁特性を向上させるために、
窒化金属を含むこともできる。バンプ下冶金層の膜厚は
一般に、約１ミクロンを超えない。
【０００８】ついで、バンプの主たる部分が、バンプ下
冶金層１８の上に形成される。バンプの主たる部分は、
図２に示される第１金属層２０を含む。この特定の実施
例では、層２０は、全部またはほとんどが錫であり、約
２５から７５ミクロンの範囲の膜厚を有する。層２０を
形成する方法は、ＰＶＤ法，蒸着，メッキ（電解メッキ
または無電解メッキ）などを含むことができる。錫のほ
かに、アルミニウムなど別の材料も使用できる。第１金
属層２０は、材料の機械特性または電気特性を改善する
ために、不純物を含むことができる。不純物の例は、
銅，銀，インジウム，ビスマス，アンチモン，亜鉛など
を含む。別の実施例では、第１金属層２０は、導電性の
合金を含むことができ、この合金は、少なくとも２つの
異なる導電要素を含む。鉛に関する問題を回避するた
め、第１金属層２０は、鉛を含むべきではない。
【０００９】ついで、第２金属層３０が、図３に示され
るように、第１金属層２０の上に形成される。第２金属
層３０は、第１金属層２０について記載される任意の方
法を用いて形成できる。ただし、第１および第２金属層
２０，３０は、異なる方法を用いて形成してもよい。図
３に戻り、この特定の実施例では、第２金属層３０は、
全部またはほとんど鉛を含み、約１から２５ミクロンの
範囲の膜厚を有する。鉛の他に、金，ビスマス，インジ
ウム，銀，ガリウムなど、別の金属も使用できる。
【００１０】この時点で、導電性バンプ３２が形成さ
れ、これは、第１金属層（第１部分）２０と、第２金属
層（第２部分）３０とを含む。この特定の実施例では、
導電性バンプ３２は、幾つかの興味深い特徴を有する。
導電性バンプ３２は、少なくとも２重量パーセントの鉛
を有し、一般的には、約２５重量パーセントを超えない
鉛である。明らかに、導電性バンプ３２は、鉛よりも錫
のほうが多い。第１金属層２０は、第２金属層３０の少
なくとも約３倍の膜厚である。第２金属層３０は、半導
体ダイ１１から最も遠い位置にある層である。
【００１１】複数のバンプを含む半導体ダイ１１が、図
４から図６に示されるパッケージング基板に付着され
る。図４を見て、絶縁層１０，１４，１６（図１から図
３）は、１つの基準素子４０により示され、この半導体
ダイも、前述されるように、半導体ダイ相互接続パッド
１２とバンプ３２とを含む。パッケージング基板４２は
一般に、少なくとも一部分が有機材料である。１つの実
施例では、パッケージング基板は、パッケージング基板
相互接続パッド４４と、パッケージング基板４２内部の
他の相互接続（図示されず）以外、ほとんどが有機材料
である。別の実施例では、パッケージング基板は、主に
セラミックの基板を含み、この基板は、半導体ダイ１１
に面する露出表面の上に、比較的薄い有機層を有する。
有機層は、当該有機膜の露出端部に沿って、配線パッド
または他のパッドと、相互接続とを有する。
【００１２】ダイ１１をパッケージング基板４２の上に
設置する前に、一般には、パッケージング基板４２とパ
ッケージ・パッド４４が、フラックスに露出される。こ
のフラックスは一般に、有機酸を含み、有機酸は、パッ
ド４４の表面に沿って形成する酸化物と反応し得る。一
例が、カルボキシル酸で、アジピン酸，クエン酸，マレ
イン酸，アビエチン酸などを含む。１つの特定の実施例
では、無洗浄（no−clean）フラックスも使用できる。
無洗浄フラックスを用いることにより、比較的薄いフラ
ックス層が、ダイ１１をパッケージング基板４２に接合
させた後で洗浄を実施する段階を必要とせずに塗布でき
る。１つの特定の実施例では、樟脳などの接着促進剤
が、バンプ３２と、パッケージング基板４２のパッドと
の間の接着を改善するのに使用できる。フラックスが塗
布された後、ついで、ダイ１１がパッケージング基板４
２の上に設置されて、バンプ３２がパッド４４と接触す
るようにする。少量の圧力が加えられて、バンプ３２
が、パッケージ・パッド４４により良く接着できるよう
にする。一般には、０．０７から０．１０ニュートンの
力が加えられて十分な接着を可能にし、ダイとパッケー
ジング基板４２とが、ルーチンの取り扱い中に容易に分
離しないようにする。
【００１３】バンプ３２をパッド４４の上に設置した
後、ついで、結合アセンブリは熱サイクルの下に置か
れ、これにより、半田が形成され、バンプ３２をパッド
４４と結合させる。図５に示されるように、熱は全体
が、矢印５２によって示され、一般には、少なくとも約
１８３℃の温度で実施される。この動作は、約２０１度
を超えない温度で実施されることが多い。しかしなが
ら、他の実施例では、より高温も使用できる。錫の融点
は約２３１℃である。したがって、錫がフローする可能
性を低減するために、フローは、約２３１℃を上回る温
度で実施すべきではない。有機基板が存在することによ
り、第１および第２金属層に他の材料が使用される場合
には、フロー温度は一般に、約２６０℃を超えない。
【００１４】第１および第２金属層２０，３０が存在す
る場所の近傍では、温度により、これらの層内の鉛と錫
との相互作用が可能になり、錫と鉛の共晶点付近に抑制
された（suppressed）融点を有する材料を形成でき、組
成が、約６３重量パーセントの錫と、約３７重量パーセ
ントの鉛であるときには、この共晶点は約１８３℃であ
る（約１８０から１９０℃の範囲内にある）。図５に示
されるように、抑制された融点部分と、第１金属層２０
の残りとの境界が、破線５４によって示される。これ
は、２つの部分の間の明確に識別可能、すなわち離散的
な変わり目ではないが、境界が概ねどこにあるかを示
す。この特定の実施例では、半田は、パッド４４の上部
へと、また側面に沿って流れるが、第１金属層の非溶融
部分により、引き続きスタンドオフ・ギャップを設け
る。
【００１５】ついで、アンダフィル（underfill）材料
６０の層が、ダイ基板４０と、パッケージング基板４２
との間に配置される。これは横方向に、バンプ５０の周
囲を囲み、組み立てられた部材の機械的完全性を向上で
きるようにする。アンダフィル材料は一般に、エポキシ
混合物内にアルミニウム，シリカなどを含む。
【００１６】他の実施例では、パッケージング基板の付
着動作中、他の実施態様も考えられる。例えば、接合を
行なうのに、フラックスが不要であり、同様に、樟脳な
どの接着促進剤の使用も不要である。
【００１７】本発明の実施例は、先行技術によって達成
されない利点を含む。さらに詳しくは、少なくとも幾つ
かの実施例では、第１および第２金属層の鉛錫材料は、
鉛と錫の共晶点により近い、比較的低い融点の材料を形
成できるようにし、これにより、ほぼ２００℃の上下付
近の温度で、フロー段階を実施できる。一部の実施例で
は、第１金属層の融点が共晶組成の溶融温度を上回る場
合には、フロー温度は、より高いポイントに引き上げら
れる。第２に、鉛の量が大幅に低減される。一般に、導
電性バンプ内部には、約２５重量パーセントを超えない
鉛が存在する。さらに、鉛は、半導体ダイ基板から遠く
に離されるので、アルファ粒子の問題を生じる可能性が
大幅に低減される。第１金属層２０は、フロー動作の
間、スタンドオフとなる。フロー動作の温度は一般に、
第１金属層の融点を下回る温度で実施されるので、第１
金属層２０は、バンプの半田部分を形成する部分を除き
溶融しない。フロー動作後でも、パッケージング相互接
続パッド４４の表面（側面または上部）の法線方向で、
半田部分の膜厚が測定される場合には、第１金属層２０
の残りの部分は依然、半田部分の膜厚の約３倍の膜厚で
ある。
【００１８】上記明細書では、本発明を、特定の実施例
を参照して説明した。しかしながら、当業者は種々の変
形および変更を、添付請求の範囲に定められる本発明の
範囲から逸脱せずに実施できることを理解する。したが
って、本明細書と図面は、限定的意味ではなく、説明の
ためと見なされ、かかるすべての変形は、本発明の範囲
内に包含されることが意図される。
【００１９】これまで利点，その他の長所および問題の
解決策を、特定の実施例に関して説明してきた。しかし
ながら、利点，長所，問題の解決策，および利点，長所
または解決策を生じる可能性のあるいずれの要素も、す
べての請求項の重要，必要または不可欠な特徴もしくは
要素と解釈すべきではない。本明細書で用いられる「構
成される」，「構成する」または他の語形変化は、非排
他的な包含を対象とすることを意図し、一連の要素によ
って構成される工程，方法，物品または装置は、これら
の要素を含むのみならず、明示に列挙されない、すなわ
ち、かかる工程，方法，物品または装置に固有の他の要
素を含む。
【図面の簡単な説明】
本発明は例として示され、添付図面に限定されない。同
様の参照番号は同様の要素を示す。
【図１】 バンプ下冶金を形成した後の半導体の一部分
の図である。
【図２】 バンプの第１金属層を形成した後の図１の基
板の断面図である。
【図３】 バンプ形成に際して第１金属層を覆う第２金
属層を形成した後の図２の基板の断面図である。
【図４】 バンプをパッケージング基板の上に設置する
間の、パッケージング基板と半導体ダイの一部分の断面
図である。
【図５】 バンプをフローしている間の、図４の基板の
断面図である。
【図６】 半導体ダイとパッケージング基板との間にア
ンダフィル材料を形成した後の図５の基板の断面図であ
る。当業者は、図面内の要素が単純かつ明確を期すよう
に示されており、必ずしも、縮尺どおりに描かれていな
いことを理解する。例えば、図面内の要素の一部の寸法
は、他の素子に比べて大きめに描かれ、本発明の実施例
に対する理解を深める一助になるかもしれない。
【符号の説明】
１１ 半導体ダイ １２ 半導体ダイ相互接続パッド １８ バンプした冶金層 ２０ 第１金属層 ３０ 第２金属層 ３２ 導電性バンプ ４０ ダイ基板 ４２ パッケージ基板 ４４ パッケージング基板相互接続パッド

Claims (5)

    【特許請求の範囲】
  1. 【請求項１】 半導体デバイスであって：ダイ相互接続
    パッドを有する半導体ダイ；および前記ダイ相互接続パ
    ッドと結合されて、第１金属部分と第２金属部分とを含
    む導電性バンプであって：前記第１金属部分は、前記第
    ２金属部分に比べて、前記半導体ダイのより近傍に位置
    し；前記第１金属部分は、前記第２金属部分より厚く；
    前記第２金属部分は、前記導電性バンプの中で、前記半
    導体ダイから最も遠い位置にある金属部分であり；かつ
    前記第２金属部分は、鉛を含む導電性バンプ；によって
    構成されることを特徴とする半導体デバイス。
  2. 【請求項２】 前記導電性バンプは、約２５重量パーセ
    ントを下回る鉛を含むことを特徴とする請求項１記載の
    半導体デバイス。
  3. 【請求項３】 半導体デバイスであって：ダイ相互接続
    パッドを有する半導体ダイ；および前記ダイ相互接続パ
    ッドと結合され、第１金属部分と第２金属部分とを含む
    導電性バンプであって：前記第１金属部分は、前記第２
    金属部分に比べて、前記半導体ダイのより近傍に位置
    し；かつ前記導電性バンプは、鉛を含むが、約２５重量
    パーセントを下回る鉛である導電性バンプ：によって構
    成されることを特徴とする半導体デバイス。
  4. 【請求項４】 前記第１金属部分は主に錫を含むことを
    特徴とする請求項３記載の半導体デバイス。
  5. 【請求項５】 前記第１金属部分は、前記第２金属部分
    より厚く；前記第２金属部分は、前記半導体ダイから、
    最も遠い位置にある導電性の金属部分であり；かつ前記
    第２金属部分は、鉛を含むことを特徴とする請求項３記
    載の半導体デバイス。
JP2000387813A 2000-01-03 2000-12-20 半導体デバイス及びその製造方法 Expired - Fee Related JP4698826B2 (ja)

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US09/476,810 US6346469B1 (en) 2000-01-03 2000-01-03 Semiconductor device and a process for forming the semiconductor device
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HK1038439A1 (zh) 2002-03-15
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JP4698826B2 (ja) 2011-06-08
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KR100762111B1 (ko) 2007-10-02
CN1303130A (zh) 2001-07-11

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