JP2001118499A - Method of fabrication for electric field radiation electron source - Google Patents
Method of fabrication for electric field radiation electron sourceInfo
- Publication number
- JP2001118499A JP2001118499A JP29595799A JP29595799A JP2001118499A JP 2001118499 A JP2001118499 A JP 2001118499A JP 29595799 A JP29595799 A JP 29595799A JP 29595799 A JP29595799 A JP 29595799A JP 2001118499 A JP2001118499 A JP 2001118499A
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- Prior art keywords
- surface electrode
- electric field
- layer
- oxide film
- strong electric
- Prior art date
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Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、電界放射型電子源
の製造方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a field emission type electron source.
【０００２】[0002]
【従来の技術】本願発明者らは、多孔質多結晶半導体層
（例えば、多孔質化された多結晶シリコン層＜ポーラス
ポリシリコン層＞）を急速熱酸化（ＲＴＯ）技術によっ
て急速熱酸化することによって、導電性基板と金属薄膜
（表面電極）との間に介在し導電性基板から注入された
電子がドリフトする強電界ドリフト層を形成した電界放
射型電子源を提案している。2. Description of the Related Art The inventors of the present invention have conducted rapid thermal oxidation of a porous polycrystalline semiconductor layer (for example, a porous polycrystalline silicon layer <porous polysilicon layer>) by a rapid thermal oxidation (RTO) technique. Has proposed a field emission type electron source in which a strong electric field drift layer is formed between a conductive substrate and a metal thin film (surface electrode) to drift electrons injected from the conductive substrate.
【０００３】この電界放射型電子源１０’は、例えば、
図３に示すように、導電性基板たるｎ形シリコン基板１
の主表面側に酸化した多孔質多結晶シリコン層よりなる
強電界ドリフト層６が形成され、強電界ドリフト層６上
に金属薄膜よりなる表面電極７が形成され、ｎ形シリコ
ン基板１の裏面にオーミック電極２が形成されている。[0003] This field emission type electron source 10 'is, for example,
As shown in FIG. 3, an n-type silicon substrate 1 as a conductive substrate
A strong electric field drift layer 6 composed of an oxidized porous polycrystalline silicon layer is formed on the main surface side of the substrate, and a surface electrode 7 composed of a metal thin film is formed on the strong electric field drift layer 6. An ohmic electrode 2 is formed.
【０００４】図３に示す構成の電界放射型電子源１０’
では、図４に示すように、表面電極７を真空中に配置す
るとともに表面電極７に対向してコレクタ電極２１を配
置し、表面電極７をｎ形シリコン基板１（オーミック電
極２）に対して正極として直流電圧Ｖpsを印加するとと
もに、コレクタ電極２１を表面電極７に対して正極とし
て直流電圧Ｖcを印加することにより、ｎ形シリコン基
板１から注入された電子が強電界ドリフト層６をドリフ
トし表面電極７を通して放出される（なお、図４中の一
点鎖線は表面電極７を通して放出された電子ｅ-の流れ
を示す）。したがって、表面電極７としては、仕事関数
の小さな材料を用いることが望ましい。ここにおいて、
表面電極７とオーミック電極２との間に流れる電流をダ
イオード電流Ｉpsと称し、コレクタ電極２１と表面電極
７との間に流れる電流を放出電子電流Ｉｅと称し、ダイ
オード電流Ｉpsに対する放出電子電流Ｉeが大きい（Ｉe
／Ｉpsが大きい）ほど電子放出効率が高くなる。なお、
この電界放射型電子源１０’では、表面電極７とオーミ
ック電極２との間に印加する直流電圧Ｖpsを１０〜２０
Ｖ程度の低電圧としても電子を放出させることができ
る。A field emission type electron source 10 'having the structure shown in FIG.
Then, as shown in FIG. 4, the surface electrode 7 is arranged in a vacuum, the collector electrode 21 is arranged opposite to the surface electrode 7, and the surface electrode 7 is moved with respect to the n-type silicon substrate 1 (the ohmic electrode 2). By applying a DC voltage Vps as a positive electrode and applying a DC voltage Vc using the collector electrode 21 as a positive electrode with respect to the surface electrode 7, electrons injected from the n-type silicon substrate 1 drift in the strong electric field drift layer 6. The electrons are emitted through the surface electrode 7 (note that the dashed line in FIG. 4 indicates the flow of electrons e − emitted through the surface electrode 7). Therefore, it is desirable to use a material having a small work function as the surface electrode 7. put it here,
The current flowing between the surface electrode 7 and the ohmic electrode 2 is called a diode current Ips, the current flowing between the collector electrode 21 and the surface electrode 7 is called an emission electron current Ie, and the emission electron current Ie with respect to the diode current Ips is Large (Ie
/ Ips is larger), the electron emission efficiency is higher. In addition,
In this field emission type electron source 10 ′, the DC voltage Vps applied between the surface electrode 7 and the ohmic
Electrons can be emitted even at a low voltage of about V.
【０００５】この電界放射型電子源１０’では、電子放
出特性の真空度依存性が小さく且つ電子放出時にポッピ
ング現象が発生せず安定して電子を高い電子放出効率で
放出することができる。ここにおいて、強電界ドリフト
層６は、図５に示すように、少なくとも、柱状の多結晶
シリコン５１（グレイン）と、多結晶シリコン５１の表
面に形成された薄いシリコン酸化膜５２と、多結晶シリ
コン５１間に介在するナノメータオーダの微結晶シリコ
ン層６３と、微結晶シリコン層６３の表面に形成され当
該微結晶シリコン層６３の結晶粒径よりも小さな膜厚の
絶縁層であるシリコン酸化膜６４とから構成されると考
えられる。[0005] In this field emission type electron source 10 ', the dependence of the electron emission characteristics on the degree of vacuum is small, and a popping phenomenon does not occur at the time of electron emission, and electrons can be stably emitted with high electron emission efficiency. Here, the strong electric field drift layer 6 includes, as shown in FIG. 5, at least a columnar polycrystalline silicon 51 (grain), a thin silicon oxide film 52 formed on the surface of the polycrystalline silicon 51, and a polycrystalline silicon 51. A microcrystalline silicon layer 63 on the order of nanometers interposed between the microcrystalline silicon layers 51; and a silicon oxide film 64 formed on the surface of the microcrystalline silicon layer 63 and serving as an insulating layer having a thickness smaller than the crystal grain size of the microcrystalline silicon layer 63. It is considered to be composed of
【０００６】すなわち、強電界ドリフト層６は、各グレ
インの表面が多孔質化し各グレインの中心部分では結晶
状態が維持されていると考えられる。したがって、強電
界ドリフト層６に印加された電界はほとんどシリコン酸
化膜６４にかかるから、注入された電子はシリコン酸化
膜６４にかかっている強電界により加速され多結晶シリ
コン５１間を表面に向かって図５中の矢印Ａの向きへ
（図５中の上方向へ向かって）ドリフトするので、電子
放出効率を向上させることができる。なお、強電界ドリ
フト層６の表面に到達した電子はホットエレクトロンで
あると考えられ、表面電極７を容易にトンネルし真空中
に放出される。なお、表面電極７の膜厚は１０ｎｍない
し１５ｎｍ程度に設定されている。That is, it is considered that the surface of each grain of the strong electric field drift layer 6 is made porous, and the crystal state is maintained at the central portion of each grain. Therefore, most of the electric field applied to the strong electric field drift layer 6 is applied to the silicon oxide film 64, and the injected electrons are accelerated by the strong electric field applied to the silicon oxide film 64 to move between the polycrystalline silicons 51 toward the surface. Drift in the direction of arrow A in FIG. 5 (upward in FIG. 5), so that the electron emission efficiency can be improved. The electrons reaching the surface of the strong electric field drift layer 6 are considered to be hot electrons, and are easily tunneled through the surface electrode 7 and discharged into a vacuum. The thickness of the surface electrode 7 is set to about 10 nm to 15 nm.
【０００７】[0007]
【発明が解決しようとする課題】ところで、上記の構成
において、絶縁層たるシリコン酸化膜６４にかかる電界
によるドリフトで電子を加速して放出させる場合、シリ
コン酸化膜６４の欠陥により効率が低下する、或いは絶
縁耐圧が低下するという問題があった。一方急速昇温酸
化法（ＲＴＯ）等でシリコン酸化膜６４を形成した場
合、ストレス等の原因により微結晶シリコン層６３とシ
リコン酸化膜６４との界面やシリコン酸化膜に多くの欠
陥を生じることになり、上記の効率低下は免れなかっ
た。In the above structure, when electrons are accelerated and released by drift caused by an electric field applied to the silicon oxide film 64 as an insulating layer, efficiency is reduced due to defects in the silicon oxide film 64. Alternatively, there is a problem that the withstand voltage is reduced. On the other hand, when the silicon oxide film 64 is formed by a rapid thermal oxidation method (RTO) or the like, many defects occur at the interface between the microcrystalline silicon layer 63 and the silicon oxide film 64 or in the silicon oxide film due to stress or the like. As a result, the above-mentioned reduction in efficiency was inevitable.
【０００８】本発明は上記の問題点に鑑みて為されたも
のであり、その目的とするところは、電子放出効率を向
上させ、且つ電気的耐圧も向上させることができる電界
放射型電子源の製造方法を提供することにある。The present invention has been made in view of the above problems, and an object of the present invention is to provide a field emission type electron source capable of improving electron emission efficiency and electric breakdown voltage. It is to provide a manufacturing method.
【０００９】[0009]
【課題を解決するための手段】上記目的を達成するため
に、請求項１の発明では、強電界ドリフト層上に触媒作
用を持つ材料により表面電極を形成し、該表面電極を形
成した後、高温、酸素雰囲気中で表面電極の触媒作用に
より上記強電界ドリフト層の酸化膜からなる絶縁層の酸
化膜質改善処理を施すことを特徴とする電界放射型電子
源の製造方法。In order to achieve the above object, according to the first aspect of the present invention, a surface electrode is formed on a strong electric field drift layer using a material having a catalytic action, and after forming the surface electrode, A method for manufacturing a field emission type electron source, comprising: performing a process of improving an oxide film quality of an insulating layer formed of an oxide film of the strong electric field drift layer by a catalytic action of a surface electrode in a high temperature and oxygen atmosphere.
【００１０】請求項２の発明では、半導体層の表面に触
媒作用を持つ材料により表面電極を形成し、該表面電極
を形成した後、高温、酸素雰囲気中で表面電極の触媒作
用により半導体層を酸化して強電界ドリフト層を形成す
る同時に強電界ドリフト層の酸化膜からなる絶縁層を形
成し、且つ該絶縁層の酸化膜質改善処理を施すことを特
徴とする。According to the second aspect of the present invention, a surface electrode is formed of a material having a catalytic action on the surface of the semiconductor layer, and after the surface electrode is formed, the semiconductor layer is formed by a catalytic action of the surface electrode in a high-temperature, oxygen atmosphere. Forming a strong electric field drift layer by oxidation; forming an insulating layer made of an oxide film of the strong electric field drift layer; and performing an oxide film quality improving process on the insulating layer.
【００１１】請求項３の発明では、請求項１又は２の発
明において、上記絶縁層をシリコン酸化膜により形成し
たことを特徴とする。According to a third aspect of the present invention, in the first or second aspect, the insulating layer is formed of a silicon oxide film.
【００１２】請求項４の発明では、請求項１乃至３の何
れかの発明において、上記表面電極をＰｔにより形成し
たことを特徴とする。According to a fourth aspect of the present invention, in any one of the first to third aspects, the surface electrode is formed of Pt.
【００１３】請求項５の発明では、請求項１乃至４の何
れかの発明において、上記強電界ドリフト層を多孔質多
結晶シリコン層により形成したことを特徴とする。According to a fifth aspect of the present invention, in any one of the first to fourth aspects, the strong electric field drift layer is formed of a porous polycrystalline silicon layer.
【００１４】[0014]
【発明の実施の形態】以下本発明を実施形態により説明
する。DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to embodiments.
【００１５】（実施形態１）本実施形態は、請求項１の
発明に対応する実施形態であって、図１はその製造プロ
セスの概略構成を示す。(Embodiment 1) This embodiment is an embodiment corresponding to the first aspect of the present invention, and FIG. 1 shows a schematic configuration of a manufacturing process thereof.
【００１６】本実施形態の製造方法で得られる電界放射
型電子源１０の構成は、上述した電界放射型電子源１
０’の構成と基本的に同じであって、導電性基板たるｎ
形シリコン基板１の主表面側に酸化した多孔質多結晶シ
リコン層＜ポーラスポリシリコン層＞よりなる強電界ド
リフト層６が形成され、強電界ドリフト層６上に金属薄
膜よりなる表面電極７が形成され、ｎ形シリコン基板１
の裏面にオーミック電極２が形成されている。The configuration of the field emission type electron source 10 obtained by the manufacturing method of the present embodiment is the same as that of the field emission type electron source 1 described above.
0 ′, which is basically the same as that of the conductive substrate n.
Electric field drift layer 6 made of oxidized porous polycrystalline silicon layer <porous polysilicon layer> is formed on the main surface side of shaped silicon substrate 1, and surface electrode 7 made of a metal thin film is formed on strong electric field drift layer 6 N-type silicon substrate 1
Ohmic electrode 2 is formed on the back surface of the substrate.
【００１７】以下、製造方法について図１を参照しなが
ら説明する。Hereinafter, the manufacturing method will be described with reference to FIG.
【００１８】まず、ｎ形シリコン基板１の裏面にオーミ
ック電極２を形成した後、ｎ形シリコン基板１の表面に
所定膜厚（例えば、１．５μｍ）の半導体層たるノンド
ープの多結晶シリコン層３を形成（成膜）することによ
り図１（ａ）に示すような構造が得られる。なお、多結
晶シリコン層３の成膜は、例えばＬＰＣＶＤ法やスパッ
タ法により行ってもよいし、あるいはプラズマＣＶＤ法
によってアモルファスシリコンを成膜した後にアニール
処理を行うことにより結晶化させて成膜してもよい。First, after an ohmic electrode 2 is formed on the back surface of an n-type silicon substrate 1, a non-doped polycrystalline silicon layer 3 as a semiconductor layer having a predetermined thickness (for example, 1.5 μm) is formed on the surface of the n-type silicon substrate 1. Is formed (deposited), a structure as shown in FIG. 1A is obtained. The polycrystalline silicon layer 3 may be formed by, for example, an LPCVD method or a sputtering method, or may be formed by crystallizing by forming an amorphous silicon film by a plasma CVD method and then performing an annealing treatment. You may.
【００１９】ノンドープの多結晶シリコン層３を形成し
た後、５５ｗｔ％のフッ化水素水溶液とエタノールとを
略１：１で混合した混合液よりなる電解液の入った陽極
酸化処理槽を利用し、白金電極（図示せず）を負極、ｎ
形シリコン基板１（オーミック電極２）を正極として、
多結晶シリコン層３に光照射を行いながら所定の条件で
陽極酸化処理を行うことによって、多孔質多結晶シリコ
ン層４が図１（ｂ）に示すように形成される。After the non-doped polycrystalline silicon layer 3 is formed, an anodic oxidation tank containing an electrolytic solution comprising a mixture of a 55 wt% aqueous solution of hydrogen fluoride and ethanol in a ratio of about 1: 1 is used. A platinum electrode (not shown) is connected to the negative electrode, n
Type silicon substrate 1 (ohmic electrode 2) as a positive electrode
By performing anodic oxidation treatment under predetermined conditions while irradiating the polycrystalline silicon layer 3, a porous polycrystalline silicon layer 4 is formed as shown in FIG.
【００２０】上述の陽極酸化処理が終了した後、多孔質
多結晶シリコン層４の最表面に結合している水素原子を
熱処理により脱離させてから、多孔質多結晶シリコン層
４を、例えば急速昇温酸化法（ＲＴＯ）によって酸化す
ることにより強電界ドリフト層６が形成され、図１
（ｃ）に示す構造が得られる。要するに、本実施形態で
は、多孔質多結晶シリコン層４を陽極酸化処理により形
成した際に多孔質多結晶シリコン層４のシリコン原子を
終端している水素原子を、上記熱処理により脱離させた
後、多孔質多結晶シリコン層４をアニールによって酸化
している。After the above-described anodic oxidation treatment is completed, hydrogen atoms bonded to the outermost surface of the porous polycrystalline silicon layer 4 are desorbed by a heat treatment, and then the porous polycrystalline silicon layer 4 is removed, for example, by rapid cooling. Oxidation is performed by a thermal oxidation method (RTO) to form a strong electric field drift layer 6.
The structure shown in (c) is obtained. In short, in this embodiment, after the porous polycrystalline silicon layer 4 is formed by anodic oxidation, the hydrogen atoms terminating the silicon atoms of the porous polycrystalline silicon layer 4 are desorbed by the heat treatment. The porous polycrystalline silicon layer 4 is oxidized by annealing.
【００２１】強電界ドリフト層６は図５にて説明したよ
うに、少なくとも、柱状の多結晶シリコン５１（グレイ
ン）と、多結晶シリコン５１の表面に形成された薄いシ
リコン酸化膜５２と、多結晶シリコン５１間に介在する
ナノメータオーダの微結晶シリコン層６３と、微結晶シ
リコン層６３の表面に形成され当該微結晶シリコン層６
３の結晶粒径よりも小さな膜厚の絶縁層であるシリコン
酸化膜６４とから構成される。As described with reference to FIG. 5, the strong electric field drift layer 6 includes at least a columnar polycrystalline silicon 51 (grain), a thin silicon oxide film 52 formed on the surface of the polycrystalline silicon 51, and a polycrystalline silicon 51. A nanometer-order microcrystalline silicon layer 63 interposed between the silicon 51 and the microcrystalline silicon layer 6 formed on the surface of the microcrystalline silicon layer 63;
3 and a silicon oxide film 64 which is an insulating layer having a thickness smaller than the crystal grain size.
【００２２】しかる後に強電界ドリフト層６上に触媒作
用を持つ材料、例えばＰｔ用いた導電性薄膜からなる表
面電極７を例えば図１（ｄ）に示す蒸着等により形成す
る。Thereafter, a surface electrode 7 made of a conductive thin film using a material having a catalytic action, for example, Pt is formed on the strong electric field drift layer 6 by, for example, vapor deposition shown in FIG.
【００２３】このままではシリコン酸化膜６４中に欠陥
を生じさせたままの電界放射型電子源であるが、表面電
極７の形成後、更に高温、酸素雰囲気中に於いて酸化膜
質改善処理を行う（図１（ｅ））。この場合、Ｐｔの触
媒作用の効果を発揮させることができる温度が略２００
℃程度であるので、上記の酸化膜質改善処理プロセスの
温度を２００℃程度とし、デバイス形成のプロセスとの
マッチングを図る。In this state, the field emission type electron source has defects in the silicon oxide film 64. However, after the surface electrode 7 is formed, the quality of the oxide film is further improved in a high-temperature, oxygen atmosphere ( FIG. 1 (e)). In this case, the temperature at which the catalytic effect of Pt can be exerted is approximately 200.
Therefore, the temperature of the above oxide film quality improvement process is set to about 200 ° C., and matching with the device forming process is attempted.
【００２４】さてこのプロセスでは表面電極７を構成す
るＰｔの触媒作用により雰囲気中の酸素がイオンに分解
され、シリコン酸化膜６４の欠陥を補償をすることにな
るのである。特に強電界ドリフト層６が多孔質であるた
め酸素イオンによって高い欠陥補償効果が期待できる。In this process, oxygen in the atmosphere is decomposed into ions by the catalytic action of Pt constituting the surface electrode 7, thereby compensating for defects in the silicon oxide film 64. Particularly, since the strong electric field drift layer 6 is porous, a high defect compensation effect can be expected by oxygen ions.
【００２５】このようにして酸化膜質改善処理のプロセ
スを経ることにより、シリコン酸化膜６４の欠陥補償が
行われ、その結果電子放出効率が向上し、また電気的耐
圧も向上した電界放射型電子源１０が得られることにな
る。Through the process of improving the quality of the oxide film in this manner, the defect of the silicon oxide film 64 is compensated, and as a result, the electron emission efficiency is improved and the electric breakdown voltage is also improved. 10 will be obtained.
【００２６】尚表面電極７の材料として触媒作用を持
つ、アルミナやマグネシウムなどの材料を用いてもよ
い。The material of the surface electrode 7 may be a material having a catalytic action, such as alumina or magnesium.
【００２７】（実施形態２）上記実施形態１では酸化膜
形成後、表面電極７の形成、酸化膜質改善処理のプロセ
スを順次経ているが、本実施形態では請求項２の発明に
対応し、シリコン酸化膜形成と、酸化膜質改善処理とを
同時に行うようにする点に特徴がある。(Embodiment 2) In the first embodiment, after the oxide film is formed, the process of forming the surface electrode 7 and the process of improving the oxide film quality are sequentially performed. It is characterized in that the oxide film formation and the oxide film quality improvement processing are performed simultaneously.
【００２８】つまり本実施形態では、まず図２（ａ）に
示すようにｎ形シリコン基板１の裏面にオーミック電極
２を形成した後、ｎ形シリコン基板１の表面に所定膜厚
（例えば、１．５μｍ）の半導体層たるノンドープの多
結晶シリコン層３を形成（成膜）し、この多結晶シリコ
ン層３を形成した後、５５ｗｔ％のフッ化水素水溶液と
エタノールとを略１：１で混合した混合液よりなる電解
液の入った陽極酸化処理槽を利用し、白金電極（図示せ
ず）を負極、ｎ形シリコン基板１（オーミック電極２）
を正極として、多結晶シリコン層３に光照射を行いなが
ら所定の条件で陽極酸化処理を行うことによって、多孔
質多結晶シリコン層４を図２（ｂ）に示すように形成さ
れる。これまでのプロセスは実施形態１と同じである。That is, in this embodiment, first, an ohmic electrode 2 is formed on the back surface of the n-type silicon substrate 1 as shown in FIG. A non-doped polycrystalline silicon layer 3 as a semiconductor layer (0.5 μm) is formed (deposited), and after forming this polycrystalline silicon layer 3, a 55 wt% aqueous solution of hydrogen fluoride and ethanol are mixed at about 1: 1. A platinum electrode (not shown) was used as a negative electrode and an n-type silicon substrate 1 (an ohmic electrode 2) using an anodizing tank containing an electrolytic solution composed of the mixed solution.
By performing anodizing treatment under predetermined conditions while irradiating the polycrystalline silicon layer 3 with light using the positive electrode as a positive electrode, the porous polycrystalline silicon layer 4 is formed as shown in FIG. 2B. The process so far is the same as that of the first embodiment.
【００２９】そして本実施形態では、陽極酸化処理が終
了した後、多孔質多結晶シリコン層４の最表面に、例え
ばＰｔ、アルミナ、マグネシウム等の触媒作用を持つ材
料により表面電極７を蒸着などにより形成し（図２
（ｃ））する。In this embodiment, after the anodic oxidation treatment is completed, a surface electrode 7 is formed on the outermost surface of the porous polycrystalline silicon layer 4 by using a material having a catalytic action such as Pt, alumina, magnesium or the like by vapor deposition or the like. (Fig. 2
(C)).
【００３０】この表面電極７の形成後、高温、酸素雰囲
気によって、多孔質多結晶シリコン層４を酸化すること
により強電界ドリフト層６を形成すると同時に、強電界
ドリフト層６のシリコン酸化膜６４の欠陥を表面電極７
の材料の触媒作用によって実施形態１の場合と同様に欠
陥補償を行うのである。After the surface electrode 7 is formed, the porous polycrystalline silicon layer 4 is oxidized in a high temperature and oxygen atmosphere to form the strong electric field drift layer 6 and, at the same time, to form the silicon oxide film 64 of the strong electric field drift layer 6. Defects on surface electrode 7
The defect compensation is performed in the same manner as in the first embodiment by the catalytic action of the material.
【００３１】つまり本実施形態では酸化膜形成と同じプ
ロセスにより同時に酸化膜質改善処理が行え、実施形態
１に比べてプロセスの簡便化と歩留まりの向上、製造コ
ストの低減化が図れるのである。That is, in the present embodiment, the oxide film quality improvement processing can be performed simultaneously by the same process as the oxide film formation, so that the process can be simplified, the yield can be improved, and the manufacturing cost can be reduced as compared with the first embodiment.
【００３２】尚表面電極７を表面に形成した強電界ドリ
フト層６の製造方法及び材料は上記実施形態に特に限定
されるものではなく、他の製造方法及び材料によって得
られるものでも良い。The manufacturing method and material of the strong electric field drift layer 6 having the surface electrode 7 formed on the surface are not particularly limited to the above embodiment, but may be obtained by other manufacturing methods and materials.
【００３３】[0033]
【発明の効果】請求項１の発明は、強電界ドリフト層上
に触媒作用を持つ材料により表面電極を形成し、該表面
電極を形成した後、高温、酸素雰囲気中で表面電極の触
媒作用により上記強電界ドリフト層の酸化膜からなる絶
縁層の酸化膜質改善処理を施すので、表面電極の材料の
触媒作用により発生する酸素イオンによって酸化膜から
なる絶縁層の欠陥補償が図れ、その結果電子放出の効率
が向上し且つ電気的耐圧が向上した電界放射型電子源を
得られるという効果がある。According to the first aspect of the present invention, a surface electrode is formed from a material having a catalytic action on a strong electric field drift layer, and after the surface electrode is formed, the surface electrode is subjected to a catalytic action in a high-temperature, oxygen atmosphere. Since the oxide layer of the strong electric field drift layer is subjected to the oxide film quality improvement treatment, the oxide layer generated by the catalytic action of the material of the surface electrode can compensate for the defect of the oxide layer of the oxide layer, thereby resulting in electron emission. There is an effect that a field emission electron source with improved efficiency and improved electric breakdown voltage can be obtained.
【００３４】請求項２の発明は、半導体層の表面に触媒
作用を持つ材料により表面電極を形成し、該表面電極を
形成した後、高温、酸素雰囲気中で表面電極の触媒作用
により半導体層を酸化して強電界ドリフト層を形成する
同時に強電界ドリフト層の酸化膜からなる絶縁層を形成
し、且つ該絶縁層の酸化膜質改善処理を施すので、表面
電極の材料の触媒作用により発生する酸素イオンによっ
て酸化膜からなる絶縁層の欠陥補償が図れ、その結果電
子放出の効率が向上し且つ電気的耐圧が向上した電界放
射型電子源を得られる上に、プロセスの簡便化と歩留ま
りの向上、更には製造コストの低減が図れるという効果
がある。According to a second aspect of the present invention, a surface electrode is formed of a material having a catalytic action on the surface of the semiconductor layer, and after the surface electrode is formed, the semiconductor layer is formed by a catalytic action of the surface electrode in a high-temperature, oxygen atmosphere. Oxidation to form a strong electric field drift layer Simultaneously, an insulating layer composed of an oxide film of the strong electric field drift layer is formed and the oxide film quality of the insulating layer is improved, so that oxygen generated by the catalytic action of the material of the surface electrode Defect compensation of an insulating layer made of an oxide film by ions can be achieved, and as a result, a field emission electron source with improved electron emission efficiency and improved electric breakdown voltage can be obtained, and further, simplification of the process and improvement of yield, Further, there is an effect that the manufacturing cost can be reduced.
【００３５】請求項３の発明では、請求項１又は２の発
明において、上記絶縁層をシリコン酸化膜により形成し
たので、欠陥補償の効果が高い。According to the third aspect of the present invention, since the insulating layer is formed of a silicon oxide film in the first or second aspect, the effect of defect compensation is high.
【００３６】請求項４の発明では、請求項１乃至３の何
れかの発明において、上記表面電極をＰｔにより形成し
たので、酸化膜質改善処理の温度をデバイス形成プロセ
スにマッチングさせることができる。According to a fourth aspect of the present invention, in any one of the first to third aspects, since the surface electrode is formed of Pt, the temperature of the oxide film quality improvement processing can be matched with the device forming process.
【００３７】請求項５の発明では、請求項１乃至４の何
れかの発明において、上記強電界ドリフト層を多孔質多
結晶シリコン層により形成したので、酸素イオンによる
欠陥補償効果がより高くなる。According to a fifth aspect of the present invention, since the strong electric field drift layer is formed of a porous polycrystalline silicon layer in any one of the first to fourth aspects of the present invention, a defect compensation effect by oxygen ions is further enhanced.
【図１】本発明の実施形態１のプロセス説明図である。FIG. 1 is an explanatory diagram of a process according to a first embodiment of the present invention.
【図２】本発明の実施形態２のプロセス説明図である。FIG. 2 is an explanatory view of a process according to a second embodiment of the present invention.
【図３】基本となる電界放射型電子源の概略断面図であ
る。FIG. 3 is a schematic sectional view of a basic field emission electron source.
【図４】同上の特性原理説明図である。FIG. 4 is an explanatory view of a characteristic principle of the above.
【図５】同上の電子放出機構の説明図である。FIG. 5 is an explanatory diagram of an electron emission mechanism according to the embodiment.
１ ｎ形シリコン基板 ２ オーミック電極 ３ 多結晶シリコン層 ４ 多孔質多結晶シリコン層 ６ 強電界ドリフト層 ７ 表面電極 １０ 電界放射型電子源 REFERENCE SIGNS LIST 1 n-type silicon substrate 2 ohmic electrode 3 polycrystalline silicon layer 4 porous polycrystalline silicon layer 6 strong electric field drift layer 7 surface electrode 10 field emission electron source
Claims (5)
により表面電極を形成し、該表面電極を形成した後、高
温、酸素雰囲気中で表面電極の触媒作用により上記強電
界ドリフト層の酸化膜からなる絶縁層の酸化膜質改善処
理を施すことを特徴とする電界放射型電子源の製造方
法。A surface electrode is formed on a strong electric field drift layer from a material having a catalytic action, and after the surface electrode is formed, the strong electric field drift layer is oxidized by a catalytic action of the surface electrode in a high-temperature, oxygen atmosphere. A method for manufacturing a field emission type electron source, comprising performing an oxide film quality improvement process on an insulating layer formed of a film.
り表面電極を形成し、該表面電極を形成した後、高温、
酸素雰囲気中で表面電極の触媒作用により半導体層を酸
化して強電界ドリフト層を形成する同時に強電界ドリフ
ト層の酸化膜からなる絶縁層を形成し、且つ該絶縁層の
酸化膜質改善処理を施すことを特徴とする電界放射型電
子源の製造方法。2. A method of forming a surface electrode on a surface of a semiconductor layer by using a material having a catalytic action, and forming the surface electrode at a high temperature.
A semiconductor layer is oxidized by a catalytic action of a surface electrode in an oxygen atmosphere to form a strong electric field drift layer. At the same time, an insulating layer made of an oxide film of the strong electric field drift layer is formed, and an oxide film quality improving treatment of the insulating layer is performed. A method for manufacturing a field emission type electron source.
たことを特徴とする請求項１又は２記載の電界放射型電
子源の製造方法。3. The method according to claim 1, wherein the insulating layer is formed of a silicon oxide film.
特徴とする請求項１乃至３の何れか記載の電界放射型電
子源の製造方法。4. The method for manufacturing a field emission type electron source according to claim 1, wherein said surface electrode is formed of Pt.
コン層により形成したことを特徴とする請求項１乃至４
の何れか記載の電界放射型電子源の製造方法。5. The method according to claim 1, wherein said strong electric field drift layer is formed of a porous polycrystalline silicon layer.
The method for manufacturing a field emission electron source according to any one of the above.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29595799A JP3478206B2 (en) | 1999-10-18 | 1999-10-18 | Method for manufacturing field emission electron source |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29595799A JP3478206B2 (en) | 1999-10-18 | 1999-10-18 | Method for manufacturing field emission electron source |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001118499A true JP2001118499A (en) | 2001-04-27 |
| JP3478206B2 JP3478206B2 (en) | 2003-12-15 |
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ID=17827295
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|---|---|---|---|
| JP29595799A Expired - Fee Related JP3478206B2 (en) | 1999-10-18 | 1999-10-18 | Method for manufacturing field emission electron source |
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| Country | Link |
|---|---|
| JP (1) | JP3478206B2 (en) |
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- 1999-10-18 JP JP29595799A patent/JP3478206B2/en not_active Expired - Fee Related
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| Publication number | Publication date |
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| JP3478206B2 (en) | 2003-12-15 |
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