JP2000298452A - Control method for plasma display panel and display device using this method - Google Patents

Control method for plasma display panel and display device using this method

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Publication number
JP2000298452A
JP2000298452A JP2000084379A JP2000084379A JP2000298452A JP 2000298452 A JP2000298452 A JP 2000298452A JP 2000084379 A JP2000084379 A JP 2000084379A JP 2000084379 A JP2000084379 A JP 2000084379A JP 2000298452 A JP2000298452 A JP 2000298452A
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Japan
Prior art keywords
line
sub
field
cell
during
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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JP2000084379A
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Japanese (ja)
Inventor
Yoshiharu Chikazawa
美治 近澤
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Technicolor SA
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Thomson Multimedia SA
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Publication of JP2000298452A publication Critical patent/JP2000298452A/en
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
    • G09G3/293—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for address discharge
    • G09G3/2937—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for address discharge being addressed only once per frame
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2018—Display of intermediate tones by time modulation using two or more time intervals
    • G09G3/2022—Display of intermediate tones by time modulation using two or more time intervals using sub-frames
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2018—Display of intermediate tones by time modulation using two or more time intervals
    • G09G3/2022—Display of intermediate tones by time modulation using two or more time intervals using sub-frames
    • G09G3/2025—Display of intermediate tones by time modulation using two or more time intervals using sub-frames the sub-frames having all the same time duration
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
    • G09G3/292—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for reset discharge, priming discharge or erase discharge occurring in a phase other than addressing
    • G09G3/2927—Details of initialising
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
    • G09G3/293—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for address discharge
    • G09G3/2935—Addressed by erasing selected cells that are in an ON state
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G09G2310/0216—Interleaved control phases for different scan lines in the same sub-field, e.g. initialization, addressing and sustaining in plasma displays that are not simultaneous for all scan lines
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G09G2310/0218—Addressing of scan or signal lines with collection of electrodes in groups for n-dimensional addressing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0238—Improving the black level
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0261—Improving the quality of display appearance in the context of movement of objects on the screen or movement of the observer relative to the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0266—Reduction of sub-frame artefacts
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0271—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping
    • G09G2320/0276—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/0673—Adjustment of display parameters for control of gamma adjustment, e.g. selecting another gamma curve
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
    • G09G3/292—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for reset discharge, priming discharge or erase discharge occurring in a phase other than addressing
    • G09G3/2925—Details of priming

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of Gas Discharge Display Tubes (AREA)
  • Transforming Electric Information Into Light Information (AREA)

Abstract

PROBLEM TO BE SOLVED: To increase contrast and to prevent blot by ordinary animation by limiting erasing to a cell in which radiation is not required and a cell for next sub-field out of each sub-field. SOLUTION: Erasing operation E supplying a control signal in the reverse direction of a control signal for priming P is realized at the beginning of sub- fields 2, 3 and the like. After erasing a cell to be light-emitted is loaded or addressed A. During a survival time of a sub-field, AC voltage is applied so that a cell in which a sub-field is addressed keeps the occurrence of light. In order to form a luminance level required for each cell, a cell is started from a sub-field 1, light-emission is performed in successive sub-fields, but when the maximum luminance is not generated, it is eliminated during the last field. Erasing E1 is required for only a cell in which light must not be generated in the present sub-field and the next sub-field.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【発明が属する技術分野】本発明はプラズマ表示パネル
を制御する方法及びこの方法を使用する表示装置に関す
る。[0001] 1. Field of the Invention [0002] The present invention relates to a method for controlling a plasma display panel and a display device using the method.

【０００２】[0002]

【従来の技術】テレビジョン画像の表示のような画像の
再生に使用するプラズマ表示パネル（ＰＤＰｓ）は、Ａ
Ｃタイプか若しくはＤＣタイプのいずれかである。簡略
化のため、ＡＣタイプのみをここでは説明する。ＰＤＰ
は、第１の対の平行電極が結合する透明な前面基板と、
この第１の対に垂直な第２の対の平行電極が結合する背
面基板とを有する。前面基板と背面基板との間の間隔
は、例えばキセノン及びネオンの混合のようなガスを含
むセルに分割されており、このガスは電極に印加される
電圧によって選択的に、且つ正しく励起されるとき紫外
線（ＵＶ）を発生し、このＵＶはセルの壁に置かれる蛍
光体を励起し可視光を発生する。2. Description of the Related Art Plasma display panels (PDPs) used for reproducing an image such as a television image display are of the following type.
Either C type or DC type. For simplicity, only the AC type will be described here. PDP
Comprises: a transparent front substrate to which a first pair of parallel electrodes is coupled;
A back substrate to which a second pair of parallel electrodes perpendicular to the first pair is coupled. The spacing between the front and back substrates is divided into cells containing a gas, such as a mixture of xenon and neon, which is selectively and correctly excited by the voltage applied to the electrodes. Sometimes it generates ultraviolet light (UV), which excites phosphors placed on the cell walls to generate visible light.

【０００３】ＰＤＰは平板形であり、且つ陰極管（ＣＲ
Ｔ）及び液晶表示装置（ＬＣＤ）のような現在の表示装
置の領域よりも広い領域で実現され得るため、ＰＤＰは
画像を表示するための良い解決策である。画像の品質は
十分に満足するものではあるが、そのコントラストは改
善され得る。更に、決まった状況において動画は好まし
くないにじんだ輪郭を現す。A PDP is a flat plate and has a cathode tube (CR).
TDP is a good solution for displaying images because it can be implemented in a larger area than current display devices such as T) and liquid crystal display (LCD). Although the quality of the image is quite satisfactory, its contrast can be improved. Furthermore, in certain situations, the moving picture shows an undesirable blurred contour.

【０００４】低いコントラストは、各セルの中のガスの
制御された励起に対応しない期間中に望ましくない光の
放射から到来する。[0004] Low contrast comes from unwanted light emission during periods that do not correspond to controlled excitation of the gas in each cell.

【０００５】事実上、現在のＰＤＰの制御は以下の通り
に実現される。[0005] In fact, the control of the current PDP is realized as follows.

【０００６】全てのセルの壁に電荷を発生することを目
的として各フィールドの始めにセルのプライミングが実
現され、この場合既に電荷を有するセルは状態を変化せ
ず電荷を有さないセルは電荷を蓄積する。[0006] Priming of cells is realized at the beginning of each field with the aim of generating charge on the walls of all cells, where cells that already have charge do not change state and cells that do not have charge have a charge. To accumulate.

【０００７】その後、これらの壁電荷を除去するために
全てのセルは消去される。プライミング及び消去の繰り
返しは壁電荷を除去するために必要であることに注意す
べきである。実際、プライミングが消去の前に実施され
ないとき、電荷を有さないセルは消去中に壁電荷を蓄積
する。Thereafter, all the cells are erased to remove these wall charges. It should be noted that repeated priming and erasing is necessary to remove wall charges. In fact, when priming is not performed before erasing, cells without charge accumulate wall charges during erasing.

【０００８】消去後、光を放出すべきセルがアドレスさ
れる。アドレッシングはプライミングと同様の動作、即
ちセルの壁に電荷が形成される動作、である。しかしな
がら、このアドレッシングはプライミングよりも短い区
間を有し、また当然のことながら選択的である。例え
ば、プライミングの区間は約１５μｓに対してアドレッ
シングの区間は一般的に３μｓよりも小さい。After erasure, the cells to emit light are addressed. Addressing is an operation similar to priming, that is, an operation in which charges are formed on cell walls. However, this addressing has a shorter section than priming and is, of course, optional. For example, the priming section is about 15 μs whereas the addressing section is generally less than 3 μs.

【０００９】プライミング、消去及びアドレッシングの
ために前面基板と背面基板との間に電圧が形成され、こ
のときのパルスはＤＣタイプである。A voltage is generated between the front substrate and the rear substrate for priming, erasing and addressing, and the pulse at this time is of a DC type.

【００１０】アドレッシング期間後、持続電圧がアドレ
ッシングセルに印加される。この持続電圧は、一般的に
１００乃至５００ｋＨｚを有する高周波数の交流（Ａ
Ｃ）である。この持続電圧は前面電極と背面電極との間
か若しくはパネルの片側で二つの平行な電極との間のい
ずれかで印加され得る。After the addressing period, a sustaining voltage is applied to the addressing cell. This sustained voltage is typically a high frequency alternating current (A) having 100-500 kHz.
C). This sustaining voltage can be applied either between the front and back electrodes or between two parallel electrodes on one side of the panel.

【００１１】この持続期間中でのみセルは使用可能な光
を放射する。[0011] Only during this duration does the cell emit usable light.

【００１２】プライミング期間中及び消去期間中、全て
のセルは光を放射する。この光は選択されないセルにと
っては望ましくない。このことは、プラズマ表示パネル
から得られる比較的乏しいコントラストの説明となる。During priming and erasing, all cells emit light. This light is undesirable for unselected cells. This accounts for the relatively poor contrast obtained from plasma display panels.

【００１３】各フィールドは例えばサブフィールドに分
割され、このサブフィールドは最初のサブフィールドか
ら最後のサブフィールドまでに減少する長さを有する。
各セルは、ピクセルの輝度が活性サブフィールドの時間
の追加に対応するように選択されるサブフィールド中に
光を放射する。Each field is divided, for example, into subfields, which have a decreasing length from the first subfield to the last subfield.
Each cell emits light during a subfield where the brightness of the pixels is selected to correspond to the additional time of the active subfield.

【００１４】図１に示されるように各サブフィールドの
持続期間の長さは、最初のサブフィールドが最下位のビ
ット（ＬＳＢ）に対応し、最後のサブフィールドが最上
位のビット（ＭＳＢ）に対応するように示される。従っ
て、このサブフィールドの持続期間の区間が１のとき、
次に続くサブフィールドの区間は夫々２、４、８、１
６、３２、６４及び１２８であり、これらは夫々第２、
第３、第４、第５、第６、第７及び第８のサブフィール
ドに対応する。従って各輝度が８ビットの数で表される
ような２５６レベルの輝度を得ることが可能である。As shown in FIG. 1, the duration of each subfield is such that the first subfield corresponds to the least significant bit (LSB) and the last subfield is the most significant bit (MSB). Indicated as corresponding. Therefore, when the duration section of this subfield is 1,
The subsequent subfield sections are 2, 4, 8, 1 and 2, respectively.
6, 32, 64 and 128, each of which is a second,
It corresponds to the third, fourth, fifth, sixth, seventh and eighth subfields. Therefore, it is possible to obtain 256 levels of luminance such that each luminance is represented by an 8-bit number.

【００１５】時間と光の発生とのこの分布は、決まった
状況において図２で説明されるような欠陥を形成し得
る。This distribution of time and light generation can, in certain circumstances, create defects as described in FIG.

【００１６】図２では、同一ラインの四つの順次のピク
セルａ、ｂ、ｃ及びｄが表される。これらのピクセルは
横座標に示され、又、時間は縦座標に示される。In FIG. 2, four sequential pixels a, b, c and d on the same line are represented. These pixels are shown on the abscissa and the time is shown on the ordinate.

【００１７】この簡略化された例では、各フィールド
（又はフレーム）は四つのビット、即ち持続期間が夫々
１、２、４及び８である四つのサブフィールドを有す
る。第１のフィールド（Ｆ１）中、ピクセルａ及びｂの
輝度は８であり、これはつまり四番目のサブフィールド
のみが光を放射し一番目から三番目のサブフィールドは
暗いままであることを意味する。ピクセルｃ及びｄは、
同じフィールドＦ１中で輝度７を有する。従って、最初
の三つのサブフィールドは活性化しており、最後のサブ
フィールドは７＝０１１１であるため光を放射しない。
第２のフィールドＦ ２中にピクセルａ及びｂは輝度を８
に維持し、ピクセルｃはその輝度を７から８に増加し、
ピクセルｄは輝度を７に維持するような動きがある場合
を考える。これらの状況ではビューアの目ｅは、輝度が
８から７に減少するときに動く輪郭の動きを追う。この
追う動作は、図２に斜光ライン１０、１２、１４で表さ
れる。斜光ライン１０はブラックラインに対応し、輝度
はこのライン１０から平行なライン１２及び１４に夫々
増加する。当然のことながら、目はブラックラインでは
なく非常に好ましくない比較的暗い又はにじんだ輪郭を
見る。In this simplified example, each field
(Or frame) have four bits, each of duration
Has four subfields, 1, 2, 4 and 8
You. The first field (F1), Pixels a and b
The brightness is 8, which is the fourth subfield
Only emits light and the first to third subfields
It means staying dark. Pixels c and d are
Same field F1It has a luminance of 7 in. So first
The three subfields are activated and the last subfield
The field does not emit light because 7 = 0111.
Second field F 2Pixels a and b have a brightness of 8
And pixel c increases its brightness from 7 to 8,
Pixel d has a motion that maintains the brightness at 7
think of. Under these circumstances, the viewer's eyes e
Follow the movement of the contour that moves as it decreases from 8 to 7. this
The following operation is represented by oblique light lines 10, 12, and 14 in FIG.
It is. The oblique light line 10 corresponds to the black line,
From this line 10 to parallel lines 12 and 14 respectively
To increase. Naturally, the eyes are on the black line
Very unpleasant relatively dark or blurred contours
to see.

【００１８】[0018]

【発明が解決しようとする課題】本発明は上記欠陥を除
去する、即ちコントラストを増加し図２で説明された通
り決まった動画像によるにじみを防止する。SUMMARY OF THE INVENTION The present invention eliminates the above-mentioned defects, that is, increases the contrast and prevents blurring due to a fixed moving image as described with reference to FIG.

【００１９】[0019]

【課題を解決するための手段】本発明によると各サブフ
ィールド中、対応するサブフィールドで放射が必要とさ
れないセルと、同フィールドにおける次のサブフィール
ド用のセルとに消去は限られる。つまり、本発明は全て
のセル用の消去ではなく選択的な消去を提供する。従っ
て、消去による不必要な光の放射は制限されコントラス
トは改善される。According to the present invention, in each subfield, erasure is limited to a cell that does not require radiation in the corresponding subfield and a cell for the next subfield in the same subfield. That is, the present invention provides selective erasure rather than erasure for all cells. Thus, unnecessary light emission due to erasure is limited and contrast is improved.

【００２０】更に、輝度が増加するとき時間による光の
分布が最初のサブフィールドから最後のサブフィールド
まで規則的に増加する。つまり輝度が１ユニット増加す
ると活性されている順次のサブフィールドの数は１増加
する。従って、本発明では、光の発生は必ず最初のサブ
フィールドから始まるため図１及び図２で説明された実
施例で見られるにじみは防止される。Further, when the luminance increases, the distribution of light with time increases regularly from the first subfield to the last subfield. That is, when the luminance increases by one unit, the number of activated sequential subfields increases by one. Therefore, in the present invention, since the light generation always starts from the first subfield, the bleeding seen in the embodiment described in FIGS. 1 and 2 is prevented.

【００２１】有利には、アドレッシングは消去と同時に
実施される。従って、各サブフィールドの制御部分の区
間は減少される。[0021] Advantageously, the addressing is performed simultaneously with the erasure. Therefore, the section of the control part of each subfield is reduced.

【００２２】実施例の中では、全てのサブフィールドは
同じ区間を有する。従って、ＰＤＰの制御は簡略化され
る。In an embodiment, all subfields have the same interval. Therefore, control of the PDP is simplified.

【００２３】[0023]

【発明の実施の形態】本発明の他の特徴及び利点は、添
付図と関連して説明する特定の実施例で明白にされる。BRIEF DESCRIPTION OF THE DRAWINGS Other features and advantages of the invention will become apparent in the specific embodiments described with reference to the accompanying drawings, in which: FIG.

【００２４】図３に示されるように、第１のサブフィー
ルドの始め、即ちサブフィールド１の始め、ではコンデ
ンサを有する全てのセルは全てのセルが同じ電荷を有す
るように制御信号を負荷する。この動作をプライミング
Ｐと称する。サブフィールド１でのプライミング後、全
てのセルは放電される。プライミングＰ用の制御信号と
逆方向に制御信号を供給するこの動作は、消去Ｅと称さ
れる。消去動作Ｅはその後の全てのサブフィールド２、
３等の始めに実現される。As shown in FIG. 3, at the beginning of the first subfield, ie, at the beginning of subfield 1, all cells with capacitors load control signals so that all cells have the same charge. This operation is called priming P. After priming in subfield 1, all cells are discharged. This operation of supplying a control signal in the opposite direction to the control signal for priming P is called erasure E. Erasing operation E is performed for all subsequent subfields 2,
It is realized at the beginning of the third magnitude.

【００２５】消去後、及び各サブフィールド中、発光
（光を発生）されるべきセルは負荷されるか又はアドレ
ッシングＡされる。サブフィールドの残存時間中、図１
を参照に説明されるようにサブフィールドのこの残存時
間中にもアドレスされたセルが光の発生を維持するよう
にＡＣ電圧が印加される。After erasure, and during each subfield, the cells to be illuminated (generated) are loaded or addressed A. During the remaining time of the subfield, FIG.
AC voltage is applied so that the addressed cell maintains light generation during this remaining time of the subfield as described with reference to FIG.

【００２６】本発明によると各セルのために必要な輝度
レベルを形成するためにセルは、サブフィールド１から
始まり順次のサブフィールド中に発光されるが、最大の
輝度を発生しないときは最後のサブフィールド中に除去
される。この実施例では、現在のサブフィールド及び次
のサブフィールド中に光を発生してはならないセルのみ
に消去Ｅ１は必要である。従って、このような選択され
たセルのために消去Ｅを、ＰＤＰの他のセルのためにア
ドレッシングＡを同時に実施することが可能である。In accordance with the present invention, the cells are illuminated during successive subfields starting from subfield 1 to form the required brightness level for each cell, but the last when no maximum brightness occurs. Removed during subfield. In this embodiment, erasing only the cells that should not generate light in the current sub-field and in the next subfield E 1 is required. Therefore, it is possible to simultaneously perform erase E for such selected cells and addressing A for other cells of the PDP.

【００２７】この特性は、Ｅ１及びＡが同じ時間セグメ
ントで表される図４に示される。This property is shown in FIG. 4 where E 1 and A are represented in the same time segment.

【００２８】ここで、従来技術と比較して消去及びアド
レッシングに使う時間が減少し得たとしても、各ピクセ
ル及びセルがサブフィールド１から始まる連続サブフィ
ールド中にのみ光を発生することが可能であることは、
輝度の総数若しくは発生することが可能なグレイレベル
を（従来技術と比較して）減少し得るといったことに注
意すべきである。このため、ＰＤＰの制御の設計は輝度
レベルの数が最大となるように成されるべきである。以
下では、この最大化を達成する幾つかの実施例が説明さ
れる。しかしながら、グレイレベルの数が従来技術と比
較して小さくとも、本発明によるＰＤＰはこの欠点を補
填する重要な利点を有する。その一つの利点は、本発明
によるＰＤＰの消去期間の総区間が従来のＰＤＰの総区
間よりもはるかに小さいため、画像のコントラストが改
善される点である。更に図１３を参照にして以降に説明
するように、図２を参照にして上記に説明された従来の
ＰＤＰに反して、サブフィールド１及び連続サブフィー
ルドのみからの光の発生はにじみが全く起らないといっ
た利点を提供する。Here, even if the time used for erasing and addressing can be reduced compared to the prior art, each pixel and cell can emit light only during successive subfields starting from subfield 1. There is something
It should be noted that the total number of luminances or the gray levels that can be generated can be reduced (compared to the prior art). For this reason, the design of the control of the PDP should be such that the number of brightness levels is maximized. In the following, some embodiments for achieving this maximization will be described. However, even though the number of gray levels is small compared to the prior art, the PDP according to the invention has significant advantages to compensate for this disadvantage. One advantage is that the total period of the erasing period of the PDP according to the present invention is much smaller than the total period of the conventional PDP, so that the image contrast is improved. Further, as described below with reference to FIG. 13, contrary to the conventional PDP described above with reference to FIG. 2, the generation of light from only the subfield 1 and the continuous subfield is completely blurred. It offers the advantage of not having to.

【００２９】一つのラインの制御を表す図５に示される
実施例では、全てのサブフィールドは同じ区間を有す
る。本例では、Ｐはプライミングを意味し、Ｅ１はサブ
フィールド１のための同時に起こる消去及び（異なるセ
ル用の）アドレッシングを意味し、又Ｓ１はこのサブフ
ィールド１のための持続期間である。より一般的には、
Ｅｎはサブフィールドｎのための同時に起こる消去及び
アドレッシングを意味し、Ｓｎはこのサブフィールドｎ
のための持続を意味する。In the embodiment shown in FIG. 5, which represents the control of one line, all subfields have the same interval. In this example, P means priming, E 1 means simultaneous erasure and addressing (for different cells) for subfield 1, and S1 is the duration for this subfield 1. More generally,
En means simultaneous erase and addressing for subfield n, and Sn means this subfield n
Meaning lasting for.

【００３０】持続期間の区間が一つのサブフィールドか
ら次のサブフィールドまで増加する（二倍になる）従来
のＰＤＰと比較すると、制御はより容易である。Control is easier as compared to a conventional PDP in which the duration of the duration increases (doubles) from one subfield to the next.

【００３１】図６は順次のラインの制御を表す図であ
る。本例では、ラインの数は４８０であり、順次のライ
ンの制御間で干渉が入らないようにＥ１、Ｅ２…の期間
は早目に分配されるべきである。本例では、プライミン
グＰは全てのセルに同時に実施されＥ１、Ｅ２、Ｅ３…
の期間は重複することなく一つのラインから次のライン
へ連続的である。つまり各ラインはそのラインの前のラ
インに関してＥ１期間の区間に等しい遅延の後から始ま
る。FIG. 6 is a diagram showing sequential line control. In this example, the number of lines is 480, and the periods of E 1 , E 2 ... Should be distributed earlier so that no interference occurs between the control of the sequential lines. In this example, the priming P is performed on all cells at the same time and E 1 , E 2 , E 3 .
Are continuous from one line to the next without overlapping. That is, each line begins after a delay equal to the interval of the previous E 1 period regarding line of the line.

【００３２】一つのラインから他のラインまでのこの遅
延は、プライミングＰの終わりとＥ １期間の始めとの間
で「一時停止」期間ＳＰ１……ＳＰ４８０を伴う。この
一時停止期間ＳＰｎは最後のライン４８０で最大とな
る。この一時停止期間中は、輝度信号は発生されない。
又、対応する一時停止期間ＳＰ’ｎは各ラインの終わ
り、即ち最後の消去／アドレッシング期間と次のフィー
ルドのプライミングＰの始まりとの間に設けられること
に注意すべきである。この一時停止期間ＳＰ’ｎは最初
のラインで最大であり、最後のラインでゼロに等しくな
る。This delay from one line to another line
Nobu is the end of priming P and E 1Between the beginning of the period
"Pause" period SP1...... SP480Accompanied by this
Suspension period SPnIs the largest at the last line 480
You. During this suspension period, no luminance signal is generated.
Also, the corresponding suspension period SP 'nIs the end of each line
The last erase / addressing period and the next
To be provided between the beginning of the priming P
It should be noted that This suspension period SP 'nIs first
Is the largest on the line and equal to zero on the last line.
You.

【００３３】図７に示される実施例では、一時停止期間
は抑制される。この目的を達成するために、順次のライ
ンのプライミング期間は互い違いに、即ちプライミング
期間が同時に起らないように配列される。より正確には
ライン２のためのプライミング期間Ｐ２は、Ｐ１の終わ
りとＰ２の始めとの間に遅延が無いようにプライミング
期間Ｐ１の直後に表れる。本実施例では、サブフィール
ド１用の消去／アドレッシング期間は、遅延が無いよう
にプライミングの直後に表れる。他のサブフィールド、
即ちサブフィールド２、サブフィールド３等のための消
去／アドレッシングに関して、ラインｎのこの消去／ア
ドレッシングはラインｎ−１のための消去／アドレッシ
ング期間が終わるときに始まるよう互い違いに配列され
る。In the embodiment shown in FIG. 7, the suspension period is suppressed. To this end, the priming periods of successive lines are arranged in a staggered manner, ie such that the priming periods do not occur simultaneously. More priming period P 2 for exactly line 2, appears immediately after the priming period P 1 so that there is no delay between the beginning of the end and P 2 P 1. In the present embodiment, the erase / addressing period for subfield 1 appears immediately after priming so that there is no delay. Other subfields,
That is, with respect to erasure / addressing for subfield 2, subfield 3, etc., this erasure / addressing of line n is staggered to begin at the end of the erasure / addressing period for line n-1.

【００３４】図８はＰＤＰのセルを表す。従来的には、
プラズマ表示パネルは透明な前面基板（図示せず）と、
背面基板（図示せず）とを有する。背面基板は、前面基
板と背面基板との間のスペースを分離する壁を構成する
平行なリブ１３及び１５が設けられる。このスペースは
ネオン及びキセノンのようなガスの混合で充填される。
アドレス電極１６は二つの隣り合うパーティションリブ
１３と１５との間の各スペースに関連する。本例では、
アドレッシング電極１６若しくはライン電極１６は、前
側でリブ１３と１５とを分離するスペースの中間に位置
する。FIG. 8 shows a cell of the PDP. Traditionally,
The plasma display panel includes a transparent front substrate (not shown),
And a back substrate (not shown). The rear substrate is provided with parallel ribs 13 and 15 forming walls separating the space between the front substrate and the rear substrate. This space is filled with a mixture of gases such as neon and xenon.
An address electrode 16 is associated with each space between two adjacent partition ribs 13 and 15. In this example,
The addressing electrode 16 or the line electrode 16 is located in the middle of the space separating the ribs 13 and 15 on the front side.

【００３５】各セルは裏側に電極の結合器１８及び２０
も結合される。これらの電極はリブに垂直である。電極
２０はアドレスに使用され、電極１８及び２０は共にＡ
Ｃ持続電圧の適用に使用される。Each cell has an electrode coupler 18 and 20 on the back side.
Are also combined. These electrodes are perpendicular to the ribs. Electrode 20 is used for addressing and electrodes 18 and 20 are both A
Used for application of C sustained voltage.

【００３６】プライミング、消去及びアドレスのため
に、電極１６と２０との間にＤＣ電圧が形成される。A DC voltage is created between electrodes 16 and 20 for priming, erasing and addressing.

【００３７】図９及び図１０に示されるように、セルＣ
１１、Ｃ１２群、及びＣ２１、Ｃ２ ２群はラインｌ１、
ｌ２、ｌ３群及び列ｃｏｌ１、ｃｏｌ２群のマトリクス
に基づいて配置される。As shown in FIG. 9 and FIG.
11, C 12 groups, and C 21, C 2 2 group lines l 1,
They are arranged based on a matrix of l 2 , l 3 groups and columns col 1 , col 2 groups.

【００３８】ライン１及びサブフィールドｎ用のアドレ
ッシング／消去期間中、アドレッシングパルス３０１が
ライン１上で発生されると同時に、対応するセルＣ１１
が消されるべきときは消去パルス３２１が発生され、若
しくは、対応するセルＣ１２が光を発生されるべきとき
はパルスが発生されない（ゼロパルス３２２）のいずれ
かが各列で生じる。消去パルスは、アドレッシングパル
スと同時に発生され同じ区間、即ち５μｓ、を有する。[0038] During line 1 and addressing / erasing period for subfields n, the addressing pulse 30 1 is generated on line 1 at the same time, the corresponding cells C 11
When is to be erased is generated erase pulses 32 1, or one of the corresponding cell C 12 to the pulse does not occur when it should be generated light (zero pulse 32 2) occurs in each column. The erase pulse is generated at the same time as the addressing pulse and has the same interval, that is, 5 μs.

【００３９】列ｃｏｌ１の消去パルス３２１が出現する
間、ライン１のみがアドレスされ他のラインはアドレス
されないため、消去パルス３２１はセルＣ１１の壁電荷
のみを抑制する。[0039] During the erase pulses 32 1 column col 1 appears, because only the line 1 is other line is addressed is not addressed, the erase pulse 32 1 inhibits only the wall charges of the cells C 11.

【００４０】図８を参照して説明するように、各列電極
ｃｏｌ１及びｃｏｌ２は二つの電極１８及び２０を有す
る。持続期間中、ＡＣ電流がこれらの電極の間に印加さ
れる。ＡＣ電圧は消去／アドレッシングパルスの後に、
対応するサブフィールドの終わりまで印加される。消去
されないセルのみが光を放射する。図１０に示されるよ
うに、消去されたセルＣ１１は暗いままであり、アドレ
スされたセルＣ１２は光を発生する。As described with reference to FIG. 8, each column electrode col 1 and col 2 has two electrodes 18 and 20. During the duration, AC current is applied between these electrodes. AC voltage after erase / addressing pulse,
Applied until the end of the corresponding subfield. Only cells that are not erased emit light. As shown in FIG. 10, the erased cell C 11 remains dark and the addressed cell C 12 emits light.

【００４１】各アドレッシング／消去パルス用の区間が
５μｓであるとき、１フレーム（４８０ライン）用のア
ドレッシング／消去の総区間は各サブフィールドにつき
２．４ｍｓ、即ち１フィールドに５サブフィールドが設
けられるとき各フィールドにつき１２ｍｓである。ＮＴ
ＳＣ標準におけるように１フィールドの区間は１６．７
ｍｓであり、残存持続期間の区間は各フィールドにつき
４．７ｍｓ、即ち各サブフィールドにつき１ｍｓであ
る。When the section for each addressing / erasing pulse is 5 μs, the total section of addressing / erasing for one frame (480 lines) is 2.4 ms per subfield, that is, five subfields are provided in one field. Sometimes it is 12 ms for each field. NT
The interval of one field is 16.7 as in the SC standard.
ms, and the duration of the remaining duration is 4.7 ms for each field, or 1 ms for each subfield.

【００４２】持続時間を最適化するために、図７に示さ
れる実施例を使用することが望ましい。In order to optimize the duration, it is desirable to use the embodiment shown in FIG.

【００４３】更に、可能な輝度レベルの数が制限される
ため、この数を増加することが好ましい。この目的のた
め、ラインが二組に分割される従来の二重走査方法を使
用することが可能である。例えば、４８０ラインあると
き第１の対は１から２４０までのラインを有し、第２の
対は２４１から４８０までのラインを有する。Furthermore, it is preferable to increase this number, since the number of possible brightness levels is limited. For this purpose, it is possible to use a conventional double scanning method in which the lines are split into two sets. For example, when there are 480 lines, the first pair has lines from 1 to 240, and the second pair has lines from 241 to 480.

【００４４】この二重走査方法によって、二対のライン
は同時にアドレスされる。つまり、ライン１はライン２
４１と同時にアドレスされ、ライン２はライン２４２と
同時にアドレスされ、…ライン２４０はライン４８０と
同時にアドレスされる。With this double scan method, two pairs of lines are addressed simultaneously. That is, line 1 is line 2
41 is addressed simultaneously, line 2 is addressed simultaneously with line 242,... Line 240 is addressed simultaneously with line 480.

【００４５】アドレッシング／消去期間と比較して持続
期間の区間を更に増加するために、重複期間中もライン
をアドレスすることが可能である。本実施例では、一列
につき幾つか、例えば５つの電極を設けることが必要で
ある。図１１に示されるように、５つの電極は図９のｃ
ｏｌ１又はｃｏｌ２に対応する。これらの電極はＡ１乃
至Ａ５と参照される。To further increase the duration of the duration compared to the addressing / erase period, it is possible to address the line during the overlap period. In this embodiment, it is necessary to provide several, for example, five electrodes per row. As shown in FIG. 11, the five electrodes are c in FIG.
ol 1 or col 2 . These electrodes are referred to as A 1 to A 5.

【００４６】セルＣ１１を消去するためには、５μｓの
パルス３８（図１２参照）がライン１に印加されると同
時に同じ区間のパルス３９が電極Ａ１に印加される。[0046] To erase the cell C 11 is (see FIG. 12) pulses 38 of 5μs pulse 39 of the same section at the same time is applied to the line 1 is applied to the electrodes A 1.

【００４７】セルＣ２１（第２のラインの第１の列上に
あるセル）を消去するためには、ライン２はライン１に
印加されたパルス３８の始まりの１μｓ後に始まるパル
ス４０でアドレスされ、更にこのパルス４０も５μｓの
区間を有する。同時に、５μｓの区間のパルス４２も列
ｃｏｌ１の列電極Ａ２に印加される。Ｃ２１が発光され
てはならないとき、パルス４２は電極Ａ２に印加されな
い。To erase cell C 21 (the cell on the first column of the second line), line 2 is addressed with pulse 40 beginning 1 μs after the beginning of pulse 38 applied to line 1 The pulse 40 also has an interval of 5 μs. At the same time, a pulse 42 of 5μs interval is also applied to the column electrodes A 2 column col 1. When C 21 must not emit light, pulse 42 is not applied to electrode A2.

【００４８】ライン２上にパルス４０及び電極Ａ１上に
パルス３９が同時に４μｓ重複するにもかかわらず、こ
の４μｓといった区間はセルを消去するには不十分であ
るためセルＣ２１は消去されない。Although the pulse 40 on the line 2 and the pulse 39 on the electrode A1 overlap at the same time by 4 μs, the interval of 4 μs is not enough to erase the cell, so that the cell C 21 is not erased.

【００４９】本実施例によって、５つのラインをアドレ
スする区間は９μｓである。従って、アドレスの総区間
が１ＴＶフレーム（１／６０ｓ）の区間の約１／１９に
値する４８０×９／５＝８６４μｓであるため、１つの
フィールドを１９のサブフィールドに分割することが可
能である。According to this embodiment, the section for addressing five lines is 9 μs. Accordingly, since the total section of the address is 480 × 9/5 = 864 μs, which is about 1/19 of the section of one TV frame (1 / 60s), one field can be divided into 19 subfields. .

【００５０】二重走査が同時に使用されるとき、１つの
フィールドは３８のサブフィールドに分割され得る。つ
まり、一色につき３８の輝度レベルを有することが可能
である。三色においては、輝度レベルは１１４レベルに
なり得る。When double scanning is used simultaneously, one field can be divided into 38 subfields. That is, it is possible to have 38 luminance levels per color. For the three colors, the luminance level can be 114 levels.

【００５１】一般的に、この輝度レベルの数は十分であ
る。しかしながらこのレベルの数を、画像圧縮のためか
若しくはファクシミリ機又はコンピュータ表示によって
転写される画像の品質を改善するために、従来技術を用
いて増加することは更に可能である。これらの技術はデ
イザリング技法及び誤差拡散方法と称され、従来的にパ
ーソナルコンピュータ（ＰＣｓ）及びＬＣＤｓ（液晶表
示）に使用される。Generally, this number of luminance levels is sufficient. However, it is still possible to increase this number of levels using conventional techniques, either for image compression or to improve the quality of the image transferred by facsimile machine or computer display. These techniques are referred to as dithering techniques and error diffusion methods and are conventionally used for personal computers (PCs) and LCDs (liquid crystal displays).

【００５２】図１３は図２と同様の図であり、ここでは
フィールドＦ１中ピクセルａ及びｂは輝度レベル８を有
し、ピクセルｃ及びｄは輝度レベル７を有する。フィー
ルドＦ２中、ピクセルａ及びｂはその輝度レベルを８に
維持し、ピクセルｃはその輝度レベルを８に増加し、ピ
クセルｄは輝度レベル７を維持する。[0052] Figure 13 is a similar view to FIG. 2, where pixels a and b in fields F 1 is has a luminance level 8, the pixels c and d have the brightness level 7. In the field F 2, pixels a and b maintains its brightness level 8, pixel c increases the brightness level to 8, pixel d maintains the brightness level 7.

【００５３】目がピクセルｂの動きを追うことで、斜ラ
インα、β、γによって示されるように目が輝度８と７
との間で平滑な移行を見るため、にじみは起らない。ラ
インα上では、目は輝度値８を見、目が輝度値８から７
までの移行を見るとき、ラインβ上では輝度値７を見
る。ラインγ上では、輝度値は７のままである。As the eyes follow the movement of the pixel b, the eyes have luminances 8 and 7 as indicated by the oblique lines α, β and γ.
There is no bleeding due to the smooth transition between and. On the line α, the eyes see the luminance value 8 and the eyes
When looking at the transition to, the luminance value 7 is seen on the line β. On the line γ, the luminance value remains 7.

【００５４】実施例では、サブフィールドの区間はγ補
正を実施するために変調される。図１４ではＰＤＰの例
を示し、ここではＰＤＰによって発生する輝度Ｌは曲線
８０に基づいて入力信号Ｉの関数として変化し、この曲
線上では入力信号が値１、２、３、４、５、６、７と直
線的に増加するとき、ＰＤＰ輝度は夫々１、１＋１＝
２、１＋１＋２＝４、１＋１＋２＋３＝７、１＋１＋２
＋３＋４＝１１、１＋１＋２＋３＋４＋５＝１６、１＋
１＋２＋３＋４＋５＋６＋＝２２の値を有する。In the embodiment, the section of the subfield is modulated in order to perform γ correction. FIG. 14 shows an example of a PDP, in which the luminance L generated by the PDP changes as a function of the input signal I based on a curve 80, on which the input signal has the values 1, 2, 3, 4, 5,. When increasing linearly to 6 and 7, the PDP luminance is 1, 1 + 1 =
2, 1 + 1 + 2 = 4, 1 + 1 + 2 + 3 = 7, 1 + 1 + 2
+ 3 + 4 = 11, 1 + 1 + 2 + 3 + 4 + 5 = 16, 1+
It has a value of 1 + 2 + 3 + 4 + 5 + 6 + = 22.

【００５５】この場合サブフィールド１では、持続期間
は区間 ｔｏを有し、サブフィールド２乃至７は夫々ｔ
ｏ、２ｔｏ、３ｔｏ、４ｔｏ、５ｔｏ及び６ｔｏを有す
る。In this case, in subfield 1, the duration has a section to, and subfields 2 to 7 each have a duration of t.
o, 2to, 3to, 4to, 5to and 6to.

【図面の簡単な説明】[Brief description of the drawings]

【図１】従来のプラズマ表示パネルの制御に対応する図
である。FIG. 1 is a diagram corresponding to control of a conventional plasma display panel.

【図２】従来のＰＤＰの特性を幾つか示す図である。FIG. 2 is a diagram showing some characteristics of a conventional PDP.

【図３】従来のＰＤＰの動作を説明する図である。FIG. 3 is a diagram illustrating the operation of a conventional PDP.

【図４】図３と同様であり、本発明によるＰＤＰの動作
を示す図である。FIG. 4 is a diagram similar to FIG. 3, showing the operation of the PDP according to the present invention.

【図５】図１と同様であり、本発明によるＰＤＰの動作
を説明する図であるFIG. 5 is the same as FIG. 1 and illustrates the operation of the PDP according to the present invention.

【図６】図５と同様であるが、本発明の他の実施例を示
す図である。FIG. 6 is a view similar to FIG. 5, but showing another embodiment of the present invention.

【図７】図５と同様であるが、本発明の他の実施例を示
す図である。FIG. 7 is a view similar to FIG. 5, but showing another embodiment of the present invention.

【図８】結合する電極と共に示されるＰＤＰの一つのセ
ル及びその電極の制御手段を示す図である。FIG. 8 shows one cell of the PDP shown with the electrodes to be coupled and control means for the electrodes.

【図９】本発明によるＰＤＰの動作を説明する図であ
る。FIG. 9 is a diagram illustrating the operation of the PDP according to the present invention.

【図１０】本発明によるＰＤＰの動作を説明する図であ
る。FIG. 10 is a diagram illustrating the operation of the PDP according to the present invention.

【図１１】本発明の実施例のためのセルの幾つかの素子
を示す図である。FIG. 11 illustrates some elements of a cell for an embodiment of the present invention.

【図１２】図１１の実施例のための幾つかの制御信号を
示す図である。FIG. 12 shows some control signals for the embodiment of FIG. 11;

【図１３】図２と同様の図であり、従来技術に対する本
発明の利点を示す図である。FIG. 13 is a view similar to FIG. 2, illustrating the advantages of the present invention over the prior art.

【図１４】本発明の更なる面を説明するために使用され
る図である。FIG. 14 is a diagram used to explain a further aspect of the present invention.

【符号の説明】[Explanation of symbols]

１、２、３ サブフィールド １０ ブラックライン １２、１４ 斜光ライン ３８、３９、４０、４２ パルス 1, 2, 3 Subfield 10 Black line 12, 14 Oblique line 38, 39, 40, 42 Pulse

Claims (9)

【特許請求の範囲】[Claims] 【請求項１】 各フィールドが複数のサブフィールドに
分割され、上記各サブフィールド期間はアドレッシング
期間を有し、対応する上記サブフィールド中に光を発生
するべきＰＤＰのセルで上記アドレッシング期間中に電
荷が形成され、上記光の発生は残りの上記サブフィール
ドの間に持続電圧によって得られる、プラズマ表示パネ
ル制御方法であって、 上記各セルは、最初の上記サブフィールドから始まりア
ドレスされた順次のサブフィールドでのみ光を発生し、
上記各サブフィールド中の消去は対応する上記サブフィ
ールドの間及び同フィールドの残りの上記サブフィール
ド中に上記光が発生されるべきでない上記セルに制限さ
れることを特徴とする方法。1. Each field is divided into a plurality of sub-fields, each of said sub-field periods having an addressing period, and a cell of a PDP to emit light during a corresponding said sub-field is charged during said addressing period. Wherein the generation of light is obtained by a sustained voltage during the remaining sub-fields, wherein each cell is addressed sequentially starting from the first sub-field. Emits light only in the field,
A method according to any of the preceding claims, wherein erasure during each of said subfields is restricted to said cells where said light should not be generated during a corresponding said subfield and during the remaining subfields of the same field. 【請求項２】 上記各サブフィールド中、上記アドレッ
シング及び上記消去は同時に起ることを特徴とする請求
項１記載の方法。2. The method of claim 1, wherein during each of the subfields, the addressing and the erasure occur simultaneously. 【請求項３】 上記サブフィールドは略同じ区間を有す
ることを特徴とする請求項１又は２記載の方法。3. The method according to claim 1, wherein the subfields have substantially the same interval. 【請求項４】 上記各フィールドの最初の上記サブフィ
ールド中にプライミングが実施され、上記各フィールド
に対して一つのラインの上記プライミングは前のライン
の上記プライミングの終わりから始まることを特徴とす
る請求項１乃至３のうちいずれか一項記載の方法。4. The method of claim 1 wherein priming is performed during the first of said subfields of each of said fields, said priming of one line for each of said fields beginning at the end of said priming of a previous line. Item 4. The method according to any one of Items 1 to 3. 【請求項５】 上記プライミングは上記各サブフィール
ドの最初に実施され、上記各フィールドに対して全ての
ラインの上記プライミングは同時に起ることを特徴とす
る請求項１乃至３のうちいずれか一項記載の方法。5. The method according to claim 1, wherein the priming is performed at the beginning of each of the sub-fields, and the priming of all the lines occurs simultaneously for each of the fields. The described method. 【請求項６】 上記ラインは対に分割され、第１及び第
２の対は同時に制御されることを特徴とする請求項１乃
至５のうちいずれか一項記載の方法。6. The method according to claim 1, wherein the lines are divided into pairs, and the first and second pairs are controlled simultaneously. 【請求項７】 各列はＮ個の電極によって制御され、二
つの順次のラインのアドレッシングパルスは区間Ｔを有
し、二つの順次のラインの二番目のラインを制御するパ
ルスの始めは前のラインを制御するパルスの始めの区間
Ｔ／Ｎ後に始まり、一つのラインは上記Ｎ列電極の一つ
に関連し、必要であればこの上記Ｎ列電極上に対応する
ラインのパルスと同時に消去パルスが印加され、数Ｎは
一つのライン上のアドレッシングパルスと前のラインに
対応する列電極上の消去パルスとの重複期間が消去を実
施するには不十分なように選択されることを特徴とする
請求項１乃至６のうちいずれか一項記載の方法。7. Each column is controlled by N electrodes, the addressing pulse of two successive lines has a duration T, and the beginning of the pulse controlling the second line of the two successive lines starts with the previous one. Beginning after the first interval T / N of the pulse controlling the line, one line is associated with one of the N column electrodes and, if necessary, an erase pulse at the same time as the pulse of the corresponding line on this N column electrode. And the number N is selected such that the overlap period between the addressing pulse on one line and the erasing pulse on the column electrode corresponding to the previous line is not sufficient to perform erasing. The method according to any one of claims 1 to 6. 【請求項８】 上記サブフィールドの区間はγ補正を実
施するために変調されることを特徴とする請求項１乃至
７のうちいずれか一項記載の方法。8. The method according to claim 1, wherein the subfield interval is modulated to perform gamma correction. 【請求項９】 上記プラズマ表示パネルはＡＣタイプで
あることを特徴とする請求項１乃至８のうちいずれか一
項記載の方法。9. The method according to claim 1, wherein the plasma display panel is an AC type.
JP2000084379A 1999-03-26 2000-03-24 Control method for plasma display panel and display device using this method Pending JP2000298452A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP99400742:5 1999-03-26
EP99400742A EP1039438A1 (en) 1999-03-26 1999-03-26 Method for controlling plasma display panel and display apparatus using this method

Publications (1)

Publication Number Publication Date
JP2000298452A true JP2000298452A (en) 2000-10-24

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JP (1) JP2000298452A (en)
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6373452B1 (en) * 1995-08-03 2002-04-16 Fujiitsu Limited Plasma display panel, method of driving same and plasma display apparatus
JP3322809B2 (en) * 1995-10-24 2002-09-09 富士通株式会社 Display driving method and apparatus
JP3417246B2 (en) * 1996-09-25 2003-06-16 日本電気株式会社 Gradation display method
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EP1039437A1 (en) 2000-09-27
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