ITMI20052350A1 - Metodo di programmazione di celle di memoria in particolare di tipo flash e relativa architettura di programmazione - Google Patents
Metodo di programmazione di celle di memoria in particolare di tipo flash e relativa architettura di programmazioneInfo
- Publication number
- ITMI20052350A1 ITMI20052350A1 IT002350A ITMI20052350A ITMI20052350A1 IT MI20052350 A1 ITMI20052350 A1 IT MI20052350A1 IT 002350 A IT002350 A IT 002350A IT MI20052350 A ITMI20052350 A IT MI20052350A IT MI20052350 A1 ITMI20052350 A1 IT MI20052350A1
- Authority
- IT
- Italy
- Prior art keywords
- programming
- flash memory
- memory cells
- relative
- architecture
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3404—Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
- G11C16/344—Arrangements for verifying correct erasure or for detecting overerased cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT002350A ITMI20052350A1 (it) | 2005-12-09 | 2005-12-09 | Metodo di programmazione di celle di memoria in particolare di tipo flash e relativa architettura di programmazione |
US11/636,382 US7606078B2 (en) | 2005-12-09 | 2006-12-08 | Method for programming of memory cells, in particular of the flash type, and corresponding programming architecture |
US12/556,970 US7944751B2 (en) | 2005-12-09 | 2009-09-10 | Method for programming of memory cells, in particular of the flash type, and corresponding programming architecture |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT002350A ITMI20052350A1 (it) | 2005-12-09 | 2005-12-09 | Metodo di programmazione di celle di memoria in particolare di tipo flash e relativa architettura di programmazione |
Publications (1)
Publication Number | Publication Date |
---|---|
ITMI20052350A1 true ITMI20052350A1 (it) | 2007-06-10 |
Family
ID=38193513
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT002350A ITMI20052350A1 (it) | 2005-12-09 | 2005-12-09 | Metodo di programmazione di celle di memoria in particolare di tipo flash e relativa architettura di programmazione |
Country Status (2)
Country | Link |
---|---|
US (2) | US7606078B2 (it) |
IT (1) | ITMI20052350A1 (it) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8797805B2 (en) | 2011-12-22 | 2014-08-05 | Micron Technology, Inc. | Methods and apparatuses for determining threshold voltage shift |
TWI567742B (zh) * | 2015-04-23 | 2017-01-21 | 旺宏電子股份有限公司 | 電子裝置及非揮發性記憶體裝置與編程方法 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6282145B1 (en) * | 1999-01-14 | 2001-08-28 | Silicon Storage Technology, Inc. | Array architecture and operating methods for digital multilevel nonvolatile memory integrated circuit system |
IT1312471B1 (it) * | 1999-05-11 | 2002-04-17 | St Microelectronics Srl | Metodo di verifica in scrittura del valore di soglia nelle memorie non volatili |
US6747893B2 (en) * | 2002-03-14 | 2004-06-08 | Intel Corporation | Storing data in non-volatile memory devices |
ITMI20022387A1 (it) * | 2002-11-12 | 2004-05-13 | Simicroelectronics S R L | Circuito per programmare un dispositivo di memoria non-volatile con |
DE60214868D1 (de) * | 2002-12-30 | 2006-11-02 | St Microelectronics Srl | Architektur und Verfahren zur schnellen Seitenprogrammierung in einer nicht-flüchtigen Speichervorrichtung mit SPI Interface |
US6937520B2 (en) * | 2004-01-21 | 2005-08-30 | Tsuyoshi Ono | Nonvolatile semiconductor memory device |
JP4668199B2 (ja) * | 2004-08-30 | 2011-04-13 | スパンション エルエルシー | 不揮発性記憶装置の消去方法、および不揮発性記憶装置 |
US7286406B2 (en) * | 2005-10-14 | 2007-10-23 | Sandisk Corporation | Method for controlled programming of non-volatile memory exhibiting bit line coupling |
US7366022B2 (en) * | 2005-10-27 | 2008-04-29 | Sandisk Corporation | Apparatus for programming of multi-state non-volatile memory using smart verify |
-
2005
- 2005-12-09 IT IT002350A patent/ITMI20052350A1/it unknown
-
2006
- 2006-12-08 US US11/636,382 patent/US7606078B2/en active Active
-
2009
- 2009-09-10 US US12/556,970 patent/US7944751B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US7606078B2 (en) | 2009-10-20 |
US20070147130A1 (en) | 2007-06-28 |
US20100002521A1 (en) | 2010-01-07 |
US7944751B2 (en) | 2011-05-17 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
ITRM20070167A1 (it) | Non-volatile multilevel memory cell programming | |
DE602006018807D1 (de) | Nichtflüchtige Speicherzellen, Speicherarrays damit und Verfahren zum Betrieb der Zellen und Arrays | |
TWI367487B (en) | Flash memory programming and verification method with reduced leakage current | |
BRPI0915146A2 (pt) | programação e reprodução de células | |
DE602006011684D1 (de) | Nichtflüchtiger Halbleiterspeicher mit drei Zuständen und dessen Betriebsverfahren | |
EP2201573A4 (en) | DETECTION OF MEMORY CELLS IN A NAND FLASH | |
TWI316207B (en) | Memory system and method of writing into nonvolatile semiconductor memory | |
DE602006001026D1 (de) | Integriertes Schaltgerät, Flash-Speicherarray, nichtflüchtige Speichervorrichtung und Betriebsverfahren | |
ITVA20050061A1 (it) | Metodo di gestione di un dispositivo di memoria non volatile e relativa memoria | |
DE602006018808D1 (de) | Nichtflüchtige Speicherzellen, Speicherarrays damit und Verfahren zum Betrieb der Zellen und Arrays | |
TWI340460B (en) | Memory cell with improved program/erase windows | |
EP2135253A4 (en) | PARTIAL BLOCK DELETE ARCHITECTURE FOR FLASH MEMORY | |
TWI373048B (en) | Erasing flash memory using adaptive drain and/or gate bias and related erase method | |
ITVA20050028A1 (it) | Generatore di rampa e relativa decodifica di riga per memoria flash | |
DE602005012028D1 (de) | Nichtflüchtige Halbleiterspeicheranordnung und Leseverfahren | |
TWI368316B (en) | Multi-trapping layer flash memory cell | |
DE602005008396D1 (de) | Hochspannungsschalter mit niedriger Welligkeit im Ausgang für nicht-flüchtigen Schwebegatespeicher | |
DE112008002275A5 (de) | Scheinwerferlampe und deren Verwendung | |
DE602006006694D1 (de) | Remanente flüchtige speicherzelle | |
EP1721321A4 (en) | REMANENT MEMORY ASSEMBLY HAVING SIMULTANEOUS WRITE AND ERASE CHARACTERISTICS | |
BRPI0809902A2 (pt) | Métodos de avaliar células e culturas celulares | |
DE602006005080D1 (de) | Verbesserter lesemodus für flash-speicher | |
EP1901306A4 (en) | A VERIFY PROCESSING IN A SEQUENTIAL WRITING PROCESSING NON-VOLATILE MEMORY | |
EP2043145A4 (en) | NON-VOLATILE SEMICONDUCTOR MEMORY AND CORRESPONDING DRIVE METHOD | |
DE602007003666D1 (de) | Speicherelement und Speicher |