IT1249388B - Dispositivo a semiconduttore incapsulato in resina e completamente isolato per alte tensioni - Google Patents

Dispositivo a semiconduttore incapsulato in resina e completamente isolato per alte tensioni

Info

Publication number
IT1249388B
IT1249388B ITCT910010A ITCT910010A IT1249388B IT 1249388 B IT1249388 B IT 1249388B IT CT910010 A ITCT910010 A IT CT910010A IT CT910010 A ITCT910010 A IT CT910010A IT 1249388 B IT1249388 B IT 1249388B
Authority
IT
Italy
Prior art keywords
resin
semiconductor device
high voltages
completely insulated
device encapsulated
Prior art date
Application number
ITCT910010A
Other languages
English (en)
Inventor
Marcantonio Mangiagli
Rosario Pogliese
Original Assignee
Cons Ric Microelettronica
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cons Ric Microelettronica filed Critical Cons Ric Microelettronica
Priority to ITCT910010A priority Critical patent/IT1249388B/it
Publication of ITCT910010A0 publication Critical patent/ITCT910010A0/it
Priority to EP92201102A priority patent/EP0511702B1/en
Priority to DE69211609T priority patent/DE69211609T2/de
Priority to JP04106744A priority patent/JP3140550B2/ja
Publication of ITCT910010A1 publication Critical patent/ITCT910010A1/it
Priority to US08/216,772 priority patent/US6320258B1/en
Application granted granted Critical
Publication of IT1249388B publication Critical patent/IT1249388B/it

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49562Geometry of the lead-frame for devices being provided for in H01L29/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • H01L2924/1815Shape

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

Il dispositivo, a pari dimensioni di ingombro di dispositivi analoghi noti, garantisce tensioni di isolamento superiori.Esso è caratterizzato dal fatto che:- i reofori presentano alternativamente, nell'ordine in cui si succedono lungo un lato dell'involucro, la loro superficie scoperta ovvero rispettivamente coperta per un certo tratto da un rivestimento isolante;- ogni reoforo non provvisto del predetto rivestimento isolante presenta, lungo il suo sviluppo longitudinale, una prima piegatura in direzione opposta a quella di un altro lato dell'involucro adatto ad essere posto in contatto con un dissipatore esterno, e successivamente una seconda piegatura, in senso opposto alla precedente.
ITCT910010A 1991-04-23 1991-04-26 Dispositivo a semiconduttore incapsulato in resina e completamente isolato per alte tensioni IT1249388B (it)

Priority Applications (5)

Application Number Priority Date Filing Date Title
ITCT910010A IT1249388B (it) 1991-04-26 1991-04-26 Dispositivo a semiconduttore incapsulato in resina e completamente isolato per alte tensioni
EP92201102A EP0511702B1 (en) 1991-04-26 1992-04-21 Semiconductor device encapsulated in resin and completely insulated for high voltages
DE69211609T DE69211609T2 (de) 1991-04-26 1992-04-21 Harzverkapselte Halbleiteranordnung und vollständig isoliert für hohe Spannungen
JP04106744A JP3140550B2 (ja) 1991-04-26 1992-04-24 半導体装置
US08/216,772 US6320258B1 (en) 1991-04-23 1994-03-23 Semiconductor device having alternating electrically insulative coated leads

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ITCT910010A IT1249388B (it) 1991-04-26 1991-04-26 Dispositivo a semiconduttore incapsulato in resina e completamente isolato per alte tensioni

Publications (3)

Publication Number Publication Date
ITCT910010A0 ITCT910010A0 (it) 1991-04-26
ITCT910010A1 ITCT910010A1 (it) 1992-10-26
IT1249388B true IT1249388B (it) 1995-02-23

Family

ID=11348409

Family Applications (1)

Application Number Title Priority Date Filing Date
ITCT910010A IT1249388B (it) 1991-04-23 1991-04-26 Dispositivo a semiconduttore incapsulato in resina e completamente isolato per alte tensioni

Country Status (5)

Country Link
US (1) US6320258B1 (it)
EP (1) EP0511702B1 (it)
JP (1) JP3140550B2 (it)
DE (1) DE69211609T2 (it)
IT (1) IT1249388B (it)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6476481B2 (en) 1998-05-05 2002-11-05 International Rectifier Corporation High current capacity semiconductor device package and lead frame with large area connection posts and modified outline
JP4150508B2 (ja) * 2001-04-03 2008-09-17 三菱電機株式会社 電力用半導体装置
US6608373B2 (en) * 2001-10-03 2003-08-19 Lite-On Semiconductor Corp. Support structure for power element
EP1470586B1 (de) 2002-01-30 2014-01-15 ebm-papst St. Georgen GmbH & Co. KG Leistungs-halbleiter, und verfahen zu seiner herstellung
JP2004281887A (ja) * 2003-03-18 2004-10-07 Himeji Toshiba Ep Corp リードフレーム及びそれを用いた電子部品
US7875962B2 (en) * 2007-10-15 2011-01-25 Power Integrations, Inc. Package for a power semiconductor device
US8207455B2 (en) 2009-07-31 2012-06-26 Power Integrations, Inc. Power semiconductor package with bottom surface protrusions
CN104779234B (zh) * 2014-01-10 2018-03-20 万国半导体股份有限公司 抑制爬电现象的半导体器件及制备方法
KR102192997B1 (ko) * 2014-01-27 2020-12-18 삼성전자주식회사 반도체 소자
JP6345608B2 (ja) * 2015-01-19 2018-06-20 新電元工業株式会社 半導体装置
DE102015109073B4 (de) * 2015-06-09 2023-08-10 Infineon Technologies Ag Elektronische Vorrichtungen mit erhöhten Kriechstrecken
JP7491188B2 (ja) * 2020-11-09 2024-05-28 株式会社デンソー 電気機器
DE102020131722A1 (de) 2020-11-30 2022-06-02 Brose Fahrzeugteile Se & Co. Kommanditgesellschaft, Bamberg Elektronikbauelement zur elektronischen Umsetzung einer Komfortfunktion eines Kraftfahrzeugs

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5550648A (en) * 1978-10-06 1980-04-12 Mitsubishi Electric Corp Resin sealing type semiconductor device
JPS58209147A (ja) * 1982-05-31 1983-12-06 Toshiba Corp 樹脂封止型半導体装置
JPS62282451A (ja) 1986-05-30 1987-12-08 Mitsubishi Electric Corp 樹脂封止形半導体装置
EP0257681A3 (en) * 1986-08-27 1990-02-07 STMicroelectronics S.r.l. Method for manufacturing plastic encapsulated semiconductor devices and devices obtained thereby
JPS63107159A (ja) * 1986-10-24 1988-05-12 Toshiba Corp 半導体装置
JPS63169050A (ja) 1987-01-05 1988-07-13 Nec Corp Icパツケ−ジ
JPH03108744A (ja) * 1989-09-22 1991-05-08 Toshiba Corp 樹脂封止型半導体装置
IT1239644B (it) * 1990-02-22 1993-11-11 Sgs Thomson Microelectronics Struttura di supporto degli adduttori perfezionata per contenitori di dispositivi integrati di potenza

Also Published As

Publication number Publication date
DE69211609T2 (de) 1996-11-21
EP0511702B1 (en) 1996-06-19
JP3140550B2 (ja) 2001-03-05
DE69211609D1 (de) 1996-07-25
ITCT910010A0 (it) 1991-04-26
EP0511702A2 (en) 1992-11-04
JPH0661393A (ja) 1994-03-04
US6320258B1 (en) 2001-11-20
ITCT910010A1 (it) 1992-10-26
EP0511702A3 (en) 1993-06-09

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