IT1184015B - Sistema multiprocessore a piu livelli gerarchici - Google Patents
Sistema multiprocessore a piu livelli gerarchiciInfo
- Publication number
- IT1184015B IT1184015B IT68046/85A IT6804685A IT1184015B IT 1184015 B IT1184015 B IT 1184015B IT 68046/85 A IT68046/85 A IT 68046/85A IT 6804685 A IT6804685 A IT 6804685A IT 1184015 B IT1184015 B IT 1184015B
- Authority
- IT
- Italy
- Prior art keywords
- processor system
- hierarchical levels
- multiple hierarchical
- levels
- processor
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4027—Coupling between buses using bus bridges
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
- G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Computing Systems (AREA)
- Multi Processors (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT68046/85A IT1184015B (it) | 1985-12-13 | 1985-12-13 | Sistema multiprocessore a piu livelli gerarchici |
DE86116525T DE3689226T2 (de) | 1985-12-13 | 1986-11-27 | Multiprozessorsystem mit multihierarchischen Ebenen. |
ES86116525T ES2047474T3 (es) | 1985-12-13 | 1986-11-27 | Sistema multiprocesador de nivel jerarquico multiple. |
EP86116525A EP0226096B1 (en) | 1985-12-13 | 1986-11-27 | Multiple-hierarchical-level multiprocessor system |
US06/939,173 US4814970A (en) | 1985-12-13 | 1986-12-08 | Multiple-hierarchical-level multiprocessor system |
JP61295067A JPH0797363B2 (ja) | 1985-12-13 | 1986-12-12 | 多重階層レベルマルチプロセツサ装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT68046/85A IT1184015B (it) | 1985-12-13 | 1985-12-13 | Sistema multiprocessore a piu livelli gerarchici |
Publications (2)
Publication Number | Publication Date |
---|---|
IT8568046A0 IT8568046A0 (it) | 1985-12-13 |
IT1184015B true IT1184015B (it) | 1987-10-22 |
Family
ID=11307437
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT68046/85A IT1184015B (it) | 1985-12-13 | 1985-12-13 | Sistema multiprocessore a piu livelli gerarchici |
Country Status (6)
Country | Link |
---|---|
US (1) | US4814970A (it) |
EP (1) | EP0226096B1 (it) |
JP (1) | JPH0797363B2 (it) |
DE (1) | DE3689226T2 (it) |
ES (1) | ES2047474T3 (it) |
IT (1) | IT1184015B (it) |
Families Citing this family (59)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5228127A (en) * | 1985-06-24 | 1993-07-13 | Fujitsu Limited | Clustered multiprocessor system with global controller connected to each cluster memory control unit for directing order from processor to different cluster processors |
DE3889550T2 (de) * | 1987-01-12 | 1994-09-01 | Fujitsu Ltd | Datenübertragungspufferschaltungen für Datenaustausch. |
JPS63259727A (ja) * | 1987-04-17 | 1988-10-26 | Hitachi Ltd | コプロセツサのインタ−フエイス方式 |
US5201040A (en) * | 1987-06-22 | 1993-04-06 | Hitachi, Ltd. | Multiprocessor system having subsystems which are loosely coupled through a random access storage and which each include a tightly coupled multiprocessor |
US5029074A (en) * | 1987-06-29 | 1991-07-02 | Digital Equipment Corporation | Bus adapter unit for digital processing system |
DE3854770T2 (de) * | 1987-06-29 | 1997-02-06 | Digital Equipment Corp | Busadapter für digitales Rechensystem |
US5251308A (en) * | 1987-12-22 | 1993-10-05 | Kendall Square Research Corporation | Shared memory multiprocessor with data hiding and post-store |
US5335325A (en) * | 1987-12-22 | 1994-08-02 | Kendall Square Research Corporation | High-speed packet switching apparatus and method |
US5341483A (en) * | 1987-12-22 | 1994-08-23 | Kendall Square Research Corporation | Dynamic hierarchial associative memory |
US5055999A (en) * | 1987-12-22 | 1991-10-08 | Kendall Square Research Corporation | Multiprocessor digital data processing system |
US5226039A (en) * | 1987-12-22 | 1993-07-06 | Kendall Square Research Corporation | Packet routing switch |
US5761413A (en) * | 1987-12-22 | 1998-06-02 | Sun Microsystems, Inc. | Fault containment system for multiprocessor with shared memory |
FR2626091B1 (fr) * | 1988-01-15 | 1994-05-06 | Thomson Csf | Calculateur de grande puissance et dispositif de calcul comportant une pluralite de calculateurs |
US5237670A (en) * | 1989-01-30 | 1993-08-17 | Alantec, Inc. | Method and apparatus for data transfer between source and destination modules |
JPH0387958A (ja) * | 1989-06-30 | 1991-04-12 | Nec Corp | バスロツク制御方式 |
JP2789479B2 (ja) * | 1989-08-14 | 1998-08-20 | 松下電器産業株式会社 | 処理装置およびマルチプロセッサシステム |
US5239661A (en) * | 1989-08-18 | 1993-08-24 | Mitsubishi Denki Kabushiki Kaisha | Hierarchical bus circuit having decoder generating local buses and devices select signals enabling switching elements to perform data transfer operations |
US5161156A (en) * | 1990-02-02 | 1992-11-03 | International Business Machines Corporation | Multiprocessing packet switching connection system having provision for error correction and recovery |
US5153595A (en) * | 1990-03-26 | 1992-10-06 | Geophysical Survey Systems, Inc. | Range information from signal distortions |
WO1992001990A1 (en) * | 1990-07-20 | 1992-02-06 | Temple University - Of The Commonwealth System Of Higher Education | System for high-level virtual computer with heterogeneous operating systems |
GB9018993D0 (en) * | 1990-08-31 | 1990-10-17 | Ncr Co | Work station interfacing means having burst mode capability |
GB2251320A (en) * | 1990-12-20 | 1992-07-01 | Motorola Ltd | Parallel processor |
DE69228621T2 (de) * | 1991-02-25 | 1999-07-22 | Hewlett-Packard Co., Palo Alto, Calif. | Objektorientiertes verteiltes Rechnersystem |
JPH04352265A (ja) * | 1991-05-30 | 1992-12-07 | Kirin Techno Syst:Kk | 階層構造化モジュールシステム |
US5296936A (en) * | 1991-07-22 | 1994-03-22 | International Business Machines Corporation | Communication apparatus and method for transferring image data from a source to one or more receivers |
CA2078310A1 (en) * | 1991-09-20 | 1993-03-21 | Mark A. Kaufman | Digital processor with distributed memory system |
CA2078312A1 (en) | 1991-09-20 | 1993-03-21 | Mark A. Kaufman | Digital data processor with improved paging |
US5634135A (en) * | 1991-12-13 | 1997-05-27 | Texas Instruments Incorporated | Microprocessor with priority determination and priority based instruction selection |
CA2078912A1 (en) * | 1992-01-07 | 1993-07-08 | Robert Edward Cypher | Hierarchical interconnection networks for parallel processing |
IT1260848B (it) * | 1993-06-11 | 1996-04-23 | Finmeccanica Spa | Sistema a multiprocessore |
JP3370155B2 (ja) * | 1993-12-01 | 2003-01-27 | 富士通株式会社 | データ処理システム |
US5909702A (en) * | 1995-09-29 | 1999-06-01 | Intel Corporation | Memory address translations for programs code execution/relocation |
KR100292685B1 (ko) * | 1997-12-15 | 2001-11-30 | 구자홍 | 모니터의통신용부품자동진단장치및자동진단방법 |
GB2370380B (en) | 2000-12-19 | 2003-12-31 | Picochip Designs Ltd | Processor architecture |
US6976239B1 (en) * | 2001-06-12 | 2005-12-13 | Altera Corporation | Methods and apparatus for implementing parameterizable processors and peripherals |
WO2004038527A2 (en) * | 2002-10-22 | 2004-05-06 | Isys Technologies | Systems and methods for providing a dynamically modular processing unit |
JP2006504209A (ja) * | 2002-10-22 | 2006-02-02 | ジェイソン エイ サリヴァン | カスタム化可能なロバストなコンピュータ処理システム |
BR0315570A (pt) * | 2002-10-22 | 2005-08-23 | Jason A Sullivan | Módulo de controle de processamento não-periféricos possuindo propriedades aperfeiçoadas de dissipação de calor |
US20040139305A1 (en) * | 2003-01-09 | 2004-07-15 | International Business Machines Corporation | Hardware-enabled instruction tracing |
GB2397668B (en) * | 2003-01-27 | 2005-12-07 | Picochip Designs Ltd | Processor array |
US7818388B2 (en) * | 2005-10-07 | 2010-10-19 | International Business Machines Corporation | Data processing system, method and interconnect fabric supporting multiple planes of processing nodes |
US7990724B2 (en) | 2006-12-19 | 2011-08-02 | Juhasz Paul R | Mobile motherboard |
GB2454865B (en) * | 2007-11-05 | 2012-06-13 | Picochip Designs Ltd | Power control |
US8397030B2 (en) | 2008-06-24 | 2013-03-12 | International Business Machines Corporation | Efficient region coherence protocol for clustered shared-memory multiprocessor systems |
GB2466661B (en) * | 2009-01-05 | 2014-11-26 | Intel Corp | Rake receiver |
US8799587B2 (en) * | 2009-01-26 | 2014-08-05 | International Business Machines Corporation | Region coherence array for a mult-processor system having subregions and subregion prefetching |
US8285942B2 (en) * | 2009-01-27 | 2012-10-09 | International Business Machines Corporation | Region coherence array having hint bits for a clustered shared-memory multiprocessor system |
GB2470037B (en) | 2009-05-07 | 2013-07-10 | Picochip Designs Ltd | Methods and devices for reducing interference in an uplink |
GB2470771B (en) | 2009-06-05 | 2012-07-18 | Picochip Designs Ltd | A method and device in a communication network |
GB2470891B (en) | 2009-06-05 | 2013-11-27 | Picochip Designs Ltd | A method and device in a communication network |
GB2474071B (en) | 2009-10-05 | 2013-08-07 | Picochip Designs Ltd | Femtocell base station |
GB2482869B (en) | 2010-08-16 | 2013-11-06 | Picochip Designs Ltd | Femtocell access control |
GB2489716B (en) | 2011-04-05 | 2015-06-24 | Intel Corp | Multimode base system |
GB2489919B (en) | 2011-04-05 | 2018-02-14 | Intel Corp | Filter |
GB2491098B (en) | 2011-05-16 | 2015-05-20 | Intel Corp | Accessing a base station |
US20150178092A1 (en) * | 2013-12-20 | 2015-06-25 | Asit K. Mishra | Hierarchical and parallel partition networks |
US10715526B2 (en) | 2016-12-14 | 2020-07-14 | Microsoft Technology Licensing, Llc | Multiple cores with hierarchy of trust |
US10402273B2 (en) | 2016-12-14 | 2019-09-03 | Microsoft Technology Licensing, Llc | IoT device update failure recovery |
US10416991B2 (en) * | 2016-12-14 | 2019-09-17 | Microsoft Technology Licensing, Llc | Secure IoT device update |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4130865A (en) * | 1974-06-05 | 1978-12-19 | Bolt Beranek And Newman Inc. | Multiprocessor computer apparatus employing distributed communications paths and a passive task register |
FR2296221A1 (fr) * | 1974-12-27 | 1976-07-23 | Ibm France | Systeme de traitement du signal |
JPS6016666B2 (ja) * | 1977-11-18 | 1985-04-26 | 富士通株式会社 | 階層システムにおけるバツク・アツプ方式 |
US4240143A (en) * | 1978-12-22 | 1980-12-16 | Burroughs Corporation | Hierarchical multi-processor network for memory sharing |
EP0016523B1 (en) * | 1979-02-13 | 1984-09-26 | The Secretary of State for Defence in Her Britannic Majesty's Government of the United Kingdom of Great Britain and | Data processing unit and data processing system comprising a plurality of such data processing units |
US4371929A (en) * | 1980-05-05 | 1983-02-01 | Ibm Corporation | Multiprocessor system with high density memory set architecture including partitionable cache store interface to shared disk drive memory |
DE3112766A1 (de) * | 1981-03-31 | 1982-12-30 | Rheinische Computer GmbH, 5000 Köln | "rechnersystem" |
DE3266636D1 (en) * | 1981-05-29 | 1985-11-07 | Gen Electric Co Plc | Telecommunications system |
WO1983001135A1 (en) * | 1981-09-18 | 1983-03-31 | Rovsing As Christian | Multiprocessor computer system |
US4622632A (en) * | 1982-08-18 | 1986-11-11 | Board Of Regents, University Of Washington | Data processing system having a pyramidal array of processors |
US4648035A (en) * | 1982-12-06 | 1987-03-03 | Digital Equipment Corporation | Address conversion unit for multiprocessor system |
-
1985
- 1985-12-13 IT IT68046/85A patent/IT1184015B/it active
-
1986
- 1986-11-27 ES ES86116525T patent/ES2047474T3/es not_active Expired - Lifetime
- 1986-11-27 DE DE86116525T patent/DE3689226T2/de not_active Expired - Fee Related
- 1986-11-27 EP EP86116525A patent/EP0226096B1/en not_active Expired - Lifetime
- 1986-12-08 US US06/939,173 patent/US4814970A/en not_active Expired - Fee Related
- 1986-12-12 JP JP61295067A patent/JPH0797363B2/ja not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPS62189549A (ja) | 1987-08-19 |
DE3689226T2 (de) | 1994-02-24 |
DE3689226D1 (de) | 1993-12-02 |
EP0226096A2 (en) | 1987-06-24 |
EP0226096B1 (en) | 1993-10-27 |
EP0226096A3 (en) | 1988-08-03 |
ES2047474T3 (es) | 1994-03-01 |
IT8568046A0 (it) | 1985-12-13 |
JPH0797363B2 (ja) | 1995-10-18 |
US4814970A (en) | 1989-03-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
TA | Fee payment date (situation as of event date), data collected since 19931001 |
Effective date: 19981221 |