BR8506010A - Sistema multiprocessador - Google Patents
Sistema multiprocessadorInfo
- Publication number
- BR8506010A BR8506010A BR8506010A BR8506010A BR8506010A BR 8506010 A BR8506010 A BR 8506010A BR 8506010 A BR8506010 A BR 8506010A BR 8506010 A BR8506010 A BR 8506010A BR 8506010 A BR8506010 A BR 8506010A
- Authority
- BR
- Brazil
- Prior art keywords
- multiprocessor system
- multiprocessor
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
- G06F15/8053—Vector processors
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Multimedia (AREA)
- Computing Systems (AREA)
- Complex Calculations (AREA)
- Hardware Redundancy (AREA)
- Advance Control (AREA)
- Multi Processors (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59252950A JPS61131169A (ja) | 1984-11-30 | 1984-11-30 | マルチプロセツサシステム |
JP60147964A JPS629460A (ja) | 1985-07-05 | 1985-07-05 | マルチプロセツサシステムの命令制御方式 |
JP60159497A JPH0685166B2 (ja) | 1985-07-19 | 1985-07-19 | マルチプロセッサシステムの命令制御方式 |
Publications (1)
Publication Number | Publication Date |
---|---|
BR8506010A true BR8506010A (pt) | 1986-08-19 |
Family
ID=27319456
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BR8506010A BR8506010A (pt) | 1984-11-30 | 1985-11-29 | Sistema multiprocessador |
Country Status (6)
Country | Link |
---|---|
EP (1) | EP0183560B1 (pt) |
KR (1) | KR900001999B1 (pt) |
AU (1) | AU557807B2 (pt) |
BR (1) | BR8506010A (pt) |
DE (1) | DE3579121D1 (pt) |
ES (1) | ES8800769A1 (pt) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06105460B2 (ja) * | 1988-06-07 | 1994-12-21 | 富士通株式会社 | マルチプロセッサのプロセッサ切換え装置 |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5194734A (en) * | 1975-02-19 | 1976-08-19 | Tajushorisochino enzanseigyohoshiki | |
DE3379690D1 (en) * | 1982-09-03 | 1989-05-24 | Hitachi Ltd | Data processing system |
-
1985
- 1985-11-28 KR KR1019850008891A patent/KR900001999B1/ko not_active IP Right Cessation
- 1985-11-28 AU AU50454/85A patent/AU557807B2/en not_active Ceased
- 1985-11-29 EP EP85308697A patent/EP0183560B1/en not_active Expired - Lifetime
- 1985-11-29 BR BR8506010A patent/BR8506010A/pt not_active IP Right Cessation
- 1985-11-29 DE DE8585308697T patent/DE3579121D1/de not_active Expired - Fee Related
- 1985-11-29 ES ES549455A patent/ES8800769A1/es not_active Expired
Also Published As
Publication number | Publication date |
---|---|
EP0183560A3 (en) | 1987-06-03 |
EP0183560B1 (en) | 1990-08-08 |
ES8800769A1 (es) | 1987-11-16 |
EP0183560A2 (en) | 1986-06-04 |
AU5045485A (en) | 1986-06-05 |
DE3579121D1 (de) | 1990-09-13 |
ES549455A0 (es) | 1987-11-16 |
KR860004361A (ko) | 1986-06-20 |
AU557807B2 (en) | 1987-01-08 |
KR900001999B1 (ko) | 1990-03-31 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
B21A | Patent or certificate of addition expired [chapter 21.1 patent gazette] |
Free format text: PATENTE EXTINTA EM 29/11/2000 |
|
B15K | Others concerning applications: alteration of classification |
Ipc: G06F 15/80 (2006.01), G06F 9/38 (2006.0 |