HK9596A - Serial data interface - Google Patents

Serial data interface

Info

Publication number
HK9596A
HK9596A HK9596A HK9596A HK9596A HK 9596 A HK9596 A HK 9596A HK 9596 A HK9596 A HK 9596A HK 9596 A HK9596 A HK 9596A HK 9596 A HK9596 A HK 9596A
Authority
HK
Hong Kong
Prior art keywords
data
data bus
compare logic
circuit
data storage
Prior art date
Application number
HK9596A
Inventor
Guenter Dipl Ing Gleim
Original Assignee
Thomson Brandt Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson Brandt Gmbh filed Critical Thomson Brandt Gmbh
Publication of HK9596A publication Critical patent/HK9596A/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4208—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus
    • G06F13/4217—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus with synchronous protocol

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Communication Control (AREA)
  • Arrangements For Transmission Of Measured Signals (AREA)
  • Circuits Of Receivers In General (AREA)
  • Ultra Sonic Daignosis Equipment (AREA)
  • Vehicle Body Suspensions (AREA)
  • Radar Systems Or Details Thereof (AREA)
  • Selective Calling Equipment (AREA)
  • Dram (AREA)
  • Bus Control (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

Serial data interface for connecting to a data bus peripheral circuits which receive or send data over said data bus. Said interface analyses the features of a data stream flowing over the data bus, which are used to determine which connected peripheral circuit they are allocated to. A data storage (4), a compare logic (5), a control circuit (6), an internal set/reset circuit (7) and an internal clock generator (8) are provided. The input of the data storage (4) can be connected to the data line (9) of the data bus (3) and the compare logic (5) is arranged on the output of the data storage (4), the control circuit (6) being connected downstream of said compare logic (5). The input of the internal set/reset circuit (7) can be connected to the enable (10) and to the clock line (11) of the data bus (3) and outputs of the internal set/reset circuit (7) are connected to the set/reset inputs of the data storage (4), of the compare logic (5) and of the control circuit (6). Moreover, the input of the internal clock generator (8) can be connected to the enable (10) and clock line (11) of the data bus (3) and the output of the internal clock generator (8) is connected to the clock inputs of the data storage (4), of the compare logic (5) and of the control circuit (6). Said serial data interface is in particular suited for connecting a peripheral circuit to a data bus according to the Thomson specifications.
HK9596A 1988-08-31 1996-01-18 Serial data interface HK9596A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE3829454A DE3829454A1 (en) 1988-08-31 1988-08-31 SERIAL DATA INTERFACE

Publications (1)

Publication Number Publication Date
HK9596A true HK9596A (en) 1996-01-26

Family

ID=6361925

Family Applications (1)

Application Number Title Priority Date Filing Date
HK9596A HK9596A (en) 1988-08-31 1996-01-18 Serial data interface

Country Status (12)

Country Link
EP (2) EP0356873B1 (en)
JP (1) JPH03501072A (en)
KR (1) KR900702459A (en)
AT (1) ATE96557T1 (en)
CA (1) CA1328929C (en)
DE (2) DE3829454A1 (en)
ES (1) ES2047072T3 (en)
FI (1) FI902153A0 (en)
HK (1) HK9596A (en)
MY (1) MY105090A (en)
TR (1) TR24012A (en)
WO (1) WO1990002377A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5278243A (en) * 1992-01-14 1994-01-11 Soane Technologies, Inc. High impact resistant macromolecular networks
DE4107052B4 (en) * 1991-03-06 2005-09-29 Robert Bosch Gmbh Device for the application of control devices, in particular ignition and / or injection control devices for motor vehicles

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3139421A1 (en) * 1981-10-03 1983-04-21 Nsm-Apparatebau Gmbh & Co Kg, 6530 Bingen Serial output circuit
DE3404721C2 (en) * 1984-02-10 1991-07-25 Deutsche Thomson-Brandt Gmbh, 7730 Villingen-Schwenningen Circuit arrangement for the transmission of data
DE3534216A1 (en) * 1985-09-25 1987-04-02 Bayerische Motoren Werke Ag DATA BUS SYSTEM FOR VEHICLES
FR2591772B1 (en) * 1985-12-18 1989-09-29 Cugnez Jean Louis SYSTEM FOR CONNECTING A PERIPHERAL TO MULTIPLE COMPUTERS
DE3603751A1 (en) * 1986-02-06 1987-08-13 Siemens Ag INFORMATION TRANSFER SYSTEM FOR THE TRANSFER OF BINARY INFORMATION

Also Published As

Publication number Publication date
ATE96557T1 (en) 1993-11-15
KR900702459A (en) 1990-12-07
CA1328929C (en) 1994-04-26
TR24012A (en) 1991-01-28
ES2047072T3 (en) 1994-02-16
WO1990002377A1 (en) 1990-03-08
EP0404870A1 (en) 1991-01-02
DE3829454A1 (en) 1990-03-01
JPH03501072A (en) 1991-03-07
EP0356873A1 (en) 1990-03-07
MY105090A (en) 1994-08-30
FI902153A0 (en) 1990-04-27
EP0356873B1 (en) 1993-10-27
DE58906010D1 (en) 1993-12-02

Similar Documents

Publication Publication Date Title
EP0198677A3 (en) Programmable logic storage element for programmable logic devices
EP0213037A3 (en) Semiconductor memory device having test pattern generating circuit
DE3274300D1 (en) Logic circuit interconnect fault detection system
CA2038162A1 (en) Programmable connector
ES8507273A1 (en) Arrangement for optimized utilization of I/O pins.
EP0313228A3 (en) Clock distribution on vlsi chip
EP0224004A3 (en) Interconnected multiport flip-flop logic circuit interconnected multiport flip-flop logic circuit
HK9596A (en) Serial data interface
EP0335715A3 (en) Input circuits
DE69228851D1 (en) Wired or transition-based for VLSI systems
CA2108725A1 (en) Expansible High Speed Digital Multiplexer
CA2062414A1 (en) A circuit for interconnecting integrated semiconductor circuits
CA2057339A1 (en) Test interface for a digital circuit
JPS562047A (en) Debugging unit
JPS57152231A (en) Integrated circuit device
JPS57201936A (en) Integrated logical circuit
JPS57115855A (en) Large scale semiconductor integrated circuit device
JPS6472083A (en) Soft imbedded type tester for vlsi circuit
EP0351959A3 (en) Multi-channel controller
CN118276660A (en) Reset circuit module, reset circuit device and vehicle
JPS6476211A (en) Digital logic integrated circuit
JPS57170622A (en) Flip-flop circuit
JPS5466050A (en) Integrated circuit device
JPS5588149A (en) Output unit for semiconductor integrated circuit
JPS57157656A (en) Descrambler synchronizing circuit

Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)