HK1205355A1 - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- HK1205355A1 HK1205355A1 HK15105925.2A HK15105925A HK1205355A1 HK 1205355 A1 HK1205355 A1 HK 1205355A1 HK 15105925 A HK15105925 A HK 15105925A HK 1205355 A1 HK1205355 A1 HK 1205355A1
- Authority
- HK
- Hong Kong
- Prior art keywords
- semiconductor device
- semiconductor
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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- H01L24/02—Bonding areas ; Manufacturing methods related thereto
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- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
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- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
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- H01L24/92—Specific sequence of method steps
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- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
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- H01L2924/35—Mechanical effects
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- H01L2924/3511—Warping
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- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
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Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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JP2013119998A JP6144969B2 (ja) | 2013-06-06 | 2013-06-06 | 半導体装置 |
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HK1205355A1 true HK1205355A1 (en) | 2015-12-11 |
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HK15105925.2A HK1205355A1 (en) | 2013-06-06 | 2015-06-22 | Semiconductor device |
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US (2) | US9165879B2 (ja) |
JP (1) | JP6144969B2 (ja) |
CN (1) | CN104241258B (ja) |
HK (1) | HK1205355A1 (ja) |
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US9502270B2 (en) | 2014-07-08 | 2016-11-22 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device packages, packaging methods, and packaged semiconductor devices |
JP6515724B2 (ja) * | 2015-07-31 | 2019-05-22 | 富士通株式会社 | 半導体装置 |
KR20170066843A (ko) * | 2015-12-07 | 2017-06-15 | 삼성전자주식회사 | 적층형 반도체 장치 및 적층형 반도체 장치의 제조 방법 |
KR102454892B1 (ko) * | 2015-12-09 | 2022-10-14 | 삼성전자주식회사 | 반도체 칩, 이를 포함하는 반도체 패키지, 및 반도체 칩의 제조 방법 |
JP2021015922A (ja) * | 2019-07-16 | 2021-02-12 | キオクシア株式会社 | 半導体装置およびその製造方法 |
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JP4580730B2 (ja) * | 2003-11-28 | 2010-11-17 | ルネサスエレクトロニクス株式会社 | オフセット接合型マルチチップ半導体装置 |
JP4496825B2 (ja) * | 2004-04-05 | 2010-07-07 | ソニー株式会社 | 半導体装置およびその製造方法 |
US8031505B2 (en) * | 2008-07-25 | 2011-10-04 | Samsung Electronics Co., Ltd. | Stacked memory module and system |
JP2011243724A (ja) | 2010-05-18 | 2011-12-01 | Elpida Memory Inc | 半導体装置およびその製造方法 |
TWI427753B (zh) * | 2010-05-20 | 2014-02-21 | Advanced Semiconductor Eng | 封裝結構以及封裝製程 |
KR101710658B1 (ko) * | 2010-06-18 | 2017-02-27 | 삼성전자 주식회사 | 관통 전극을 갖는 3차원 적층 구조의 반도체 장치 및 그 반도체 장치의 시그널링 방법 |
KR101710178B1 (ko) * | 2010-06-29 | 2017-02-24 | 삼성전자 주식회사 | 임베디이드 칩 온 칩 패키지 및 이를 포함하는 패키지 온 패키지 |
JP2012038790A (ja) * | 2010-08-04 | 2012-02-23 | Hitachi Ltd | 電子部材ならびに電子部品とその製造方法 |
KR20120057693A (ko) * | 2010-08-12 | 2012-06-07 | 삼성전자주식회사 | 적층 반도체 장치 및 적층 반도체 장치의 제조 방법 |
JP2012119368A (ja) * | 2010-11-29 | 2012-06-21 | Elpida Memory Inc | 半導体装置の製造方法 |
US9824923B2 (en) * | 2011-10-17 | 2017-11-21 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of forming conductive pillar having an expanded base |
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JP2014239116A (ja) | 2014-12-18 |
CN104241258A (zh) | 2014-12-24 |
CN104241258B (zh) | 2018-09-25 |
US20140361411A1 (en) | 2014-12-11 |
JP6144969B2 (ja) | 2017-06-07 |
US20160005727A1 (en) | 2016-01-07 |
US9362263B2 (en) | 2016-06-07 |
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