GB818822A - Improvements in magnetic bistable device - Google Patents

Abstract

818,822. Magnetic amplifiers. SPERRY RAND CORPORATION. Nov. 19, 1956, No. 35325/56. Class 40 (9). A trigger pair comprises two saturable magnetic cores I and II, each of which has an input winding 22 and a power winding 21, a load R3 being energized over the power winding provided that the input winding is not energized, the output of the power winding on each core being connected to feed the input winding of the other core. A power source producing a square waveform is applied to terminal 1 to energize the power winding of core I over a rectifier D4; a similar source, but in antiphase is applied to terminal 2 and energizes the power winding of core II, see Fig. 6. Positive halfcycles of the power sources drive the cores to saturation in one direction while positive pulses applied to the input windings during negative half-cycles of the power sources drive the cores the saturation in the opposite direction. If for each core no input pulse is applied. during a negative half-cycle, the subsequent positive half-cycle of the power source finds a low impedance in the power winding and produces an output acrossload R3. If an input pulse is applied the power winding presents high impedance to the subsequent positive half-cycle and no output appears across the load R3. If core I produces an output this is applied as an input to core II to suppress the output of core II. As core II produces no output, core I receives no input and continues to produce output during positive half-cycles of its power source. If an input pulse is applied to core I, during the half-cycle T6, T7, as shown in Fig. 6, by means of an input terminal 4, the output of core I is suppressed in the next half-cycle so that core II is not reset. Subsequent positive half-cycles applied to core II therefore produce an output which is applied as an input to core I to hold the output of core I suppressed. Core II continues to produce an output until an input is applied over a terminal 6 to suppress the output and automatically re-establish that of core I. In Fig. 5 a resistance R2 and rectifier D5 are provided for each core to block the input windings during positive half-cycles of the power sources and open them to conduction during negative half-cycles. Sneak pulses induced in each power winding are suppressed by a resistance R1, negative potential source V2, and a diode D3.