GB2390742B - Copper silicide passivation for improved reliability - Google Patents

Copper silicide passivation for improved reliability

Info

Publication number
GB2390742B
GB2390742B GB0309476A GB0309476A GB2390742B GB 2390742 B GB2390742 B GB 2390742B GB 0309476 A GB0309476 A GB 0309476A GB 0309476 A GB0309476 A GB 0309476A GB 2390742 B GB2390742 B GB 2390742B
Authority
GB
United Kingdom
Prior art keywords
improved reliability
copper silicide
passivation
silicide passivation
copper
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB0309476A
Other versions
GB0309476D0 (en
GB2390742A (en
Inventor
Robert Wayne Bradshaw
Daniele Gilkes
Sailesh Mansinh Merchant
Deepak A Ramappa
Kurt George Steiner
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Agere Systems LLC
Original Assignee
Agere Systems LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agere Systems LLC filed Critical Agere Systems LLC
Publication of GB0309476D0 publication Critical patent/GB0309476D0/en
Publication of GB2390742A publication Critical patent/GB2390742A/en
Application granted granted Critical
Publication of GB2390742B publication Critical patent/GB2390742B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76843Barrier, adhesion or liner layers formed in openings in a dielectric
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76843Barrier, adhesion or liner layers formed in openings in a dielectric
    • H01L21/76849Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned on top of the main fill metal
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76853Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76855After-treatment introducing at least one additional element into the layer
    • H01L21/76856After-treatment introducing at least one additional element into the layer by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76853Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76861Post-treatment or after-treatment not introducing additional chemical elements into the layer
    • H01L21/76864Thermal treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76867Barrier, adhesion or liner layers characterized by methods of formation other than PVD, CVD or deposition from a liquids
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76886Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H01L23/53238Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
GB0309476A 2002-04-26 2003-04-25 Copper silicide passivation for improved reliability Expired - Fee Related GB2390742B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US13378202A 2002-04-26 2002-04-26

Publications (3)

Publication Number Publication Date
GB0309476D0 GB0309476D0 (en) 2003-06-04
GB2390742A GB2390742A (en) 2004-01-14
GB2390742B true GB2390742B (en) 2006-07-19

Family

ID=22460275

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0309476A Expired - Fee Related GB2390742B (en) 2002-04-26 2003-04-25 Copper silicide passivation for improved reliability

Country Status (4)

Country Link
JP (2) JP2003347302A (en)
KR (1) KR101005434B1 (en)
GB (1) GB2390742B (en)
TW (1) TWI278963B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8344509B2 (en) 2009-01-19 2013-01-01 Kabushiki Kaisha Toshiba Method for fabricating semiconductor device and semiconductor device

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101028811B1 (en) * 2003-12-29 2011-04-12 매그나칩 반도체 유한회사 Method of forming a dual damascene pattern in a semiconductor device
US7229911B2 (en) * 2004-04-19 2007-06-12 Applied Materials, Inc. Adhesion improvement for low k dielectrics to conductive materials
US20050233555A1 (en) * 2004-04-19 2005-10-20 Nagarajan Rajagopalan Adhesion improvement for low k dielectrics to conductive materials
JP2007109736A (en) * 2005-10-11 2007-04-26 Nec Electronics Corp Semiconductor device and method of manufacturing same
US8884441B2 (en) 2013-02-18 2014-11-11 Taiwan Semiconductor Manufacturing Co., Ltd. Process of ultra thick trench etch with multi-slope profile

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04192527A (en) * 1990-11-27 1992-07-10 Toshiba Corp Semiconductor device
US5447887A (en) * 1994-04-01 1995-09-05 Motorola, Inc. Method for capping copper in semiconductor devices
JPH1187499A (en) * 1997-09-04 1999-03-30 Sony Corp Semiconductor device and its manufacture
US6303505B1 (en) * 1998-07-09 2001-10-16 Advanced Micro Devices, Inc. Copper interconnect with improved electromigration resistance
US20020155702A1 (en) * 2001-02-21 2002-10-24 Nec Corporation Manufacturing method of semiconductor device
US6515367B1 (en) * 2000-09-30 2003-02-04 Advanced Micro Devices, Inc. Sub-cap and method of manufacture therefor in integrated circuit capping layers
EP1282168A2 (en) * 2001-08-01 2003-02-05 Matsushita Electric Industrial Co., Ltd. Semiconductor device and its fabrication method

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01103840A (en) * 1987-10-16 1989-04-20 Sanyo Electric Co Ltd Dry etching
JPH11191556A (en) * 1997-12-26 1999-07-13 Sony Corp Manufacture of semiconductor device and forming method of copper or copper alloy pattern
JP2000058544A (en) * 1998-08-04 2000-02-25 Matsushita Electron Corp Semiconductor device and manufacture of the same
JP2000195820A (en) * 1998-12-25 2000-07-14 Sony Corp Forming method of metal nitride film and electronic device using the same
JP2001185549A (en) * 1999-12-24 2001-07-06 Toshiba Corp Method for manufacturing semiconductor device
JP3643540B2 (en) * 2000-02-21 2005-04-27 株式会社日立製作所 Plasma processing equipment

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04192527A (en) * 1990-11-27 1992-07-10 Toshiba Corp Semiconductor device
US5447887A (en) * 1994-04-01 1995-09-05 Motorola, Inc. Method for capping copper in semiconductor devices
JPH1187499A (en) * 1997-09-04 1999-03-30 Sony Corp Semiconductor device and its manufacture
US6303505B1 (en) * 1998-07-09 2001-10-16 Advanced Micro Devices, Inc. Copper interconnect with improved electromigration resistance
US6515367B1 (en) * 2000-09-30 2003-02-04 Advanced Micro Devices, Inc. Sub-cap and method of manufacture therefor in integrated circuit capping layers
US20020155702A1 (en) * 2001-02-21 2002-10-24 Nec Corporation Manufacturing method of semiconductor device
EP1282168A2 (en) * 2001-08-01 2003-02-05 Matsushita Electric Industrial Co., Ltd. Semiconductor device and its fabrication method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8344509B2 (en) 2009-01-19 2013-01-01 Kabushiki Kaisha Toshiba Method for fabricating semiconductor device and semiconductor device
US8536706B2 (en) 2009-01-19 2013-09-17 Kabushiki Kaisha Toshiba Method for fabricating semiconductor device and semiconductor device

Also Published As

Publication number Publication date
TW200408055A (en) 2004-05-16
JP2010232676A (en) 2010-10-14
GB0309476D0 (en) 2003-06-04
GB2390742A (en) 2004-01-14
KR20030084761A (en) 2003-11-01
KR101005434B1 (en) 2011-01-05
JP2003347302A (en) 2003-12-05
TWI278963B (en) 2007-04-11

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20160425