GB2312601A

GB2312601A - Graphics display adapters

Info

Publication number: GB2312601A
Application number: GB9706595A
Authority: GB
Inventors: Charles Ray Johns; Gary Allen Neal; John Thomas Roberson
Original assignee: International Business Machines Corp
Current assignee: International Business Machines Corp
Priority date: 1996-04-22
Filing date: 1997-04-01
Publication date: 1997-10-29
Anticipated expiration: 2017-04-01
Also published as: CN1114855C; HK1005387A1; GB2312601B; KR970071364A; GB9706595D0; CN1167941A; JP3297344B2; TW319866B; JPH1055160A; KR100288662B1

Abstract

The invention provides an apparatus and method of windowing a VGA image on a screen. The apparatus is a graphics adapter that contains a VGA controller 425, a rasterizer engine 420 and a frame buffer 430 having a displayable (432) and a non-displayable memory (434). The VGA controller stores, processes and retrieves VGA data from the non-displayable memory of the frame buffer and provides the data to the rasterizer engine for further processing such as to window the VGA image on a display screen. After processing, the accelerated graphics processor of the rasterizer engine 420 stores the VGA data as well as other graphics data in the displayable memory 432 of the frame buffer to be later displayed.

Description

GRAPHICS DISPLAY ADAPTERS The present invention relates generally to graphics display adapters and more particularly to an adapter having the capability of displaying a video graphics array (VGA) image in a window.

Accelerated graphics display adapters, with higher functions are becoming widely used in the industry. Consequently, these adapters are slowly replacing VGA adapters as the industry standard. Accelerated graphics adapters contain their own dedicated processors to render image information to a memory device. VGAs, on the other hand, use the system or host computer's processors to render the image information to the memory device. Due to the dedicated processors, accelerated graphics adapters are faster and more efficient than VGAs.

However, because of existing VGA applications, there has been a persistent need in the industry to continue providing VGA adapters. To satisfy this need, some display adapter manufacturers have designed accelerated graphics display adapters with VGA capability. Fig. 1 depicts an accelerated graphics adapter having such VGA capability.

Graphics adapter 100 comprises accelerated graphics controller 110 with a VGA port and an input port. The graphics controller 110 is connected to a frame buffer 130 which is further connected to random-access memory digital-to-analog converter (RAMDAC) 150. RAMDAC 150 has a display port which is used to provide the image to a display monitor 160. RAMDAC 150 also has a VGA port for receiving VGA image data. The graphics adapter 100 further comprises a VGA controller 120 connected to the VGA port of the accelerated graphics controller 110, the VGA port of the RAMDAC 150 and to a dynamic random access memory (DRAM) 140.

Accelerated graphics data received from the input port of the controller 110 is processed by the accelerated graphics controller 110 and stored in the frame buffer 130. When the data is ready to be displayed, it is sent to RAMDAC 150 to be ultimately displayed on monitor 160. VGA data received by the accelerator controller 110 is transferred to the VGA controller 120 through the VGA port to be stored in DRAM 140.

When the data is ready to be displayed, it is retrieved from DRAM 140 by the VGA controller 120 and sent to the RAMDAC 150 through the VGA port of the RAMDAC 150.

As shown in Fig. 1, these accelerated graphics adapters use two memory devices in order to be VGA compatible, frame buffer 130 and DRAM 140. The use of these two memory devices contributes to the overall cost of the adapters.

Often times and for various reasons, a user may want to display a VGA image and an accelerated image simultaneously on a screen. In this case, each image is displayed in a window. However, the graphics adapter in Fig. l does not allow utilizing the accelerated controller when VGA generated images are displayed. More specifically, the use of the VGA controller specifies the operation of the RAMDAC 150. VGA controlled RAMDAC operation is incompatible with accelerated graphics controlled RAMDAC operation. Hence, it has not been possible to simultaneously display VGA image and an accelerated image on a screen.

Therefore, there is a need in the art for a display adapter with VGA capability that uses only one memory device to store graphics images, including VGA images, and also allows for the simultaneous display of VGA and accelerated graphics images.

The need in the art is addressed by the present invention. The invention provides an apparatus and method of windowing a VGA image on a display screen. The apparatus is a graphics adapter that contains a VGA controller, a rasterizer engine and a frame buffer having a displayable and a non-displayable memory. The VGA controller stores and retrieves VGA data from the non-displayable memory of the frame buffer and provides the data to the rasterizer engine for further processing such as to window the VGA image on the display screen. After processing, the accelerated graphics processor of the rasterizer engine stores the VGA data as well as other graphics data in the displayable memory of the frame buffer to be later displayed. The VGA image data is refreshed after each full screen display of the monitor.

Fig. 1 depicts an accelerated graphics adapter having VGA capability.

Fig. 2 is a block diagram of a digital computer utilized by a preferred embodiment of the invention.

Fig. 3 is a block diagram of portions of a graphics adapter.

Fig. 4 depicts a detailed block diagram of the apparatus used to display multiple windows on a display monitor.

Fig. 2 is a block diagram of a digital computer 200 utilized by a preferred embodiment of the invention. The computer includes main processor 210 coupled to a main memory 220 in computer box 205 with input device(s) 230 and output device(s) 240 attached. Input devices(s) 230 may include a keyboard, mouse, tablet or other types of input devices.

Output device(s) 240 may include a text monitor, plotter or other types of output devices. The main processor(s) 210 may also be coupled to graphics output device(s) 310 such as a graphics display through a graphics adapter 300. The graphics adapter 300 may be located in an adapter slot 260A. The graphics adapter 300 receives instructions regarding graphics from the main processor(s) 210 on bus 250. A modem or other communications adapter 350 and a hard disk 355 may also be located in slots 260C and 260D to provide communications with the main processor(s) 210 across bus 250. Modem 350 may communicate with other data processing systems 370 across communications line 360. The main memory 220, hard disk 355 and floppy disks are referred to as memory.

The invention is implemented within graphics adapter 300. Fig. 3 is a block diagram of portions of graphics adapter 300 described above with reference to Fig. 2. These portions comprise an address decoder 480 coupled to a rasterizer engine 420 and a VGA controller 425. The VGA controller 425 and the rasterizer engine 420 are coupled to each other.

The address decoder 480 is used to transfer data to either the rasterizer engine or the VGA controller. Address decoders are well known in the art and their implementation is not herein described. The rasterizer engine determines which pixels are to be updated for rendering a particular image data and how to update the pixels to create a visually accurate display. The VGA controller 425 updates the VGA memory with image data from processor 210. Also comprised in the portions of graphics adapter 300 is a frame buffer 430. Frame buffer 430 contains a displayable memory 432 and a non-displayable memory 434. Frame buffer memory 430 is connected to rasterizer engine 420. The VGA controller 425 uses nondisplayable memory 434 for storing VGA data. The displayable memory 432 is further connected to RAMDAC 440.

Ordinarily, if the graphics system is designed to display 1024x768 or 768 Bytes of data, the frame buffer is provided with a storage capacity of 1024 Kbytes of data. 768 Kbytes of this storage capacity are used to contain data that will ultimately be displayed and thus are referred to as displayable memory. The other 256 Kbytes of the storage capacity are not used to hold data destined to be displayed and are therefore called non-displayable memory. As the 256 Kbytes of storage capacity often times are not used for any purpose, they are ordinarily squandered. The present invention advantageously uses this storage capacity to store VGA image data and eliminates the need of a separate memory device to store the data. Note that although the invention is described using a system designed to display 768 Kbytes of data, systems designed to display different sizes of image data may be used. For example, a system designed to display 1280 Kbytes of image data uses a frame buffer having 2048 Kbytes of storage capacity. The unused 768 Kbytes of the frame buffer may then be utilized as VGA memory.

Conventional VGA memory devices or DRAMs are usually divided into four mappings. Each of the mappings is used to hold different information about the image. For example in text mode, the first mapping may hold character code information. The second mapping may hold attribute information whereas the third mapping may hold font information. The fourth mapping is ordinarily used in graphics modes only. Similarly, the non-displayable memory 434 is divided into four memory mappings to hold the different information data about the VGA image. Although the non-displayable portion of the frame buffer may be physically divided into the four mappings, in this case it is virtually divided into the mappings. That is, the VGA controller uses an addressing scheme for effectively using the memory as four different mappings. For efficient transfer, the VGA map data is combined into a single access of memory 434.

In operation, when the host processor 210 transfers data to the graphics adapter 300, the address decoder 480 decodes the address of the data to determine whether to transfer the data to the rasterizer engine 420 or to the VGA controller 425. Data transferred to the VGA controller 425 is processed by the VGA controller and transferred to non-displayable memory 434 for storage. Similarly, data transferred to the rasterizer engine 420 is processed and sent to displayable memory 432 for storage.

When the VGA data is ready to be displayed, the VGA controller 425 retrieves the data from non-displayable memory 434, processes the data as required to produce the image and transfers it to the rasterizer engine 420. The rasterizer engine 420 transfers the VGA data to the memory 432 to produce a composite image of the VGA image and any image produced by the rasterizer engine 420. The rasterizer engine is supplied with the desired address for the origin of the VGA image window in the composite image, by the main processor 210 of FIG. 2. The VGA image data is mapped into the Displayable Memory 432 starting at the origin address with the VGA image size being defined by the VGA mode of operation. The VGA image may also be scaled, if necessary, to fit with the final screen resolution produced for Display 470. The processed data is then transferred to displayable memory 432 for storage. When data in displayable memory 432 is ready to be displayed, it is transferred to display 470 through RAMDAC 440.

Image data in displayable memory 432 is displayed on display monitor 470 in raster scanning fashion. That is, the image is displayed through line-by-line sweeps of a modulated electron beam by a scanner across the entire display space of display monitor 470. Accordingly, image data corresponding to the left uppermost pixel of the monitor is provided first and data corresponding to the right lowermost pixel is provided last. Upon reaching the right lowermost pixel, the beam will vertically blank or be turned off to inhibit displaying pixels as it is returning to the left uppermost pixel location on the monitor. At the start of the vertical blank, the VGA controller 425 begins reading the data from non-displayable memory 434 and provides it to the rasterizer engine 420 for processing. The rasterizer engine 420 processes the data and stores it in displayable memory 432. Thus, the VGA image is produced in memory 432 prior to the time the image data is required for the raster scanning process of display 470. This synchronizes the VGA image generation to the display 470 creation and avoids the situation where the image in memory is partially complete (part new image and part previous image) when scanned for display. Note that accelerated data in displayable memory 432 is refreshed each time the main processor 210 transfers accelerated graphics data to the graphics adapter.

Fig. 4 depicts a detailed block diagram of the apparatus used to display multiple windows on a display monitor. The apparatus comprises graphics processor 510 connected to the frame buffer 520, a window identifier (wid) 530 and the RAMDAC 540. RAMDAC 540 is also connected to wid 530 and frame buffer 520. Graphics processor 510, included in rasterizer engine 420 of Fig. 3, transfers data to be displayed (both VGA and accelerated graphics) to frame buffer 520 over data bus 570.

Graphics processor 510 also transfers addressing information of the transferred data to wid 530 over address bus 580. The palette of colours in LUT 545 is updated by graphics processor 510 via control bus 560.

The wid 530 and the displayable memory 520 are identically mapped.

That is, each location in the wid 530 corresponds to a pixel location in the memory 520. The wid 530 generates a code that is used by RAMDAC 540 to determine the attributes of the corresponding pixel, such as the pixel's colour depth etc. The RAMDAC 540 uses these attributes to select the correct interpretation of the data for a particular window such as the number of bits per pixel, palette address, etc. Consequently, VGA image data as well as accelerated image data may be displayed simultaneously on a display monitor, each in its respective window with its respective pixel interpretation. For example, 8 bits per pixel VGA data may be displayed with 16 bit per pixel accelerated image.

Although the present invention has been fully described above with reference to specific embodiments, other alternative embodiments will be apparent to those of ordinary skill in the art. Therefore, the above description should not be taken as limiting the scope of the present invention which is defined by the appended claims.

In summary there is described an apparatus and method of windowing a VGA image on a screen. The apparatus is a graphics adapter that contains a VGA controller, a rasterizer engine and a frame buffer having a displayable and a non-displayable memory. The VGA controller stores, processes and retrieves VGA data from the non-displayable memory of the frame buffer and provides the data to the rasterizer engine for further processing such as to window the VGA image on a display screen. After processing, the accelerated graphics processor of the rasterizer engine stores the VGA data as well as other graphics data in the displayable memory of the frame buffer to be later displayed.

Claims

1. A graphics display adapter capable of windowing VGA image comprising: a rasterizer engine for processing and storing graphics image data, including VGA image data, in a display memory and for displaying a plurality of graphics image represented by said graphics image data simultaneously on a display monitor, each image data being in a respective window.

2. The graphics display adapter of Claim 1 wherein said display memory includes a displayable and non-displayable memory portions.

3. The graphics display adapter of Claim 1 or 2 wherein said nondisplayable memory portion is divided into four mappings, each mapping for storing information data for a VGA image.

4. The graphics display adapter of Claim 1, 2 or 3 further comprising a VGA controller, said VGA controller for storing, processing and retrieving VGA image data from said non-displayable memory portion of said display memory.

5. The graphics display adapter of Claim 4 wherein said retrieved VGA image data are provided to said rasterizer engine to be stored in said displayable memory of said frame buffer and to be windowed on said screen.

6. The graphics display adapter of any of Claims 1 to 5 wherein VGA image data are provided to said rasterizer engine by said VGA controller after each full screen display.

7. The graphics display adapter of Claim 3 or any claims dependent on Claim 3 wherein said VGA image is scaled by said rasterizer engine to fit with a final screen resolution.

8. A method of windowing VGA image data comprising the steps of: obtaining and processing graphics image data, including VGA image data; storing said graphics image data in a display memory; displaying a plurality of said graphics image data simultaneously on a display monitor, each image data being in a respective window.

9. The method of Claim 8 wherein said display memory includes a displayable and non-displayable memory portions.

10. The method of Claim 8 or 9 wherein said non-displayable memory portion is divided into four mappings, each mapping for storing information data for a VGA image.

11. The method of Claim 8, 9 or 10 further comprising the step of storing, processing and retrieving VGA image data by a VGA controller from said non-displayable memory portion of said display memory.

12. The method of Claim 11 wherein said retrieved VGA image data is provided to said rasterizer engine to be stored in said displayable memory of said display memory and to be displayed on said screen in a window.

13. The method of any of Claims 8 to 12 wherein VGA image data is provided to said rasterizer engine by said VGA controller after each full screen display.

14. The method of claim 10 or any claim dependent on Claim 10 wherein said VGA image is scaled by said rasterizer engine to fit a final screen resolution.

15. A graphics display adaptor is substantially described herein with reference to Figure 4.