GB2173930B - Physical modelling device for use with computer-aided design - Google Patents

Physical modelling device for use with computer-aided design

Info

Publication number
GB2173930B
GB2173930B GB08612548A GB8612548A GB2173930B GB 2173930 B GB2173930 B GB 2173930B GB 08612548 A GB08612548 A GB 08612548A GB 8612548 A GB8612548 A GB 8612548A GB 2173930 B GB2173930 B GB 2173930B
Authority
GB
United Kingdom
Prior art keywords
computer
aided design
modelling device
physical modelling
physical
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB08612548A
Other versions
GB8612548D0 (en
GB2173930A (en
Inventor
Peter A Stoll
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Daisy Systems Corp
Original Assignee
Daisy Systems Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Daisy Systems Corp filed Critical Daisy Systems Corp
Publication of GB8612548D0 publication Critical patent/GB8612548D0/en
Publication of GB2173930A publication Critical patent/GB2173930A/en
Application granted granted Critical
Publication of GB2173930B publication Critical patent/GB2173930B/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/33—Design verification, e.g. functional simulation or model checking

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)
GB08612548A 1984-09-17 1986-05-22 Physical modelling device for use with computer-aided design Expired GB2173930B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US65142784A 1984-09-17 1984-09-17

Publications (3)

Publication Number Publication Date
GB8612548D0 GB8612548D0 (en) 1986-07-02
GB2173930A GB2173930A (en) 1986-10-22
GB2173930B true GB2173930B (en) 1988-05-25

Family

ID=24612823

Family Applications (2)

Application Number Title Priority Date Filing Date
GB08520915A Expired GB2164768B (en) 1984-09-17 1985-08-21 Physical modelling device for use with computer-aided design
GB08612548A Expired GB2173930B (en) 1984-09-17 1986-05-22 Physical modelling device for use with computer-aided design

Family Applications Before (1)

Application Number Title Priority Date Filing Date
GB08520915A Expired GB2164768B (en) 1984-09-17 1985-08-21 Physical modelling device for use with computer-aided design

Country Status (4)

Country Link
JP (1) JPS6172365A (en)
DE (1) DE3532484A1 (en)
FR (1) FR2570527B1 (en)
GB (2) GB2164768B (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4937827A (en) * 1985-03-01 1990-06-26 Mentor Graphics Corporation Circuit verification accessory
US4744084A (en) 1986-02-27 1988-05-10 Mentor Graphics Corporation Hardware modeling system and method for simulating portions of electrical circuits
US4821173A (en) * 1986-06-30 1989-04-11 Motorola, Inc. Wired "OR" bus evaluator for logic simulation
US4998250A (en) * 1988-09-08 1991-03-05 Data I/O Corporation Method and apparatus for determining an internal state of an electronic component
US5353243A (en) * 1989-05-31 1994-10-04 Synopsys Inc. Hardware modeling system and method of use
US5335191A (en) * 1992-03-27 1994-08-02 Cadence Design Systems, Inc. Method and means for communication between simulation engine and component models in a circuit simulator
JP3242277B2 (en) * 1995-03-20 2001-12-25 富士通株式会社 Simulation equipment
US5673295A (en) * 1995-04-13 1997-09-30 Synopsis, Incorporated Method and apparatus for generating and synchronizing a plurality of digital signals

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4590581A (en) * 1983-05-09 1986-05-20 Valid Logic Systems, Inc. Method and apparatus for modeling systems of complex circuits

Also Published As

Publication number Publication date
GB8612548D0 (en) 1986-07-02
GB8520915D0 (en) 1985-09-25
DE3532484A1 (en) 1986-03-27
JPS6172365A (en) 1986-04-14
GB2164768B (en) 1988-05-25
GB2173930A (en) 1986-10-22
FR2570527B1 (en) 1989-08-25
GB2164768A (en) 1986-03-26
FR2570527A1 (en) 1986-03-21

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Legal Events

Date Code Title Description
PE20 Patent expired after termination of 20 years

Effective date: 20050820