GB2123143A - Area measuring apparatus - Google Patents

Abstract

Area measuring apparatus, in particular leaf area measuring apparatus determines the area of an object and has memory means for storing data representing the area of the object so that the data thus stored may be output at a later time to a printer or computer. The apparatus comprises a transparent conveyor which conveys the leaf being measured between a light source and a linear detector array, and means to count signals from the array to determine the leaf area. Detector sensitivity may be adjusted so that only signals above a predetermined level are counted. <IMAGE>

Description

SPECIFICATION Improvements in or relating to area measuring apparatus This invention relates to improvements in or relating to area measuring apparatus and finds particular application in the case of apparatus for measuring the area of plant leaves.

In a known leaf area measuring apparatus, the leaf or leaves to be measured are placed between guides on a transparent movable belt and then conveyed through an optical system which detects the area of the leaf or leaves. Display means are provided to displaythe area of the leaf or leaves measured or a cumulative total of such areas. These measurements maythen be noted down bythefield orlaboratory worker using the apparatus.

Apparatus has been proposed in U.S. Patent No.

3,782,833 to enable non-destructive area measuremenu to be carried out. In such apparatus, the leaf, still attached to its stalk, is placed'in an optical sensing arrangementwhich comprises a linear array of photosensitive elements for detecting the width of the leaf at any point. The optical sensing arrangement is then moved relative to a fixed reference point provided by, for example, holding a tab atthe end of a cord wound on a spool in the apparatus atthe base of the leaf and the output pulsesignalsfrom the elements of the width-sensing array are then integrated over the length the array has moved relative to the fixed reference point. The area of the leaf thus measured is then displayed on a display board and can be noted down bythe operator.

In the known apparatus described above, the output pulse from each element of the optical array is recognised as being either illuminated or obstructed bythe leaf by comparing the pulse height with a preset threshold. This threshold is arranged to be variable within a range of zero up to the maximum pulse height delivered by the sensing elements in practice. This however provides a very limited range of adjustment with no real possibility of discriminating between areas of a leaf with different light transmission properties.

According to the present invention, in one aspect thereof, there is provided area measuring apparatus, comprising means for determining the area of an object and memorymeansforstoring data representing the area measured so that the data thus stored may be output at a later time to a printer or computer.

In another aspect, the invention provides area measuring apparatus, comprising a light source, conveyormeansfortransporting an objectwhose area isto be measured pastthe light source, an array of light sensitive elements positioned to receive light from the light source via the conveyor means and each adapted to output a signal indicative of the amount of light received thereby, means for counting the signals output from the light sensitive elements which are above a given threshold in orderto determine the area or a predetermined partial area of the object being measured, and means for applying an adjustable DC bias to the output signals of the light sensitive elements to vary the sensitivity of the counting means.

In orderthatthe invention may be more readily understood, an embodiment thereof will now be described, by way of example, with reference to the accompanying drawings, in which:~ FIGURE 1 is a diagrammatic perspective view of leaf area measuring apparatus embodying the invention; FIGURE 2a illustrates diagrammatically a control panel ofthe apparatus; FIGURE 2b illustrates diagrammatically a back panel of the apparatus; FIGURE 3 is a schematic side view of roller and belt assemblies ofthe apparatus; FIGURE 4a is a schematic side view of part of an optical system of the apparatus; FIGURE 4b is a schematic plan view of the optical system; FIGURE 5 is a block diagram of the circuitry of the apparatus; FIGURE 5a is a circuit diagram of a mains power supply and battery charger circuit ofthe apparatus;; FIGURE 5b is a circuit diagram of a switched mode power supply circuit; FIGURE 5c is a circuit diagram of a logic board circuit ofthe apparatus; FIGURE 5d is a circuit diagram of video circuitry of the apparatus; FIGURE 5e is a circuit diagram of the counter circuitryofthe apparatus; FIGURE 6 is a block diagram of a microprocessor controlled analyser of the apparatus; and FIGURES 7a and 7b are flow charts illustrating the operation ofthe apparatus.

Referring nowto the drawings, Figure 1 is a schematic perspective view of one embodiment of leaf area measuring apparatus in accordance with the invention.

The illustrated apparatus comprises an upper roller and transparent belt assembly 1 and a lower roller and transparent belt assembly 2. Drive means (not shown) is provided for driving the rollers so that, in use of the apparatus, a leaf whose area is to be measured is guided between the belts through an optical system, light passing through the bottom belt being detected by circuitry to be described hereinafter which determines the area of the leaf and displays the area on a display panel 3 ofthe apparatus.

As can be seen from Figures 1 and 3, each roller and belt assembly comprises a transparent belt 4 and a plurality of rollers 5 rotatably mounted in sliding self-aligning bearings on a wall 6 ofthe apparatus and a respective one of upper and lower bearing walls 7 and 8. The upper and lower roller and belt assemblies each have a respective tensioner roller 5' which has both coarse and fine adjustments associated there with to enable the belts to becorrnctlytensionedso that various irregularstretching in the belts is taken up thus increasing the useful life of the belts which when correctly tensioned will not rub or bend over the edges of the belt track.

Each end of each tensioner roller 6 is mounted iii a respective bearing support9orS'. One bearing support 9 of each tensioner roller 5' is spring mounted to the wall 6 while the other bearing support or isheld in place on the wall 7 or 8 by means of two cap head screws 10 engaging in a slotted end of the support 9'.

The cap head screws 10 are adjustable by means of appropriate Allen keys to enable coarse adjustment of the associated tensioner roller5'. A grub screw 11 is positioned on each side of each bearing support 9'.

Adjustment of the two grub screws 11 associated with a respective tensioner roller5' by use of appropriate Allen keys allowsforfine adjustment of the tensioner roller 5' to enable the differential stiffness of the associated belt to be taken up thus allowing the belt to run for a long period of time without undesirable lateral movement.

One roller of each set of rollers is designated as a drive roller and is connected by an endless drive belt (not shown) to the drive means (not shown), the other rollers of each set of rollers are connected to the associated drive roller by gearing (not shown).

As can be seen from Figure 1 and Figures 4a and 4b, the optical system comprises a light source 13, for example a warm white or growlux 8W fluorescent tube, mounted between the walls 6 and 7 in a protectivetube 14. In the arrangement shown in Figure 1, an end cap 15 of the protective tube 14 projects from the wall 7 to allow easy replacement of the light source 13.

Referring now to Figures 4a and 4b specifically, light from the light source 13 transmitted through the lower transparent belt 4 passes through a first slot 16 of a first light baffle 17 and then through a second slot 18 of a a second baffle 19 immediately belowthefirst baffle.

Thefirstslot 16 is 2 mm wide and 128 mm long,the length of the slot being measured across the width of the belt 4while the second slot is 6 mm wide and 110 mm long. Light exiting from the second slot 18then passes through a third slot 20 which is 9.525 mm wide and 98.425 mm long (3/8" wide by 37/8" long)formed in a base 21 of the apparatus and is then reflected from a front aluminised mirror 22, the plane of which is positioned at 45"to the vertical or axis ofthe light beam. The first mirror 22 is arranged to be 175 mm belowthe lower belt 4 and 45 mm belowthe base 21 of the apparatus. The light beam is thus deflected through 900 into the horizontal plane.The light beam travelling in the horizontal plane is next reflected from a a second front aluminised mirror 23 the plane of which is placed at 450 to the axis of the light beam so as to deflectthe beam through 900 in the horizontal plane.

Both mirrors 22 and 23 made from 4 mm float glass, the first mirror being 15 mm wide and 95 mm long and the second mirror being 25 mm wide and 70 mm long.

The twice deflected light beam then passes through an adjusting lens 24 which is a four element F.2.0 enlarger lens (or other high quality lens) which gives a very even and flat field of view and is finally incident in a a photodiode array 25 of the video circuitry which will be described below.

Figure 5 is a block diagram of the circuitry of the leaf area measuring apparatus.

As shown in Figure 5, the apparatus comprises a ) main power supply and battery charger circuit (MPS circuit) 45 which has an internal lead acid battery 46 chargeable by connection to a mains AC voltage source. An external 12 volt battery 47, for example a car battery, may be connected to the MPS circuit 45 as an alternative power supply. A battery test circuit 48 is connected to the MPS circuit so that the battery voltage can be checked. The batterytest circuit 48 comprises, in series, a switch 49, a 39 K (Kilohm) resistor R1 O, a 1 Ov 400 mW Zener diode DI and the battery condition meter 42.

The MPS circuit 45 provides a +6volts DC outputto drive a belt motor 50 when a motor switch 51 is closed.

The MPS circuit 45 also provides a +12 volts DC voltage via the switch 43 and an inverter 53 to drive the light source or lamp 13 when the switch 52 is closed.

The + 12 volts DC supply is also input to a switched mode power supply circuit (SMPcircuit) 54which provides +5v, Ov,-5v and - 1 Ov DC outputs to a video board circuit 57 via a logic board circuit 55 which controls an 8-digit counter 56 and the video board circuit 57.

Figure Sa illustrates, in detail, the MPS circuit 45.

Pins 1 and 2 ofthe circuit provide connections to the live and neutral lines, respectively, of a mains AC supply to enable the internal battery to be charged up in the laboratory. The connection to the live line is provided with a 2Afuse. Pins 1 and 2 ofthe MPS circuit 45 are connected to opposite ends of a primary winding of a 1 #O-1 Sv SOVAtransformer 58. A centre tap ofthesecondarywinding is connectable to the mains earth line via pin 3 of the circuit 45. The transformer 58 is arranged to provide a 15vAC output across its secondary winding.Each end of the secondary winding is connected to the anode of a respective 3051 diode D2 and D3 the cathodes, of which are connected in common to a positive voltage supply line 59. Two 4700 CIF 25V capacitors C4 and C5 are connected in parallel across the common connection of the cathodes of diodes D2 and D3 and the earth line 52 from pin 3 ofthe MPS circuit.

The diodes D2 and D3 and the capacitors C4 and C5 serve to rectify and smooth the output voltage of the secondary winding of the transformer 58 and provide 18 volts DC on load and 22 volts DC off load across the capacitor C5. A470R (ohm) resistor R1 1 and a 15v 400 mW zener diode D4 are connected in series across the capacitor C5, the cathode of the Zener diode D4 being connected to the resistor R11 and to the base of a BC 237 transistorTR1. .The collector of transistorTR1 is connected via a 470R resistor R12 to the base of a T1 P32AtransistorTR2, the emitter of which is connected via a 1 RS 7W resistor R13 and the resistor R1 1 to the base ofthetransistorTR1.The emitter of the transistorTR1 is connected in common with the emitter of a ZN 3055 orT1 P41 A transistor TR3 to the anode of a first one of two series connected 3051 diodes D5 and D6. The base of the transistorTR3 is connected to the collector oftransistorTR2 while the collector oftransistorTR3 is connected to the emitter of transistorTR2 and via the resistors R13 and R1 1 to the base of transistor TR1 . The transistors TR1 , TR2 and TR3, resistors Tri 1, R12 and R13 and the Zener diode D4form a series voltage regulator which provides 14.3 volts DC across the terminals of the internal lead and battery 46,the positive terminal of which is connected via a SAfuse to the cathode of the diode D5 while the negative terminal is connected to the anode ofthe Zener diode D4. The cathode of the diode D6 is connected to the cathode of a further3051 diode D7.The anode of diode D7 is connected to a positive terminal connection forthe external battery 47, the negative terminal connection being connected to the earth line 52.The lamp inverter 53 in series with the lamp switch 52 is connected across internal battery 46 via the mains on/off switch 42 oracrossthe external battery if connected in circuit so that a+ 12 volt DC supply is provided to the lamp inverter 53. The power supply input pins of the SMP circuit are similarly connected across the internal or external battery to receive a + 12 volts DC supply.

A470 R resistor R14, in series with a 6.8v400 mW Zener diode D8, is connected across the batteries, the anode ofthe Zener diode D8 being connected to the earth line 52. The cathode ofthe Zener diode D8 is connected to the base of a T1 P32AtransistorTR4, the collector of which is connected via a 470R resistor R15 to the base of a T1 P32AtransistorTR5.The collector of the transistorTR5 is connected to the base of a T1 P41A or ZN 3055 transistorTR6. The emitter ofthe transistor TR4 is connected in common with the emitterofthe transistorTR6to the positive pole ofthe motor switch 51 while the collector of the transistorTR6 is con nected to the emitter ofthe transistor TRS which is con nected via th e resisto r R14 to the base of the transistorTR4. The transistors TR4, TR5 and TR6, the resistors R14 and R15 and the Zener diode D8form a series voltage regulatorwhich, when the motor switch 51 is closed is arranged to supply +6 volts DC across the motorterminalsto drive the belt motor 50.

Because of the low impedance of the 6 volt supply, the belt speed varies little with loading. The speed is also unaffected by the battery voltage unless it falls below 9vDC.

Figure 5b is a circuit diagram of the SMP circuit 54.

As shown in Figure 5b, the + 12 volts DC input supplyto the SMP circuit 54 is connected via a 470 f 16v smoothing capacitor C6to a heat sinked voltage regulator REG3 in the form of a 7805 series fixed voltage regulator integrated circuit package. A4K7 (4.7 Kilohm) resistor R16 and a 1 OFF 16v capacitor C7 are connected in parallel across the regulator REG3 to provide a + 5 volts DC output across the capacitor C7 to the video board circuit 57 via the logic board circuit.

Three inverters lV1, lV2, and IV3 of a first 4069 CMOS hexinverter integrated circuit package are connected in series, the input of the inverter IV1 being connected via a 100K resistor R17 and a l00pfcapacitorC8to the input of the third inverter lV3 and via the resistor R17 and a 100KresistorR18totheoutputofthethird inverter IV3, to form an oscillator circuit arranged to oscillate at about 40KHz. The output of the third inverter IV3 is supplied to the clock input of one D flip flop lC4ofa CMOS 4013 Dual Dflipflop integrated circuit package which divides the oscillator frequency by two.The Cl and Cl outputs of the D flip flop are connected via respective 100K resistors R19 and R20 to respective further inverters IV4 and IV5 ofthe first CMOS 4609 hexinverter integrated circuit package.

The output of the second inverter IV2 is connected via a 100pf capacitor C9 to the input of another inverter IV6 of the first 4069 integrated circuit package. A 100K pull up resistor R21 is also connected to the input of the inverter lV6. The output of the inverter lV6 is branched and input via respective diodes D9 and D10 to the inverters IV4 and IV5. The output of inverter IV4 is fed via a 10K resistor R22 to the base of a BC237 transistorTR7 while the output ofthe inverter IV5 isfed via a second 10K resistor R22 to the base of another BC237 transistorTR8. The bases of the two transistors TR7 and TR8 are connected via respective 2K resistors R23 and R24to the Ov power supply line.

The emitters of the transistors TR7 and TR8 are also connected to the Ov power supply line via respective 1 K resistors R25 and R26 whilethe collectors of transistorsTR7 and TR8 are connected to the +1 2 volt supply line via respective 1 K resistors R27 and R28.

The collectors of the transistors TR7 and TR8 are connected to the bases of respective BFVSO heat sinked transistors TR9 and TR1 0, the emitters of which are connected to the Ov power supply line while the collectors thereof are connected to respective ends of the primary winding of a transformer 59. A centre tap of the primary winding is connected to the +12 volt supply line and decoupled from the Ov supply line via a 470us 1 6v capacitor Cm 0. The ends of the secondary winding of the transformer 59 are connected to the cathodes of respective BYW24 diodes D11 and D12, the anodes of which are connected via a 2OpFto the Ov supply line and a centre tap ofthe secondary winding of the transformer 59.

The inverters IV4 and IV5 serve to narrow the output pulses of the flip flop IC4 by about 8,uS to prevent both sets oftransistors TR7 and TR9 and TR8 and TR1O being conducting atthe same time. The transistors TR7 to TR10 and the transformer 59 form a push-pull inverter, the output of which is rectified by the diodes Dl 1 and D12 to give~28 volts off load.

The rectified output of the diodes Dl 1 and Dl 2 is input via two series connected 22R resistors R29 and R30 to a series voltage regulator REG1 in the form of a 79LO5 integrated circuit package. A4K7 resistor R31 and a lOuF l6vcapacitorCl2 are connected in parallel across the output of the regulator REG 1 which provides volts across the capacitor C12 for supply to the video board circuit.

The rectified output is alsosuppliedto asecond 79LO5 regulator REG2 which is connected to the Ov power supply line via a 5.lav 400 mWZenerdiode D13.

The rectified output is also supplied directly to the anode of the Zener diode D13 via a 1 K resistor R32. A 4K7resistorR33andalOuFl6vcapacitorCl3are connected in parallel across the output of the regulator REG2 and the Ov supply line, the regulator REG2 providing a -10 volts output across the capacitor Cl 3.

The +5V, -5V, - 10V and OV outputs are input to the logic board circuit 55 shown in detail in Figure 5c and supplied directly to the video board circuit shown in detail in Figure 5d.

Referring now to Figure so, the logic board circuit is connected to an optocoupler 60 comprising a light emitting diode D14, the anode of which is connected via a 470R resistor R34 to the +5 volts supply while the cathode is connected in common with the emitter of a phototransistorTR11 to the Ov supply line. The collector of the phototransistorTR11 is connected via a 1 K resistor R35 to the +5 volts supply line and via a 33K resistor R36to the input of one Schmitttrigger ST1 of a first CMOS hex Schmitttrigger integrated circuit package CD 4584B produced by National Semiconductors.The output of the Schmitt trigger ST1 is connected to the input of a second Schmitt trigger ST2 of the CMOS CD 4584B package and via an In F capacitor C14to one input of a first NOR gate 61a of a flip flop 61. The one input of the first NOR gate 61a is also connected to the Ov supply line via a 1 OOK resistor R38 is fed back to the input of the first Schmitt trigger ST1 via a 100K resistor R37 and is supplied via a 1 OOpf capacitor Cl S to the base of a BC237 transistorTR12, the emitter of which is connected to earth. The collector of the transistorTRl 2 is connected via a 4K7 resistor R39to the +5 volt supply line and to a start scan input of the video board circuit.The base of the transistorTR12 is connected via a 47K resistor R40 to the +5 volts supply line.

One output of the flip flop 61 is connected via a 1 OOpf capacitor C16 to the input of a further Schmitt trigger ST3 of the second CMOS CD 4584B package. The input ofthe Schmitt trigger ST3 is connected to earth via a 22K resistor R41 . The reset input of the flip flop 61 is connected via a 22K resistor R42 to earth and to an end of scan output pin of the video board circuit 57.

The output of the Schmitttrigger ST3 is connected tothecathodeofan IN4148 diode D15, the anode of which is connected to the connected inputs of a NOR gate 62 which together with the NOR gate 61 a and 61 b ofthe flip flop 61 and a further NOR gate 63 is provided as a CMOS 4001 QUAD NOR gate integrated circuit package.

Three Schmitttriggers ST7, 8and 9 of a second CMOS CD4548B hex Schmitttrigger integrated circuit package are connected in series, the output of the third Schmitttrigger ST9 being fed back to its input via a 22K resistor R42 and lo0pfcapacitorCl7andtothe input ofthefirst Schmitttrigger ST7 via the resistor R42 and a 1 OK resistor R43, to form a clock oscillator circuit. The resistor R43 is connected to the anode of an lN4148 diode D1 6, the cathode of which is connected to earth via an In F capacitor C18 and to the count enable line to the video board circuit via a 10K resistor R44. The count enable line is also connected to the other output ofthe flip flop 61.

The output of the Schmitt trigger ST9 is input via a 1 00pf capacitor C20 to the input of a first one of two further series connected SchmitttriggersSTl0 and So1 1 of the second CMOS CD 4584B package. The input of the Schmitt trigger ST9 is connected to the + 5 volts supply line via a 4K7 resistor R45.

The output of the Schmitttrigger ST1 1 is supplied to the cathode of an lN4148 diode D17, the anode of which is connected to earth via a 1 OOpf capacitor C21 and directlytothe inputofafurtherSchmitttrigger ST4 of the first CMOS CD 4584B integrated circuit package. Video signals from the video board circuit (which is described hereinafter in relation to Figure 5d are input to the Schmitttrigger ST4 via, in series, a further Schmitttrigger ST12 of the second CMOS CD 4584B package, a 4K7 resistor R46 and a IN4148 diode D18.

The output of the Schmitt trigger ST4 is supplied via a 100K resistor R47 to both inputs of the NOR gate 62.

The output of the NOR gate 62 is supplied to one input ofthe NOR gate 63. Clock pulses from the oscillator circuit comprising Schmitttriggers ST7, 8 and 9 are supplied to the other input of the NOR gate 63 via the i resistor R42, lO0pfcapacitorC2l and a further Schmitttrigger ST5 ofthefirst CMOS CD 4584B package. The output of the NOR gate 63 is input to the clock input of one D flip flop 64 of a CMOS 4013 Dual D flip flop integrated circuit package. The Cl1, output of the D flip flop 64 is connected to the clock input of the second Dflipflop 65 and backto its own D1 input.The Q2 output of the second flip flop 65 providesthe count input to the counter circuit (Figure 5e) and is con- nected backto its own D2 input. The dual Dflipflop thus divides the pulses output bythe NOR gate 63 by fourforreasonswhich will be explained hereinafter and supplies the reduced frequency pulses to the counter circuit.

One pole of a counter reset switch 66 is connected via a 1 Kpull up resistor R48tothe +5volts supply line and via a 100K resistor R49 to the input of a further Schmitttrigger ST6 of the first CMOS CD 4584B package. The input of the Schmitttrigger ST6 is connected to earth via an lnf capacitor C22 while the output thereof is connected to the reset inputs of the two flip flops 63 and 64 so that closing of the reset switch resets the flip flop and the counting circuit.

A clock signal to the video board is provided from the oscillator circuit comprising Schmitttriggers ST7, 8 and 9. Thus, the output of Schmitt trigger 5T8 is connected via a 47K resistor R50, having a 100pf capacitor C23 connected thereacross, to the base of a BC237 transistor TRI 3, the emitter of which is connected to the Ov supply line. The emitter of transistorTR13 is connected to the +5volts supply line via a 4K7 resistor R51 and to the clock line to the video board circuit.

Figure 5d, showsthevideo board circuit 57,the photodiode array 25 forms part of an 18 pin Dual in Line (DIL) Integrated circuit IC1 manufactured under the serial number RL 51 2G by EG & G Reticon of Sunnyvale California and hereinafter referred to as a "reticon". The photodiode array 25 comprises 512 diodes each associated with a respective storage capacitor and a MOS multiplex switch for periodic output to an integrated shift register scanning circuit.

An array of dummy diodes is also provided and the photodiode array and dummy diode array are connected respectively via a preamplifierto a video output pin 7 and a dummy output pin 11 ofthe reticon IC1.

Thestartscan signal is inputtothe start pin 2 ofthe reticon while the clock signal is input to pin 17. The voltage suppliesforthe video board are also derived via the logic board circuit 55 from the SMP circuit.

The output pins 7 and 11 ofthe reticon ICI are decoupled by a 5.6 pf (picofarad) capacitor C1 and are connected via respective 220 R (ohm) resistors R1 and R2 to first and second input pins 14 and 1 respectively of a differential video amplifier IC2 in the form of a second 14 pin DIL integrated circuit. The differential video amplifier may be any integrated circuitcompatible with the reticon IC1. For example, in the present case a Motorola MC 1733 differential video amplifier is used. The gain of the amplifier may be selected to be eitherX100 or X400 by connecting together pins 4 and 11 or pin 3 and 12 respectively of the integrated circuit.

The first input pin 14 of the differential video amplifier IC2 is connected to earth via a 1 OOK resistor R3, while the second input pin 1 is connected to earth by parallel connected resistors R4 and R5 of 500K (kilohm) and lOOK respectively.

The output ofthe differential video amplifier is delivered via a 3.3K resistor R6to a firstinputofafirst NOR gate 26 of a third 14 pin DIL integrated circuit IC3 Serial No.4001 B. A 3000pf capacitor C2 is connected across the resistor R6. Avariable DC signal is also applied to the first input ofthe NOR gate 26from the sliderof a variable resistorVR1 of nominal value 5K connected via a 3.3K resistor R7 to a 5 volt supply. The output ofthe NOR gate 26 is connected via a 1 000of capacitorC3to both inputs of a second NOR gate 27.

Both inputsofthe NOR gate 27 are also connected via a 3.3K resistor R9 to a +5 volt supply. The output of the second NOR gate 27 is connected to both inputs of a third NOR gate 28 and is also fed backtothesecond input ofthe first NOR gate 26.

As will be understood, all power supply line to the integrated circuits are decoupled by 0.1 u# ceramic capacitors.

The third NOR gate 28 outputs video pulses which are inputto the video line of the logic board circuit.

The count pulses from the flip flops 64 and 65 are input, as mentioned above, to a counting circuit shown in Figure 5e. The counting circuit comprises two series connected ICM 7224 integrated circuit 8-digit, counters 70 and 71 which drive an 8-digit7 segment LCD display 72 forming part of the display 34 (See Figure 2a). Afurther CMOS 4069 hexinverter integrated circuit package is connected to the circuits 70 and 71 and the display to invert the back plane signal to drive the decimal point.

The count provided by the logic board circuit may also be supplied through a versatile interface adapter (VIA) 30 to a microprocessor 29 (Figure 6) which may be, for example, a Motorola MC 6802 processorwhich operates at KHz and has 128 bytes of internal process or random access memory (RAM). The VIA which may be a Synertek 6522 incorporates a parallel interface and is provided on a separate logic board together with an eight channel 8-bitanalogue-to- digital connector for measuring the battery voltage and video threshold.

The microprocessor 29 which is controlled by a 2.4576 clock signal is provided with upto 8Kof external read only memory (ROM) 31 and an external battery backed-up RAM 32. The battery backed up RAM is capable of sustaining memory for at least 100 hours after loss of external power. The capacity of the external RAM 32 is such as to be sufficient to allow data for upto at least 1350 leaves to be stored. The RAM 32 may, of course, be replaced byotherdata storage means such as disc or tape.

The microprocessor 29 is also connected to a peripheral interface adapter (PIA) 33 in the form of a Motorola MC 6821 integrated circuit for interfacing to a keyboard (notshown) and a liquid crystal display (LCD) capable of displaying upto 32 alphanumeric characters forming part of the display 34. Of course a largerdisplay could be provided clearly, the 32 character display could also be used for displaying the count output from the logic board circuit, in which case the 8-digit display 72 would be redundant.

Preferably, the keyboard has a conventional typewriter layout and isto ASCII (American Standard Code for Information Interchange) standard.

The microprocessor 29 is also connected to an asynchronous communications interface adaptor (ACIA) 35 in fhe form of a Motorola MC 6850 integrated ci rcuit which provides an interface to, for example, a VDU, a printer or a computer. The interface 35 will operate with most RS2532C level devices.

The microprocessor 29 may, of course, receive the video signals directfrom the gate 29 and be programmed to perform the counting operation as a back-up to the logic board. Thus, in an alternative arrangement the logic board circuit may be omitted so that operation of the video board circuit and all data analysis is controlled bythe arrangement shown in Figure 6. In such a case, one ofthetwotimers ofthe Synertek 6522 VIA 30 will provide a clock signal (shown in dotted lines in Figure 6) to pin 17 of the reticon and the voltage supplies to the video board circuit will be provided directly from the SMP circuit.

Ofcourse both the microprocessor and the logic board circuit could be used to determine the count, and therefore the width of the SMP of leaf being scanned, to provide a double check.

Of course, the logic board could simply be connected to the counter circuit without any provision for data analysis but with a simple memory storage arrangement so that the leaf areas measured can be stored and later output to a laboratory computer for analysis. Although not within the scope of this invention,the logic board could be used in a leaf area measuring apparatus having no memory storage means.

Figures 2a and 2b illustrate, respectively, the display and back panels of the apparatus. The display panel includes, apartfrom the LCD display 34, a video threshold control 41 which has a ten turn adjustment and enables the user to alterthe DC bias added to the video signal. The video threshold control is fitted with an analogue counter and scale. The display panel also includes a battery condition meter 42 having a range offromlOtol4voltsoverascaleO-lO,andlamp, mains or battery charge and motor activating switches 43,44 and 45.

The back panel includes a keyboard connector 36, an RS 232Cconnector37 and connectors to a main power supply 39 or a 12v car battery 40.

Atest point 46 is also provided to enable a service engineer to monitorthevideo signal and the differen tial amplifier output. The apparatus has a 2A and a 5A external fuse.

In operation ofthe machine, having switched on the motor, mains or connected battery and lamp and assuming the belts 4 are correctly tensioned, it is first necessary to set the video threshold using calibration discs provided with the apparatus. At the lowest video threshold scale number, the apparatus should give a reading within 1% of the actual area ofthe calibration disc.

In order to measure the area of a leaf or other object the battery condition is first checked by closing the switch 49 (Figure 5) and reading the voltage given on the meter 42. The microprocessor30, may as will be seen hereinafter, also be arranged to checkthe battery voltage and provide a low battery condition signal.

Assuming the battery voltage is nottoo low, the leaf is first placed between two guidelines 47 and then pushed slowly onto the lower belt 41. The leaf should be supported as it emerges from the belt and roller assemblies so as not to fall to meet an antistatic and small leaf removing brush (not shown) positioned so that it rubs gently against the lower belt to obviate static.

The gear drive system moves a disc, the periphery of which is drilled to form slots or holes. The disc is attached to one end ofthe upper drive roller. The periphery edge of the disc passes between the photodiode and phototransistor of the optocoupler so that, as the disc moves, a series of pulses are output from the optocoupler. The spacing ofthe slots or holes in the drilled section of the disc is determined so that a pulse is produced bytheoptocouplerafterthe belt has moved a distance equal to 1 mm and thus the entire leaf is scanned.

Each pulse output from the optocoupler is squared bythe Schmitttriggers ST1 and ST2 and the negative going edge of a pulseforcesthemonostable incorporating the Schmitttrigger ST2 to provide a start signal to pin 2 ofthe reticon to begin a scanning operation. Of course, where the logic board circuit is omitted, as mentioned above, the start pulse will be provided by the microprocessor circuit through the VIA 30 on detection by the microprocessor circuit of an optocoupler pulse. The positive going edge of the pulse fires the monostable incorporating Schmitt trigger STl which setstheflipflop 61. Once the flip flop 61 is set, the diode D16 ceasesto conduct and a countenable signal is sent to the counting circuit.When the diode D16 ceases to conductthe oscillator circuit comprising Schmitttriggers ST7, 8 and 9 begins to oscillate. Clock pulses from the oscillator circuit are buffered by the transistorTR13 and input to the clock input of the reticon via the clock line control to the scanning.

As the leaf passes through the apparatus, some of the lightfrom the light source 13 will be obstructed and accordingly not all the photodiodes of the reticon array will be illuminated. The outputs ofthe diodes are preamplified and input to the shift register of the reticon. At the end of a scan, the photodiodesignals stored in the scan are output in serial form to the differential amplifier IC2 and are compared with the signal from the corresponding dummy diodes in order to eliminate extraneous effects. The amplifier IC2 outputs a train of pulses each of a height proportional to the difference signal for a particular photodiode and associated dummy diode.This train of pulses is input to the first NOR gate 26 ofthe third integrated circuit 1C3 together with a selected DC bias voltage. The result of the delay between the first and second gates and the feeding back of the second gate output is that overlapping pulses on the inputs to the first gate are produced only in the case of pulses from the video amplifierlC2abovea certain threshold, which threshold can be adjusted by adjusting the DC bias.

Therefore pulses are only output from the third gate in response to video pulses from the differential amplifier above the threshold determined by the DC bias selected. On a negative going edge of a clock pulse from the oscillator circuit ST7, 8 and 9, the capacitorC21 will be disharged for 500ns. If the photodiode of the reticon associated with that clock pulse has been illuminated, a video input signal from the third gate 28 of the video board circuitwill be input to the logic board circuit via the video line and inverted by the Schmitt trigger ST12. The inverted video pulse recharges the capacitor C21 via the resistor R46 and the diode D18. The voltage signal across the capacitor is inverted and buffered by the Schmitt trigger ST4 and input to the connected inputs of the NOR gate 62.

If on the positive going edge ofthe clock pulse, the capacitor has been charged up, then the voltage signal at the input of the Schmitt trigger ST4 will be high and therefore the signals to the NOR gate 62 will be low.

The NOR gate 62 will thus produce a high output signal to the NOR gate 63 forcing the output of the NOR gate 63 low. However, if the capacitor C21 has not been charged, then the Schmitt trigger 5T4 will provide high input signals to the NOR gate 62 which will in turn provide a low input signal to the NOR gate 63 so that the NOR gate 63 will produce a high output signal when enabled by the clock pulses from the oscillator circuit ST7, 8 and 9. Thus, the NOR gate 63 produces a high output pulses when the video signal is low indicating that the particular photodiode has not been illuminated. The reticon array provides four photodiodes per square millimeter. Therefore to obtain the area in square millimeters ofthe strip ofthe leaf being scanned, the flip flop 64 and 65 divide the output pulses ofthe NOR gate 63 by four.The output pulses oftheflip flop 65 are sent via the count line to the 8-digit counters which display the area of the strip of leaf scanned on the 8-digit display.

Clearly, the precise timing of the video pulse is unimportant because the video pulses are stored on the capacitor C21 for checking on the positive going edge of the clock pulse.

An end of scan pulse is provided by the reticon to reset the flip flop and disable the counter readyforthe next scan. Movementofthe belt causes the optocouplerto produce another pulse and the reticon to scan the next strip of the leaf. The area of that next strip is determined in the manner described above and the accumulating total of the leaf area displayed on the 8-digit or 32-digit display. The counter may be reset at anytime by closing the resetswitch 66,forexample when a single leaf has been scanned or when a batch of leaves has been scanned, the 8-digit display in one case displaying the area in square millimeters of the single leaf and inthecaseofthetotal area ofthe batch of leaves. Alternatively, the logic board circuit is omitted, the pulses from thethird gate 28 are fed through the VIA 30 to the microprocessor 2 and are counted. At the end of each scan, the total counted is substractedfrom a reference number stored in the ROM.

In the present case, the reference number stored in the ROM will be 512 so that subtracting the total count from the reference number gives the number of diodes obstructed bythe leaf. The arrangement is such thatthere are four diodes to every square millimeter area and accordingly the microprocessor 29 divides byfourthe number obtained by subtracting 512 from the number of pulses counted to obtain the area of the leaf. The microprocessor 29 then delivers a data signal to the LCD display 34via the PIA 33 to cause the area measured to be displayed.

Thus, where the logic board circuit is omitted the counting of the video pulses and control of the reticon is provided by the microprocessor 29 as will be described hereinafter in relation to Figure 7a. The microprocessor is able to receive keyboard instructions from a keyboard (not shown) via the PIA 33 and is programmed to determine the length, maximum width as well as the area of a leaf either automatically on under keypad commands. The alpha-numeric 32-digit display controlled by the microprocessor via the ACIA 35 is provided to display the total area, length and maximum width of a leaf. The microprocessor also keeps a running total ofthe leaf areas measured.

Figure 7a is a flow chart showing the operation of the microprocessor when the logic board circuit is either omitted or both the microprocessor and the logic board countthevideo pulses.

First, the microprocessor initiates various memory areas and then checks via the analogue to digital converter of the VIA 30 that the battery voltage level is alright. If the level istoo lowawarning is given and the microprocessor proceeds to initialise associated peripherals such on the reticon, LCD display, keypad buffer etc and holds the analogue -to - digital converter value. The microprocessor then checks whether the leaf size filter setting is greaterthan 10 cm2 and provides a warning if the leaf filter size is too large. The leaf size filter setting is set from the keyboad and is an importantfeature, removing spurious small areas that are caused by dirt or marks on the transparent belt. The leaf filter setting is determined by use of the MINIMUM command described hereinafter.On detection of an optocoupler pulse, the microprocessor starts the reticon scan and counts the video pulses input bythe VIA 30. When the end of scan pulse from the reticon is detected, the count total (T) is stored in memoryandthe reticon resetforthe next scan. The count total is then subtracted from 512 to determine the number of diodes (X) not illuminated during the scan and, if the result of the subtraction is positive (as against zero), the number is divided by four to determine the area ofthe strip of leaf being scanned in square millimeters (Y). The value of Y may then be displayed and is stored. The optocoupler pulse is then added to the length register which stores a running total of the optocoupler pulses detected since the last time a length was measured.This length register istotallised when Y=O for more than three optocouplerpulses,thatiswhenthe leaf has pastthe slit 16, the total of pulses counted giving the length in millimetres ofthe leaf.

The leaf strip being measured is at all times standard, being determined by the photodiodes ofthe reticon, and the optical system, and is in this particular case equal to 1 mm. Therefore the value Y also gives the width of the strip of leaf being scanned. The microprocessor checks the value of Y against a previous maximum value of Yforthat leaf and if the new value isgreaterthan the old value makes the new value the new maximum width.

The microprocessorthen checks to see if Y=O, if not, the microprocessor waits for the next optocoupler pulse and begins the scanning and counting operation again. If Y=O for more than three optocoupler pulses, that is the leaf has past the slit 16, the microprocessor commences to sum the stored values Y of the areas of the leaf strip scanned to determine the total area of the leaf. Otherwise, the microprocessorcontinuesto checkwhetherY=O. When the microprocessor has determined the total area of the leaf, it determines the leaf length by counting the optocoupler pulses stored when Y is positive and subtracting those for which Y=O. The microprocessorthen makes the current maximum value of the leaf width "the maximum leaf width".

Next, the leaf area is displayed and added to the running total area of leaves measured. The length and maximum width of the leaf are then displayed either automatically or by keypad instructions either on the 8-digit display 72 orthe 32-digit display associated with the keypad. The leaf area, length, maximum width and running area total are then stored and may be provided to PIA fo r output to a printer, com puter or other device when the apparatus is returned to the laboratory.

The microprocessorthen waits forthe next optocoupler pulse to commence a new measuring operation.

Figure 7b is a modified form of the flow chart of Figure 7a showing the operation ofthe microprocessor when the video pulse counting and analysis to produce the value Yin square millimeters of the area of a strip leaf being scanned is carried out only by the logic board circuit.

As can be seen from Figure 7b, the operation of the microprocessor is the same as in the previous case exceptthatthe conversion of the video pulses into the area in millimeters of the leaf strip being scanned is carried out bythe logic board circuit ratherthanthe microprocessor. Thus, upon detection of an optocou pler pulse, the microprocessor merely counts the pulses on the count line of the logic board circuit and on detection of an end of scan stores the total count as Y. The analysis is then carried out as described to above in relation to Figure 7b.

Preferably although not shown in the flow charts the microprocessor 30 is arranged to determine the average area of a batch of leaves, or the average length or width of a batch of leaves or all three.

By means of the keyboard connected to the apparatus, details such as batch number, leaf number, area, width, length, video threshold value and battery status can be stored in the RAM 32 together with the total area of leaves measured in the batch. The LCD display having 32 characters forming part ofthe display 34 provides sufficient space for all the above information to be displayed provided each is restricted to a two digit number.

As mentioned above, the RAM 32 is battery backed-up. Accordingly, the apparatus may be taken back to the laboratory and the data stored therein output to a printer or computer through the RS 232C connector.

The manner in which the sensitivity of the apparatus is adjusted the detection threshold to be varied Dver an extremely large range simply by adjusting a & level, in contrast to known apparatus which priles limited adjustment only of the threshold mer#lv'wiIhii the height of the pulsesthernselves. Apparatus em bodying the inventionthus.#nabIes the #to calculate readilythe amount of virus damage to a leaf.

To make such a measurement, first the total area of the leaf is determined by setting the video threshold to its sensitive level and the total area thus measured is stored in, for example, the RAM 32. The video threshold is then adjusted so that the light pulses produced by the light passing through the damaged areas are counted so that onlythe area of healthy tissue is measured. The setting required will be in the region of 3 to 4. The two values are then subtracted to give the total area of damaged leaf. Of course, this method is applicable to measuring any areas of leaves or other objects having areas which are distinguished from the rest of the leaf or object by differing light transmission properties or by different colours.

Table i Large Ivy Leaf Small Ivy Leaf AV Total 46.82 46.68 5.93 59.29 5.93 46.43 5.94 46.42 5.90 46.29 0.39 5.92 .02 5 46.86 5.93 .03 5.93 46.71 5.93 .05 error 46.68 5.95 =0.84% 46.70 0.70= 1.5% 5.95 46.68 46.99 0.31 5.92 +0.42% 46.87 0.70 error +0 75% 5.92 46.72 513.49 59.29 Black Aluminium Black Plastic Calibration Disc Calibration Disc 49 Total AV AV 29.05 261.65 29.072 49.05 .06 49.11 29.15 49.19 29.12 49.06 28.95 0.122 49.09 28.97 49.24 .13 .19 29.05 49.12 .19 error 49.11 29.14 49.08 29.07 49.16 =0.39% 29.15 0.078 392.89 261.65 0.200 error 40.195% 29.072=0.69% +0.345% The commands which may be input to the microprocessor 29 by The commands which may be input to the microp rocessor 29 by means of a keyboard and their functions are listed below: AREA (ON/OFF) TheAREAcommand is concerned with the display ing and recording of individual leaf areas. It has three functions: i) display the last area value and whether area is being displayed or not; AREA(cr).

ii) start displaying area; AREA ON(cr) iii) stop displaying area; AREAOFF(cr).

BATCH ccccc The BATCH command is used to separate different sample batches from one another. The batch name can be upto five characters long and may contain letters or numbers in any mixture. When data are printed,the BATCH mark allows batch subtotals to be seen.

CLEAR (ALL TOTAL) The CLEAR command is used to zero either: i) all memory; CLEARALL(cr), BE CAREFUL with this command! ii) the running total which is displayed when leaves are being measured; CLEAR TOTAL(cr).

DELETE RECORD nnnn The DELETE RECORD command is used to zero individual records in memory. These records may be caused by turning on the lamp and motor while recording or by operator error. Be CAREFUL with this command Batch marks may be removed, as well as area measurements.

HELP The HELP command lists all the currently sup ported commands in LAA.

LENGTH (ON/OFF) The LENGTH command has three functions: i) display the last length and show whether length is being displayed; LENGTH(cr), ii) display length; LENGTH ON(cr) iii) stop diFplaying length; LENGTH OFF(cr).

MINIMUM (nnpri) LAA all9wsthe user to reject fragments underthe size nnnn.The MINIMUM commandallowsthisvalue to be: i) displayed; MlNlMUM(cr) ii) set; MINIMUM nnnn(cr). Thevalue nnnn must not include a decimal place; to setthe minimum to 10.00, enter MINIMUM 1000(cr).

PRINT(nnnn (mmmm)) PRINT allows all or part of the recorded leaves to be output with batch marks, subtotals andtotal.There are three possibilities: i) print all ofthe records; PRINT(cr).

ii) print records beginning from nnnn and ending at mmmm only; PRINT nnnn mmmm(cr).

iii) print records all the rest ofthe records from nnnn; Printnnnn(cr).

QUERY nnnn QUERY is used to find the values of a single record.

It is intended mainly for retrieval of LAA's data by computer. Records which have not been filled have all their values at zero. The record count can be retrieved bythe RECORD command. Ifthe record QUERIED is a batch mark, the name will be returned.

RECORD (ON/OFF) The RECORD command controls the saving of leaf dimensions in memory. It has three variations: i) displaythe last record numberandwhether data are being recorded; RECORD(cr).

ii) start recording; RECORDON(cr).

iii) stop recording; RECORD OFF(cr) TOTAL (ON/OFF) TheTOTALcommand hasthreefunctions; i) display the lasttotal and showwhethertotals are being displayed or not; TOTAL(cr).

ii) startdisplayingtotals; TOTALON(cr) iii) stop displaying totals; TOTAL OFF(cr) WIDTH (ON/OFF) The width command hasthreefunctions; i) display the lastwidth and showwhetherwidth is being displayed; WlDTH(cr).

ii) start displaying width; WIDTH ON(cr).

iii) stop displaying width; WIDTH OFF(cr).

Claims (14)

1. Area measuring apparatus, comprising means for determining the area of an object and memory meansforstoring data representing the area measu red so that the data thus stored may be output at a latertime to a printer or computer.

2. Area measuring apparatus according to claim 1, wherein the area determining means comprises a light source, conveyor means for transporting the objects whose area isto be measured pastthe light source and means for detecting light transmitted through the conveyor means to thereby determine the area of the object.

3. Area measuring apparatus according to claim 2, wherein the detecting means comprise an array of light sensitive elements each of which outputs a signal indicative of the amount of light received thereby and means are provided for counting the signals output from the light sensitive elements in orderto determine the area ofthe object being measured.

4. Area measuring apparatus according to claim 3, wherein means are provided for altering the sensitivity ofthe counting means so that only pulses of a height above a given threshold are counted.

5. Area measuring apparatus according to claim 4, wherein the sensitivity altering means comprise means for altering a DC bias applied to the outputs of the lightsensitive elements.

6. Area measuring apparatus, comprising a light source, conveyor means for transporting an object whose area isto be measured past the light source, an array of light sensitive elements positioned to receive light from the light source via the conveyor means and each adapted to output a signal indicative of the amount of light received thereby, means for counting the signals outputfrom the light sensitive elements which are above a given threshold in order to determine the area or a predetermined partial area of the object being measured, and means for applying an adjustable DC bias to the output signals of the light sensitive elements to vary the sensitivity of the counting means.

7. Area measuring apparatus according to Claim 3,4,5 or 6, wherein the counting means comprises means for storing each signal outputfrom the light sensitive elements for a predetermined time period before the signal is counted.

8. Area measuring apparatus according to Claim 7, wherein the storing means comprises a capacitor.

9. Area measuring apparatus according to any preceding claim, wherein adjustable selection means are provided so that the apparatus ignores areas of objects smaller than a predetermined limit deter- mined bythe selection means.

10. Area measuring apparatus according to any preceding claim, wherein the memory means is arrangedto store date representingthewidth and/or length of an object.

11. Area measuring apparatus according to Claim 10, wherein the memory means is arranged to store data representing the average area and/or width and/or length of a group of objects.

12. Area measuring apparatus substantially as hereinbefore described with reference to and as illustrated in the accompanying drawings.

13. Leaf area measuring apparatus according to any preceding claim.

14. Any novel feature or combination offeatures described herein.