GB2016245A - Decoding arrangements for digital data - Google Patents

Decoding arrangements for digital data

Info

Publication number
GB2016245A
GB2016245A GB7913412A GB7913412A GB2016245A GB 2016245 A GB2016245 A GB 2016245A GB 7913412 A GB7913412 A GB 7913412A GB 7913412 A GB7913412 A GB 7913412A GB 2016245 A GB2016245 A GB 2016245A
Authority
GB
United Kingdom
Prior art keywords
binary
zero
duration
binary value
value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB7913412A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Smiths Group PLC
Original Assignee
Smiths Group PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Smiths Group PLC filed Critical Smiths Group PLC
Priority to GB7913412A priority Critical patent/GB2016245A/en
Publication of GB2016245A publication Critical patent/GB2016245A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4902—Pulse width modulation; Pulse position modulation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/45—Transmitting circuits; Receiving circuits using electronic distributors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Dc Digital Transmission (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

A decoding arrangement, suitable for use in digital data transmission systems, for decoding serial binary data in which 'one' and 'zero' binary values (41 and 40) are represented respectively by a voltage excursion of duration greater than and less than one half the bit period includes a counter which is arranged to count pulses (45) from an associated oscillator circuit upwardly for the duration of the voltage excursion and downwardly for the duration of the remainder of the bit period for each binary value received whereby the counter value at the termination of the counting operation for each binary value is indicative of whether that binary value is 'one' or 'zero'. The counter value is examined at the termination of the counting operation for each binary value and a signal provided representative of either 'one' or 'zero' as appropriate. The signal may be supplied to a shift register whose contents can be extracted in a parallel format. <IMAGE>
GB7913412A 1978-02-20 1979-04-18 Decoding arrangements for digital data Withdrawn GB2016245A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB7913412A GB2016245A (en) 1978-02-20 1979-04-18 Decoding arrangements for digital data

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB671078 1978-02-20
GB7913412A GB2016245A (en) 1978-02-20 1979-04-18 Decoding arrangements for digital data

Publications (1)

Publication Number Publication Date
GB2016245A true GB2016245A (en) 1979-09-19

Family

ID=26240904

Family Applications (1)

Application Number Title Priority Date Filing Date
GB7913412A Withdrawn GB2016245A (en) 1978-02-20 1979-04-18 Decoding arrangements for digital data

Country Status (1)

Country Link
GB (1) GB2016245A (en)

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2481486A1 (en) * 1980-04-23 1981-10-30 Philips Nv COMMUNICATION SYSTEM WITH INFORMATION BUS
DE3131845A1 (en) * 1981-08-12 1983-02-24 Brown, Boveri & Cie Ag, 6800 Mannheim Method for generating and monitoring digital signals having any desired signal coding
DE3211990A1 (en) * 1982-03-31 1983-10-13 Siemens AG, 1000 Berlin und 8000 München System for transmission of binary data signals and associated bit clock signals from a data signal transmitter to a data signal receiver
EP0106924A1 (en) * 1982-10-26 1984-05-02 Sharp Kabushiki Kaisha Noise reduction in signal transmission system over building power distribution wiring
EP0084429B1 (en) * 1982-01-11 1986-04-23 Sharp Kabushiki Kaisha Automatic receiver gain control in centralized monitor system
DE3643766A1 (en) * 1986-12-20 1988-07-07 Standard Elektrik Lorenz Ag DATA BUS SYSTEM FOR A SERIAL DATA BUS
DE3717886A1 (en) * 1987-05-27 1988-12-22 Reinhard Engstler Method for transmitting data
FR2661058A1 (en) * 1990-04-11 1991-10-18 Northern Telecom Europ Ltd SIGNALING ASSEMBLY AND METHOD FOR MONITORING TELECOMMUNICATIONS REPEATERS.
US5283663A (en) * 1989-08-17 1994-02-01 Asahi Kogaku Kogyo Kabushiki Kaisha Data communication method between circuits
WO1995010885A1 (en) * 1993-10-15 1995-04-20 Apple Computer, Inc. Pulse code bit cell demodulation
EP0805579A2 (en) * 1996-04-30 1997-11-05 Switched Reluctance Drives Limited Demodulator for a pulse width modulated signal
DE102007008935A1 (en) * 2007-02-23 2008-09-04 Austriamicrosystems Ag Integrated circuit for field bus systems, particularly inter integrated circuit system, has detection circuit, which is adjusted to differentiate two signal levels from each other and comparator circuit is adjusted to compare time intervals
JP2014030124A (en) * 2012-07-31 2014-02-13 Denso Corp Decoding circuit

Cited By (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2481486A1 (en) * 1980-04-23 1981-10-30 Philips Nv COMMUNICATION SYSTEM WITH INFORMATION BUS
DE3115455A1 (en) * 1980-04-23 1982-02-25 Naamloze Vennootschap Philips' Gloeilampenfabrieken, 5621 Eindhoven COMMUNICATION SYSTEM WITH DATA BUS
DE3131845A1 (en) * 1981-08-12 1983-02-24 Brown, Boveri & Cie Ag, 6800 Mannheim Method for generating and monitoring digital signals having any desired signal coding
EP0084429B1 (en) * 1982-01-11 1986-04-23 Sharp Kabushiki Kaisha Automatic receiver gain control in centralized monitor system
DE3211990A1 (en) * 1982-03-31 1983-10-13 Siemens AG, 1000 Berlin und 8000 München System for transmission of binary data signals and associated bit clock signals from a data signal transmitter to a data signal receiver
EP0106924A1 (en) * 1982-10-26 1984-05-02 Sharp Kabushiki Kaisha Noise reduction in signal transmission system over building power distribution wiring
DE3643766A1 (en) * 1986-12-20 1988-07-07 Standard Elektrik Lorenz Ag DATA BUS SYSTEM FOR A SERIAL DATA BUS
DE3717886A1 (en) * 1987-05-27 1988-12-22 Reinhard Engstler Method for transmitting data
US5467200A (en) * 1989-08-17 1995-11-14 Asahi Kogaku Kogyo Kabushiki Kaisha Data communication method between circuits
US5283663A (en) * 1989-08-17 1994-02-01 Asahi Kogaku Kogyo Kabushiki Kaisha Data communication method between circuits
US5365350A (en) * 1989-08-17 1994-11-15 Asahi Kogaku Kogyo Kabushiki Kaisha Data communication method between circuits
FR2661058A1 (en) * 1990-04-11 1991-10-18 Northern Telecom Europ Ltd SIGNALING ASSEMBLY AND METHOD FOR MONITORING TELECOMMUNICATIONS REPEATERS.
WO1995010885A1 (en) * 1993-10-15 1995-04-20 Apple Computer, Inc. Pulse code bit cell demodulation
EP0805579A2 (en) * 1996-04-30 1997-11-05 Switched Reluctance Drives Limited Demodulator for a pulse width modulated signal
EP0805579A3 (en) * 1996-04-30 1998-09-23 Switched Reluctance Drives Limited Demodulator for a pulse width modulated signal
US5905406A (en) * 1996-04-30 1999-05-18 Switched Reluctance Drives Limited Demodulator for a pulse width modulated signal and method
KR100442649B1 (en) * 1996-04-30 2004-11-03 스위치드 릴럭턴스 드라이브즈 리미티드 Demodulator for a pulse width modulated signal
DE102007008935A1 (en) * 2007-02-23 2008-09-04 Austriamicrosystems Ag Integrated circuit for field bus systems, particularly inter integrated circuit system, has detection circuit, which is adjusted to differentiate two signal levels from each other and comparator circuit is adjusted to compare time intervals
JP2014030124A (en) * 2012-07-31 2014-02-13 Denso Corp Decoding circuit

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)