JPS55117362A - Input break detection circuit for cmi code - Google Patents
Input break detection circuit for cmi codeInfo
- Publication number
- JPS55117362A JPS55117362A JP2417479A JP2417479A JPS55117362A JP S55117362 A JPS55117362 A JP S55117362A JP 2417479 A JP2417479 A JP 2417479A JP 2417479 A JP2417479 A JP 2417479A JP S55117362 A JPS55117362 A JP S55117362A
- Authority
- JP
- Japan
- Prior art keywords
- input
- frame
- code
- break
- cmi
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
- H04L25/40—Transmitting circuits; Receiving circuits
- H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
- H04L25/4906—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes
- H04L25/4908—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using mBnB codes
- H04L25/491—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using mBnB codes using 1B2B codes
- H04L25/4912—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using mBnB codes using 1B2B codes using CMI or 2-HDB-3 code
Landscapes
- Physics & Mathematics (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Dc Digital Transmission (AREA)
Abstract
PURPOSE:To ensure the assured etection for the input break by making use of the conversion rule of the frame piling CMI code and then detecting logically the continuation of the extracted frame signal. CONSTITUTION:In case the input break is detected for the frame piling CMI (Coded Mark Inversion) code which is used for the high-speed data transmission receiving device or the like, frame signal input 10 supplies the unipolar NRZ frame signal extracted from the frame piling CMI code to the D input terminal of the first FF of n-bit shift register 40 and then applies the clock signal to the CP terminal. Here if the break state occurs at the code row, the continuous state of the frame signal occurs to input 10. Then the logical product is decided for the register output of n units in register 40. Thus break state detection output 30 can be obtained in the assured way.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2417479A JPS55117362A (en) | 1979-03-02 | 1979-03-02 | Input break detection circuit for cmi code |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2417479A JPS55117362A (en) | 1979-03-02 | 1979-03-02 | Input break detection circuit for cmi code |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS55117362A true JPS55117362A (en) | 1980-09-09 |
JPS6340384B2 JPS6340384B2 (en) | 1988-08-10 |
Family
ID=12130980
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2417479A Granted JPS55117362A (en) | 1979-03-02 | 1979-03-02 | Input break detection circuit for cmi code |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55117362A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58205353A (en) * | 1982-05-25 | 1983-11-30 | Sharp Corp | Data trnsmitting system |
JPS6149542A (en) * | 1984-08-17 | 1986-03-11 | Mitsubishi Electric Corp | Cmi code detecting device |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01154161U (en) * | 1988-04-18 | 1989-10-24 |
-
1979
- 1979-03-02 JP JP2417479A patent/JPS55117362A/en active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58205353A (en) * | 1982-05-25 | 1983-11-30 | Sharp Corp | Data trnsmitting system |
JPS6149542A (en) * | 1984-08-17 | 1986-03-11 | Mitsubishi Electric Corp | Cmi code detecting device |
Also Published As
Publication number | Publication date |
---|---|
JPS6340384B2 (en) | 1988-08-10 |
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