GB1444628A - Circuit for the automatic correction of the indication of analogue to digital converters - Google Patents

Abstract

1444628 Analogue to digital converter HARTMAN & BRAUN AG 14 Aug 1973 [14 Aug 1972] 38427/73 Heading H3H In an analogue to digital converter, e.g. of the dual ramp type, calibration is obtained by integrating up a calibration voltage U Cal for a first time interval and integrating down the converter reference voltage U o for a second time interval, any difference between the time at which an output pulse from the comparator 16 occurs and the time the counter 21 attains a predetermined state, e.g. overflows, representing the calibration error which is converted to a direct voltage at 24 and superimposed on the converter reference voltage U o . As shown, a unidirectional counter 21 is continually fed with regular clock pulses from a generator 22. Starting from zero in the counter, U Cal or U x , depending on whether a calibration or measurement is to be performed, is integrated up until the counter 21 overflows. Then U o is integrated down until the comparator 16 gives an output K whereupon the state of the counter is transferred to an indicator 23. For calibration, the counter 21 should be in a predetermined state when K is produced; circuit 20 generates a pulse of width equal to the time difference between signal K and the counter attaining the predetermined state, which pulse is converted to D.C. at 24 and applied to correct the value of the reference voltage U o . Mention is made of the use of a bidirectional counter and of a half-scale zero bias.