JPS5563407A - Phase comparator in servo circuit - Google Patents

Phase comparator in servo circuit

Info

Publication number
JPS5563407A
JPS5563407A JP13678978A JP13678978A JPS5563407A JP S5563407 A JPS5563407 A JP S5563407A JP 13678978 A JP13678978 A JP 13678978A JP 13678978 A JP13678978 A JP 13678978A JP S5563407 A JPS5563407 A JP S5563407A
Authority
JP
Japan
Prior art keywords
signal
phase
pulse
circuit
changed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13678978A
Other languages
Japanese (ja)
Inventor
Yoshifumi Oosugi
Tomio Fukuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Denshi KK
Original Assignee
Hitachi Denshi KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Denshi KK filed Critical Hitachi Denshi KK
Priority to JP13678978A priority Critical patent/JPS5563407A/en
Publication of JPS5563407A publication Critical patent/JPS5563407A/en
Pending legal-status Critical Current

Links

Landscapes

  • Feedback Control In General (AREA)
  • Control Of Velocity Or Acceleration (AREA)
  • Control Of Electric Motors In General (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

PURPOSE: To quickly perform the phase synchronism of the servo circuit, by continuously changing the phase gain of the phase error signal with the control signal.
CONSTITUTION: The counter 4 counts the phase difference of the servo system output signal and the period is controlled with the reset pulse 9. The write-in pulse generator 10 is operated with the reference signal 7 to control the latch circuit 12. The digital signal 5 of the counter 4 is held at the write-in pulse at the latch circuit 12. Accordingly, the output count signal of the circuit 12 is held until the next write-in pulse 11 is inputted. Thus, the D/A converter 14 converts the signal 13 and outputs the phase error signal 15. In this case, the frequency of the clock pulse 3 is changed with the control signal 1. Thus, even if the phase of the signal 6 and the reference signal 7 is the same, by changing the control voltage of the signal 1, the phase gain of the phase comparison circuit can be changed, since the count value of the ounter 4 is changed.
COPYRIGHT: (C)1980,JPO&Japio
JP13678978A 1978-11-08 1978-11-08 Phase comparator in servo circuit Pending JPS5563407A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13678978A JPS5563407A (en) 1978-11-08 1978-11-08 Phase comparator in servo circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13678978A JPS5563407A (en) 1978-11-08 1978-11-08 Phase comparator in servo circuit

Publications (1)

Publication Number Publication Date
JPS5563407A true JPS5563407A (en) 1980-05-13

Family

ID=15183546

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13678978A Pending JPS5563407A (en) 1978-11-08 1978-11-08 Phase comparator in servo circuit

Country Status (1)

Country Link
JP (1) JPS5563407A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS622392U (en) * 1985-06-18 1987-01-08
JPH0230214A (en) * 1988-07-20 1990-01-31 Nec Corp Phase comparing circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS622392U (en) * 1985-06-18 1987-01-08
JPH0540717Y2 (en) * 1985-06-18 1993-10-15
JPH0230214A (en) * 1988-07-20 1990-01-31 Nec Corp Phase comparing circuit

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