GB1298451A - Generator producing a quasi random series of zeroes and ones - Google Patents

Abstract

1298451 Generating random pulses NETHERLANDS APPLIED SCIENTIFIC RESEARCH FOR STATE DEFENCE 31 Jan 1962 [2 Feb 1961] 3773/62 Heading H3P A generator for producing a quasi random series of pulses which can have only two values, the number of pulses of one value being a desired fraction of the number of pulses generated, comprises a periodic pulse generator and a gate circuit controlled by a noise generator and by a control voltage which governs the threshold level of the gate; the control voltage being obtained by counting the pulses appearing at the output of the gate circuit in a counter, diminishing the counter number by a fraction of the pulses generated by the periodic pulse generator, this fraction being the desired probability of occurrence of a pulse at the output of the gate circuit, and converting the contents of the counter into a numerical signal from which the control voltage is derived by means of suitable filters. In the drawing pulses from a periodic pulse generator 1 are fed to a gate circuit 2, the output of which is fed to an output terminal 10 and also in an additive sense to a counter 3. Pulses from generator 1 also pass to a divider circuit 5, which divides the pulses by a factor equal to the required probability that pulses shall appear at the output 10, and the output of divider 5 is fed in a subtractive sense to the counter 3. The counter 3 may be a binary counter, and its most significant digits (e.g. five out of a total of ten) are passed to a binarynumerical converter 7. The output of unit 7 passes through a low-pass filter 8 to an adder circuit 9 to which the output of a noise generator 4 is also supplied. The output of unit 9 passes to an amplifier 6 designed so that a small variation of its input changes its output from a fixed high value to a fixed low value or vice versa, and the amplifier 6 controls the gate circuit 2. Means may be provided for preventing the counter 3 passing from its maximum to its minimum by the addition of a pulse, or from its minimum to its maximum by subtraction of a pulse; these means may comprise diodes arranged to prevent the passage of addition pulses when the counter is at its maximum and to prevent the passage of subtraction pulses when the counter is at its minimum. In an alternative arrangement pulses from the unit 1 pass alternately to the gate circuit 2 and to the divider 5, and the pulses from unit 1 are used to switch the counter 3 alternately from an adding to a subtracting condition and vice-versa.